Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r159-smll-171636267800348.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is FMS-PT-02000, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r159-smll-171636267800348
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 480K
-rw-r--r-- 1 mcc users 7.2K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 78K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 48K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Apr 22 14:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 22 14:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Apr 22 14:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 22 14:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Apr 11 21:59 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 133K Apr 11 21:59 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.8K Apr 11 21:58 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 67K Apr 11 21:58 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K Apr 22 14:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 6 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 16K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FMS-PT-02000-LTLFireability-00
FORMULA_NAME FMS-PT-02000-LTLFireability-01
FORMULA_NAME FMS-PT-02000-LTLFireability-02
FORMULA_NAME FMS-PT-02000-LTLFireability-03
FORMULA_NAME FMS-PT-02000-LTLFireability-04
FORMULA_NAME FMS-PT-02000-LTLFireability-05
FORMULA_NAME FMS-PT-02000-LTLFireability-06
FORMULA_NAME FMS-PT-02000-LTLFireability-07
FORMULA_NAME FMS-PT-02000-LTLFireability-08
FORMULA_NAME FMS-PT-02000-LTLFireability-09
FORMULA_NAME FMS-PT-02000-LTLFireability-10
FORMULA_NAME FMS-PT-02000-LTLFireability-11
FORMULA_NAME FMS-PT-02000-LTLFireability-12
FORMULA_NAME FMS-PT-02000-LTLFireability-13
FORMULA_NAME FMS-PT-02000-LTLFireability-14
FORMULA_NAME FMS-PT-02000-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1717140565013

FORMULA FMS-PT-02000-LTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-02000-LTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-02000-LTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-02000-LTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-02000-LTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-02000-LTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-02000-LTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-02000-LTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-02000-LTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-02000-LTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-02000-LTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-02000-LTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-02000-LTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-02000-LTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-02000-LTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-02000-LTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[lola] FINAL RESULTS
[lola]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola] FMS-PT-02000-LTLFireability-00: LTL true LTL model checker
[lola] FMS-PT-02000-LTLFireability-01: CONJ false LTL model checker
[lola] FMS-PT-02000-LTLFireability-02: LTL true LTL model checker
[lola] FMS-PT-02000-LTLFireability-03: F false state space / EG
[lola] FMS-PT-02000-LTLFireability-04: LTL false LTL model checker
[lola] FMS-PT-02000-LTLFireability-05: LTL false LTL model checker
[lola] FMS-PT-02000-LTLFireability-06: CONJ false LTL model checker
[lola] FMS-PT-02000-LTLFireability-07: LTL false LTL model checker
[lola] FMS-PT-02000-LTLFireability-08: LTL false LTL model checker
[lola] FMS-PT-02000-LTLFireability-09: LTL true LTL model checker
[lola] FMS-PT-02000-LTLFireability-10: LTL false LTL model checker
[lola] FMS-PT-02000-LTLFireability-11: LTL false LTL model checker
[lola] FMS-PT-02000-LTLFireability-12: AG false state equation
[lola] FMS-PT-02000-LTLFireability-13: CONJ false preprocessing
[lola] FMS-PT-02000-LTLFireability-14: LTL false LTL model checker
[lola] FMS-PT-02000-LTLFireability-15: LTL false LTL model checker
[lola]
[lola] Time elapsed: 45 secs. Pages in use: 188

BK_STOP 1717140610962

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from LTLFireability.xml
[lola][I] LAUNCH task # 54 (type CNST) for 51 FMS-PT-02000-LTLFireability-13
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 54 (type CNST) for FMS-PT-02000-LTLFireability-13
[lola][I] result : false
[lola][I] Rule S: 0 transitions removed,0 places removed
[*** LOG ERROR #0001 ***] [2024-05-31 07:29:25] [status_logger] string pointer is null
[lola][I] LAUNCH task # 40 (type EXCL) for 39 FMS-PT-02000-LTLFireability-09
[lola][I] time limit : 200 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 40 (type EXCL) for FMS-PT-02000-LTLFireability-09
[lola][I] result : true
[lola][I] markings : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 62 (type EXCL) for 61 FMS-PT-02000-LTLFireability-15
[lola][I] time limit : 211 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 68 (type EQUN) for 13 FMS-PT-02000-LTLFireability-03
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 62 (type EXCL) for FMS-PT-02000-LTLFireability-15
[lola][I] result : false
[lola][I] markings : 5
[lola][I] fired transitions : 5
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 43 (type EXCL) for 42 FMS-PT-02000-LTLFireability-10
[lola][I] time limit : 225 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 70 (type FNDP) for 48 FMS-PT-02000-LTLFireability-12
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 71 (type EQUN) for 48 FMS-PT-02000-LTLFireability-12
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 43 (type EXCL) for FMS-PT-02000-LTLFireability-10
[lola][I] result : false
[lola][I] markings : 6
[lola][I] fired transitions : 6
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 59 (type EXCL) for 58 FMS-PT-02000-LTLFireability-14
[lola][I] time limit : 240 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 59 (type EXCL) for FMS-PT-02000-LTLFireability-14
[lola][I] result : false
[lola][I] markings : 5
[lola][I] fired transitions : 5
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 34 (type EXCL) for 33 FMS-PT-02000-LTLFireability-07
[lola][I] time limit : 257 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 34 (type EXCL) for FMS-PT-02000-LTLFireability-07
[lola][I] result : false
[lola][I] markings : 5
[lola][I] fired transitions : 5
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 17 (type EXCL) for 16 FMS-PT-02000-LTLFireability-04
[lola][I] time limit : 276 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 71 (type EQUN) for FMS-PT-02000-LTLFireability-12
[lola][I] result : true
[lola][W] CANCELED task # 70 (type FNDP) for FMS-PT-02000-LTLFireability-12 (obsolete)
[lola][I] FINISHED task # 70 (type FNDP) for FMS-PT-02000-LTLFireability-12
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][I] FINISHED task # 68 (type EQUN) for FMS-PT-02000-LTLFireability-03
[lola][I] result : true
[lola][I] FINISHED task # 17 (type EXCL) for FMS-PT-02000-LTLFireability-04
[lola][I] result : false
[lola][I] markings : 20021
[lola][I] fired transitions : 20021
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 11 (type EXCL) for 10 FMS-PT-02000-LTLFireability-02
[lola][I] time limit : 327 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 11 (type EXCL) for FMS-PT-02000-LTLFireability-02
[lola][I] result : true
[lola][I] markings : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 8 (type EXCL) for 3 FMS-PT-02000-LTLFireability-01
[lola][I] time limit : 360 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] FMS-PT-02000-LTLFireability-02: LTL true LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-04: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-07: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-09: LTL true LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-10: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-12: AG false state equation
[lola][.] FMS-PT-02000-LTLFireability-13: CONJ false preprocessing
[lola][.] FMS-PT-02000-LTLFireability-14: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FMS-PT-02000-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-01: CONJ 0 1 1 0 2 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-06: CONJ 0 3 0 0 3 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 8 LTL EXCL 5/360 21/2000 FMS-PT-02000-LTLFireability-01 3054954 m, 610990 m/sec, 5598470 t fired, .
[lola][.]
[lola][.] Time elapsed: 5 secs. Pages in use: 21
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] FMS-PT-02000-LTLFireability-02: LTL true LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-04: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-07: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-09: LTL true LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-10: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-12: AG false state equation
[lola][.] FMS-PT-02000-LTLFireability-13: CONJ false preprocessing
[lola][.] FMS-PT-02000-LTLFireability-14: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FMS-PT-02000-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-01: CONJ 0 1 1 0 2 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-06: CONJ 0 3 0 0 3 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 8 LTL EXCL 10/360 42/2000 FMS-PT-02000-LTLFireability-01 6122566 m, 613522 m/sec, 11222067 t fired, .
[lola][.]
[lola][.] Time elapsed: 10 secs. Pages in use: 42
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] FMS-PT-02000-LTLFireability-02: LTL true LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-04: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-07: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-09: LTL true LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-10: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-12: AG false state equation
[lola][.] FMS-PT-02000-LTLFireability-13: CONJ false preprocessing
[lola][.] FMS-PT-02000-LTLFireability-14: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FMS-PT-02000-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-01: CONJ 0 1 1 0 2 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-06: CONJ 0 3 0 0 3 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 8 LTL EXCL 15/360 65/2000 FMS-PT-02000-LTLFireability-01 9547564 m, 684999 m/sec, 17499178 t fired, .
[lola][.]
[lola][.] Time elapsed: 15 secs. Pages in use: 65
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] FMS-PT-02000-LTLFireability-02: LTL true LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-04: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-07: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-09: LTL true LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-10: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-12: AG false state equation
[lola][.] FMS-PT-02000-LTLFireability-13: CONJ false preprocessing
[lola][.] FMS-PT-02000-LTLFireability-14: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FMS-PT-02000-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-01: CONJ 0 1 1 0 2 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-06: CONJ 0 3 0 0 3 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 8 LTL EXCL 20/360 87/2000 FMS-PT-02000-LTLFireability-01 12755304 m, 641548 m/sec, 23379285 t fired, .
[lola][.]
[lola][.] Time elapsed: 20 secs. Pages in use: 87
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] FMS-PT-02000-LTLFireability-02: LTL true LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-04: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-07: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-09: LTL true LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-10: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-12: AG false state equation
[lola][.] FMS-PT-02000-LTLFireability-13: CONJ false preprocessing
[lola][.] FMS-PT-02000-LTLFireability-14: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FMS-PT-02000-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-01: CONJ 0 1 1 0 2 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-06: CONJ 0 3 0 0 3 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 8 LTL EXCL 25/360 110/2000 FMS-PT-02000-LTLFireability-01 16068312 m, 662601 m/sec, 29442574 t fired, .
[lola][.]
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] FMS-PT-02000-LTLFireability-02: LTL true LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-04: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-07: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-09: LTL true LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-10: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-12: AG false state equation
[lola][.] FMS-PT-02000-LTLFireability-13: CONJ false preprocessing
[lola][.] FMS-PT-02000-LTLFireability-14: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FMS-PT-02000-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-01: CONJ 0 1 1 0 2 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-06: CONJ 0 3 0 0 3 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 8 LTL EXCL 30/360 130/2000 FMS-PT-02000-LTLFireability-01 19125103 m, 611358 m/sec, 34536121 t fired, .
[lola][.]
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[lola][.] FMS-PT-02000-LTLFireability-02: LTL true LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-04: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-07: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-09: LTL true LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-10: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-12: AG false state equation
[lola][.] FMS-PT-02000-LTLFireability-13: CONJ false preprocessing
[lola][.] FMS-PT-02000-LTLFireability-14: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FMS-PT-02000-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-01: CONJ 0 1 1 0 2 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-06: CONJ 0 3 0 0 3 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 8 LTL EXCL 35/360 149/2000 FMS-PT-02000-LTLFireability-01 22087325 m, 592444 m/sec, 39470589 t fired, .
[lola][.]
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[lola][.] FMS-PT-02000-LTLFireability-02: LTL true LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-04: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-07: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-09: LTL true LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-10: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-12: AG false state equation
[lola][.] FMS-PT-02000-LTLFireability-13: CONJ false preprocessing
[lola][.] FMS-PT-02000-LTLFireability-14: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FMS-PT-02000-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-01: CONJ 0 1 1 0 2 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-06: CONJ 0 3 0 0 3 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 8 LTL EXCL 40/360 167/2000 FMS-PT-02000-LTLFireability-01 24851812 m, 552897 m/sec, 44077722 t fired, .
[lola][.]
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[lola][.] FMS-PT-02000-LTLFireability-02: LTL true LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-04: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-07: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-09: LTL true LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-10: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-12: AG false state equation
[lola][.] FMS-PT-02000-LTLFireability-13: CONJ false preprocessing
[lola][.] FMS-PT-02000-LTLFireability-14: LTL false LTL model checker
[lola][.] FMS-PT-02000-LTLFireability-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] FMS-PT-02000-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-01: CONJ 0 1 1 0 2 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-03: F 0 1 0 0 2 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-06: CONJ 0 3 0 0 3 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] FMS-PT-02000-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 8 LTL EXCL 45/360 186/2000 FMS-PT-02000-LTLFireability-01 27729802 m, 575598 m/sec, 48871847 t fired, .
[lola][.]
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[lola][I] FINISHED task # 8 (type EXCL) for FMS-PT-02000-LTLFireability-01
[lola][I] result : false
[lola][I] markings : 28012011
[lola][I] fired transitions : 49342010
[lola][I] time used : 45
[lola][I] memory pages used : 188
[lola][I] LAUNCH task # 65 (type EXCL) for 13 FMS-PT-02000-LTLFireability-03
[lola][I] time limit : 444 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 65 (type EXCL) for FMS-PT-02000-LTLFireability-03
[lola][I] result : true
[lola][I] markings : 1
[lola][I] fired transitions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 46 (type EXCL) for 45 FMS-PT-02000-LTLFireability-11
[lola][I] time limit : 507 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 46 (type EXCL) for FMS-PT-02000-LTLFireability-11
[lola][I] result : false
[lola][I] markings : 2005
[lola][I] fired transitions : 2005
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 29 (type EXCL) for 22 FMS-PT-02000-LTLFireability-06
[lola][I] time limit : 592 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 29 (type EXCL) for FMS-PT-02000-LTLFireability-06
[lola][I] result : false
[lola][I] markings : 4007
[lola][I] fired transitions : 6010
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 20 (type EXCL) for 19 FMS-PT-02000-LTLFireability-05
[lola][I] time limit : 1185 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 20 (type EXCL) for FMS-PT-02000-LTLFireability-05
[lola][I] result : false
[lola][I] markings : 6006
[lola][I] fired transitions : 6007
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 1 (type EXCL) for 0 FMS-PT-02000-LTLFireability-00
[lola][I] time limit : 1777 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 1 (type EXCL) for FMS-PT-02000-LTLFireability-00
[lola][I] result : true
[lola][I] markings : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 37 (type EXCL) for 36 FMS-PT-02000-LTLFireability-08
[lola][I] time limit : 3555 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 37 (type EXCL) for FMS-PT-02000-LTLFireability-08
[lola][I] result : false
[lola][I] markings : 3
[lola][I] fired transitions : 4
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] Portfolio finished: no open formulas

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FMS-PT-02000"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is FMS-PT-02000, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r159-smll-171636267800348"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FMS-PT-02000.tgz
mv FMS-PT-02000 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;