MCC'2024- Execution of r159-smll-171636267200066

About the Execution of LoLA for ERK-PT-100000

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
16207.415	267224.00	265145.00	1305.50	???????F????????	normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r159-smll-171636267200066.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is ERK-PT-100000, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r159-smll-171636267200066
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 436K
-rw-r--r-- 1 mcc users 5.4K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 45K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 55K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K May 19 07:09 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K May 19 15:49 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Apr 22 14:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 22 14:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.8K Apr 11 21:53 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 78K Apr 11 21:53 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Apr 11 21:53 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 110K Apr 11 21:53 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 22 14:42 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 22 14:42 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 7 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 6.7K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ERK-PT-100000-CTLFireability-2024-00
FORMULA_NAME ERK-PT-100000-CTLFireability-2024-01
FORMULA_NAME ERK-PT-100000-CTLFireability-2024-02
FORMULA_NAME ERK-PT-100000-CTLFireability-2024-03
FORMULA_NAME ERK-PT-100000-CTLFireability-2024-04
FORMULA_NAME ERK-PT-100000-CTLFireability-2024-05
FORMULA_NAME ERK-PT-100000-CTLFireability-2024-06
FORMULA_NAME ERK-PT-100000-CTLFireability-2024-07
FORMULA_NAME ERK-PT-100000-CTLFireability-2024-08
FORMULA_NAME ERK-PT-100000-CTLFireability-2024-09
FORMULA_NAME ERK-PT-100000-CTLFireability-2024-10
FORMULA_NAME ERK-PT-100000-CTLFireability-2024-11
FORMULA_NAME ERK-PT-100000-CTLFireability-2023-12
FORMULA_NAME ERK-PT-100000-CTLFireability-2023-13
FORMULA_NAME ERK-PT-100000-CTLFireability-2023-14
FORMULA_NAME ERK-PT-100000-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717016820168

FORMULA ERK-PT-100000-CTLFireability-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1717017087392

--------------------
content from stderr:

[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 ERK-PT-100000-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 102 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 26 (type CNST) for 25 ERK-PT-100000-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 26 (type CNST) for ERK-PT-100000-CTLFireability-2024-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 76 (type EQUN) for 40 ERK-PT-100000-CTLFireability-2023-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 74 (type EQUN) for 18 ERK-PT-100000-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 78 (type EQUN) for 18 ERK-PT-100000-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 74 (type EQUN) for ERK-PT-100000-CTLFireability-2024-06
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 78 (type EQUN) for ERK-PT-100000-CTLFireability-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 76 (type EQUN) for ERK-PT-100000-CTLFireability-2023-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mERK-PT-100000-CTLFireability-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-06: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2023-12: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2023-13: DISJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 5/180 9/2000 ERK-PT-100000-CTLFireability-2024-00 2043386 m, 408677 m/sec, 4804121 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-06: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2023-12: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2023-13: DISJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 10/180 16/2000 ERK-PT-100000-CTLFireability-2024-00 3929467 m, 377216 m/sec, 9517248 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-06: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2023-12: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2023-13: DISJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 15/180 24/2000 ERK-PT-100000-CTLFireability-2024-00 5798606 m, 373827 m/sec, 14188545 t fired, .
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[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-06: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2023-12: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2023-13: DISJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 1 CTL EXCL 20/180 32/2000 ERK-PT-100000-CTLFireability-2024-00 7816178 m, 403514 m/sec, 19231517 t fired, .
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[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-06: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2023-12: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2023-13: DISJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 1 CTL EXCL 25/180 40/2000 ERK-PT-100000-CTLFireability-2024-00 9821566 m, 401077 m/sec, 24243497 t fired, .
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[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-06: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2023-12: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2023-13: DISJ 0 3 0 0 3 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 1 CTL EXCL 30/180 48/2000 ERK-PT-100000-CTLFireability-2024-00 11788191 m, 393325 m/sec, 29159037 t fired, .
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[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-06: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2023-12: CONJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] ERK-PT-100000-CTLFireability-2023-13: DISJ 0 3 0 0 3 0 0 0
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 408 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ERK-PT-100000"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is ERK-PT-100000, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r159-smll-171636267200066"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ERK-PT-100000.tgz
mv ERK-PT-100000 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;