About the Execution of LoLA for EGFr-PT-10420
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16207.768 | 489182.00 | 485426.00 | 1753.10 | FF??F?FFF?T?TFTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r159-smll-171636267100010.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is EGFr-PT-10420, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r159-smll-171636267100010
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.2M
-rw-r--r-- 1 mcc users 8.1K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 73K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 15K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.5K Apr 22 14:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Apr 22 14:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 5.9K Apr 22 14:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 22 14:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Apr 11 16:39 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 99K Apr 11 16:39 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 36K Apr 11 16:05 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 112K Apr 11 16:05 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 22 14:42 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 22 14:42 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 6 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 681K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME EGFr-PT-10420-CTLFireability-2024-00
FORMULA_NAME EGFr-PT-10420-CTLFireability-2024-01
FORMULA_NAME EGFr-PT-10420-CTLFireability-2024-02
FORMULA_NAME EGFr-PT-10420-CTLFireability-2024-03
FORMULA_NAME EGFr-PT-10420-CTLFireability-2024-04
FORMULA_NAME EGFr-PT-10420-CTLFireability-2024-05
FORMULA_NAME EGFr-PT-10420-CTLFireability-2024-06
FORMULA_NAME EGFr-PT-10420-CTLFireability-2024-07
FORMULA_NAME EGFr-PT-10420-CTLFireability-2024-08
FORMULA_NAME EGFr-PT-10420-CTLFireability-2024-09
FORMULA_NAME EGFr-PT-10420-CTLFireability-2024-10
FORMULA_NAME EGFr-PT-10420-CTLFireability-2024-11
FORMULA_NAME EGFr-PT-10420-CTLFireability-2023-12
FORMULA_NAME EGFr-PT-10420-CTLFireability-2023-13
FORMULA_NAME EGFr-PT-10420-CTLFireability-2023-14
FORMULA_NAME EGFr-PT-10420-CTLFireability-2023-15
=== Now, execution of the tool begins
BK_START 1717011119950
FORMULA EGFr-PT-10420-CTLFireability-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA EGFr-PT-10420-CTLFireability-2024-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA EGFr-PT-10420-CTLFireability-2024-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA EGFr-PT-10420-CTLFireability-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA EGFr-PT-10420-CTLFireability-2023-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA EGFr-PT-10420-CTLFireability-2023-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA EGFr-PT-10420-CTLFireability-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA EGFr-PT-10420-CTLFireability-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA EGFr-PT-10420-CTLFireability-2023-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA EGFr-PT-10420-CTLFireability-2023-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA EGFr-PT-10420-CTLFireability-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717011609132
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 239 transitions removed,49 places removed
[[35mlola[0m][I] LAUNCH task # 4 (type CNST) for 3 EGFr-PT-10420-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 4 (type CNST) for EGFr-PT-10420-CTLFireability-2024-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 23 (type CNST) for 22 EGFr-PT-10420-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 29 (type CNST) for 28 EGFr-PT-10420-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 13 (type CNST) for 12 EGFr-PT-10420-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 35 (type CNST) for 34 EGFr-PT-10420-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 23 (type CNST) for EGFr-PT-10420-CTLFireability-2024-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 13 (type CNST) for EGFr-PT-10420-CTLFireability-2024-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 29 (type CNST) for EGFr-PT-10420-CTLFireability-2024-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 45 (type CNST) for 44 EGFr-PT-10420-CTLFireability-2023-12
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 54 (type CNST) for 53 EGFr-PT-10420-CTLFireability-2023-15
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 45 (type CNST) for EGFr-PT-10420-CTLFireability-2023-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 54 (type CNST) for EGFr-PT-10420-CTLFireability-2023-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 35 (type CNST) for EGFr-PT-10420-CTLFireability-2024-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 EGFr-PT-10420-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 360 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for EGFr-PT-10420-CTLFireability-2024-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 97
[[35mlola[0m][I] fired transitions : 314
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 51 (type EXCL) for 50 EGFr-PT-10420-CTLFireability-2023-14
[[35mlola[0m][I] time limit : 400 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 60 (type EQUN) for 37 EGFr-PT-10420-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 51 (type EXCL) for EGFr-PT-10420-CTLFireability-2023-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 48 (type EXCL) for 47 EGFr-PT-10420-CTLFireability-2023-13
[[35mlola[0m][I] time limit : 450 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 57 (type FNDP) for 25 EGFr-PT-10420-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 62 (type EQUN) for 25 EGFr-PT-10420-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 48 (type EXCL) for EGFr-PT-10420-CTLFireability-2023-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 97
[[35mlola[0m][I] fired transitions : 97
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 32 (type EXCL) for 31 EGFr-PT-10420-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 450 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 57 (type FNDP) for EGFr-PT-10420-CTLFireability-2024-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 62 (type EQUN) for EGFr-PT-10420-CTLFireability-2024-07 (obsolete)
[[35mlola[0m][I] LAUNCH task # 69 (type EQUN) for 15 EGFr-PT-10420-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 72 (type EQUN) for 37 EGFr-PT-10420-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 62 (type EQUN) for EGFr-PT-10420-CTLFireability-2024-07
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 72 (type EQUN) for EGFr-PT-10420-CTLFireability-2024-11
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 69 (type EQUN) for EGFr-PT-10420-CTLFireability-2024-05
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 60 (type EQUN) for EGFr-PT-10420-CTLFireability-2024-11
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 5/514 6/2000 EGFr-PT-10420-CTLFireability-2024-09 1212617 m, 242523 m/sec, 3216189 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 10/514 10/2000 EGFr-PT-10420-CTLFireability-2024-09 2345338 m, 226544 m/sec, 6499404 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 15/514 15/2000 EGFr-PT-10420-CTLFireability-2024-09 3391882 m, 209308 m/sec, 9657376 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 15 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 20/514 19/2000 EGFr-PT-10420-CTLFireability-2024-09 4378443 m, 197312 m/sec, 12716007 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 20 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 25/514 23/2000 EGFr-PT-10420-CTLFireability-2024-09 5344897 m, 193290 m/sec, 15748321 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 25 secs. Pages in use: 23
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 30/514 26/2000 EGFr-PT-10420-CTLFireability-2024-09 6219771 m, 174974 m/sec, 18531506 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 30 secs. Pages in use: 26
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 35/514 30/2000 EGFr-PT-10420-CTLFireability-2024-09 7139353 m, 183916 m/sec, 21484731 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 35 secs. Pages in use: 30
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 40/514 34/2000 EGFr-PT-10420-CTLFireability-2024-09 8010164 m, 174162 m/sec, 24311154 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 40 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 45/514 37/2000 EGFr-PT-10420-CTLFireability-2024-09 8886844 m, 175336 m/sec, 27167862 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 45 secs. Pages in use: 37
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 50/514 41/2000 EGFr-PT-10420-CTLFireability-2024-09 9749327 m, 172496 m/sec, 30013764 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 50 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 55/514 44/2000 EGFr-PT-10420-CTLFireability-2024-09 10613280 m, 172790 m/sec, 32885106 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 55 secs. Pages in use: 44
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 60/514 48/2000 EGFr-PT-10420-CTLFireability-2024-09 11453572 m, 168058 m/sec, 35683600 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 60 secs. Pages in use: 48
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 65/514 51/2000 EGFr-PT-10420-CTLFireability-2024-09 12281078 m, 165501 m/sec, 38458463 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 65 secs. Pages in use: 51
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 70/514 55/2000 EGFr-PT-10420-CTLFireability-2024-09 13090711 m, 161926 m/sec, 41198915 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 70 secs. Pages in use: 55
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 75/514 58/2000 EGFr-PT-10420-CTLFireability-2024-09 13901828 m, 162223 m/sec, 43936334 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 75 secs. Pages in use: 58
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 80/514 61/2000 EGFr-PT-10420-CTLFireability-2024-09 14697140 m, 159062 m/sec, 46645886 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 80 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 85/514 65/2000 EGFr-PT-10420-CTLFireability-2024-09 15485852 m, 157742 m/sec, 49336474 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 85 secs. Pages in use: 65
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 90/514 68/2000 EGFr-PT-10420-CTLFireability-2024-09 16278633 m, 158556 m/sec, 52055426 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 90 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 95/514 71/2000 EGFr-PT-10420-CTLFireability-2024-09 17067563 m, 157786 m/sec, 54765974 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 95 secs. Pages in use: 71
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 100/514 74/2000 EGFr-PT-10420-CTLFireability-2024-09 17845501 m, 155587 m/sec, 57460468 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 100 secs. Pages in use: 74
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 105/514 78/2000 EGFr-PT-10420-CTLFireability-2024-09 18633463 m, 157592 m/sec, 60184054 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 105 secs. Pages in use: 78
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 110/514 81/2000 EGFr-PT-10420-CTLFireability-2024-09 19398997 m, 153106 m/sec, 62841674 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 110 secs. Pages in use: 81
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 115/514 84/2000 EGFr-PT-10420-CTLFireability-2024-09 20173652 m, 154931 m/sec, 65537223 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 115 secs. Pages in use: 84
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 120/514 87/2000 EGFr-PT-10420-CTLFireability-2024-09 20946389 m, 154547 m/sec, 68232808 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 120 secs. Pages in use: 87
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 125/514 90/2000 EGFr-PT-10420-CTLFireability-2024-09 21724324 m, 155587 m/sec, 70959265 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 125 secs. Pages in use: 90
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 130/514 93/2000 EGFr-PT-10420-CTLFireability-2024-09 22471094 m, 149354 m/sec, 73583085 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 130 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 135/514 96/2000 EGFr-PT-10420-CTLFireability-2024-09 23179515 m, 141684 m/sec, 76074412 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 135 secs. Pages in use: 96
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 140/514 99/2000 EGFr-PT-10420-CTLFireability-2024-09 23905626 m, 145222 m/sec, 78637094 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 140 secs. Pages in use: 99
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 145/514 102/2000 EGFr-PT-10420-CTLFireability-2024-09 24623995 m, 143673 m/sec, 81181631 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 145 secs. Pages in use: 102
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 150/514 105/2000 EGFr-PT-10420-CTLFireability-2024-09 25344674 m, 144135 m/sec, 83736646 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 150 secs. Pages in use: 105
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 155/514 108/2000 EGFr-PT-10420-CTLFireability-2024-09 26040688 m, 139202 m/sec, 86209486 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 155 secs. Pages in use: 108
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 160/514 111/2000 EGFr-PT-10420-CTLFireability-2024-09 26748338 m, 141530 m/sec, 88736058 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 160 secs. Pages in use: 111
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 165/514 114/2000 EGFr-PT-10420-CTLFireability-2024-09 27415417 m, 133415 m/sec, 91120429 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 165 secs. Pages in use: 114
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 170/514 117/2000 EGFr-PT-10420-CTLFireability-2024-09 28115180 m, 139952 m/sec, 93629083 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 170 secs. Pages in use: 117
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 175/514 120/2000 EGFr-PT-10420-CTLFireability-2024-09 28797038 m, 136371 m/sec, 96075776 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 175 secs. Pages in use: 120
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 180/514 122/2000 EGFr-PT-10420-CTLFireability-2024-09 29505153 m, 141623 m/sec, 98619552 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 180 secs. Pages in use: 122
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 185/514 125/2000 EGFr-PT-10420-CTLFireability-2024-09 30187649 m, 136499 m/sec, 101074556 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 185 secs. Pages in use: 125
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 190/514 128/2000 EGFr-PT-10420-CTLFireability-2024-09 30862707 m, 135011 m/sec, 103508750 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 190 secs. Pages in use: 128
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 195/514 131/2000 EGFr-PT-10420-CTLFireability-2024-09 31557901 m, 139038 m/sec, 106015916 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 195 secs. Pages in use: 131
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 200/514 134/2000 EGFr-PT-10420-CTLFireability-2024-09 32257944 m, 140008 m/sec, 108547542 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 200 secs. Pages in use: 134
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 205/514 137/2000 EGFr-PT-10420-CTLFireability-2024-09 32953890 m, 139189 m/sec, 111066983 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 205 secs. Pages in use: 137
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 210/514 140/2000 EGFr-PT-10420-CTLFireability-2024-09 33644176 m, 138057 m/sec, 113568338 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 210 secs. Pages in use: 140
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 215/514 142/2000 EGFr-PT-10420-CTLFireability-2024-09 34341372 m, 139439 m/sec, 116100958 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 215 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 220/514 145/2000 EGFr-PT-10420-CTLFireability-2024-09 35045413 m, 140808 m/sec, 118671541 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 220 secs. Pages in use: 145
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 225/514 148/2000 EGFr-PT-10420-CTLFireability-2024-09 35725427 m, 136002 m/sec, 121150261 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 225 secs. Pages in use: 148
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 230/514 151/2000 EGFr-PT-10420-CTLFireability-2024-09 36431823 m, 141279 m/sec, 123724652 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 230 secs. Pages in use: 151
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 235/514 154/2000 EGFr-PT-10420-CTLFireability-2024-09 37105466 m, 134728 m/sec, 126188076 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 235 secs. Pages in use: 154
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 240/514 157/2000 EGFr-PT-10420-CTLFireability-2024-09 37802535 m, 139413 m/sec, 128743120 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 240 secs. Pages in use: 157
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 245/514 160/2000 EGFr-PT-10420-CTLFireability-2024-09 38494309 m, 138354 m/sec, 131278525 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 245 secs. Pages in use: 160
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 250/514 162/2000 EGFr-PT-10420-CTLFireability-2024-09 39188312 m, 138800 m/sec, 133823450 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 250 secs. Pages in use: 162
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 255/514 165/2000 EGFr-PT-10420-CTLFireability-2024-09 39854615 m, 133260 m/sec, 136270790 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 255 secs. Pages in use: 165
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 260/514 168/2000 EGFr-PT-10420-CTLFireability-2024-09 40541934 m, 137463 m/sec, 138807128 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 260 secs. Pages in use: 168
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 265/514 171/2000 EGFr-PT-10420-CTLFireability-2024-09 41195086 m, 130630 m/sec, 141216104 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 265 secs. Pages in use: 171
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 270/514 174/2000 EGFr-PT-10420-CTLFireability-2024-09 41880856 m, 137154 m/sec, 143746311 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 270 secs. Pages in use: 174
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 275/514 176/2000 EGFr-PT-10420-CTLFireability-2024-09 42537164 m, 131261 m/sec, 146169743 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 275 secs. Pages in use: 176
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 280/514 179/2000 EGFr-PT-10420-CTLFireability-2024-09 43221328 m, 136832 m/sec, 148698461 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 280 secs. Pages in use: 179
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 285/514 182/2000 EGFr-PT-10420-CTLFireability-2024-09 43873898 m, 130514 m/sec, 151125777 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 285 secs. Pages in use: 182
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 290/514 185/2000 EGFr-PT-10420-CTLFireability-2024-09 44553258 m, 135872 m/sec, 153650884 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 290 secs. Pages in use: 185
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 295/514 187/2000 EGFr-PT-10420-CTLFireability-2024-09 45195620 m, 128472 m/sec, 156040970 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 295 secs. Pages in use: 187
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 300/514 190/2000 EGFr-PT-10420-CTLFireability-2024-09 45816261 m, 124128 m/sec, 158348303 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 300 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 305/514 192/2000 EGFr-PT-10420-CTLFireability-2024-09 46439887 m, 124725 m/sec, 160676368 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 305 secs. Pages in use: 192
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 310/514 195/2000 EGFr-PT-10420-CTLFireability-2024-09 47084296 m, 128881 m/sec, 163076147 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 310 secs. Pages in use: 195
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 315/514 198/2000 EGFr-PT-10420-CTLFireability-2024-09 47706107 m, 124362 m/sec, 165405197 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 315 secs. Pages in use: 198
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 320/514 200/2000 EGFr-PT-10420-CTLFireability-2024-09 48344639 m, 127706 m/sec, 167785388 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 320 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 325/514 203/2000 EGFr-PT-10420-CTLFireability-2024-09 48966146 m, 124301 m/sec, 170104345 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 325 secs. Pages in use: 203
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 330/514 205/2000 EGFr-PT-10420-CTLFireability-2024-09 49585660 m, 123902 m/sec, 172417628 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 330 secs. Pages in use: 205
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 335/514 208/2000 EGFr-PT-10420-CTLFireability-2024-09 50206595 m, 124187 m/sec, 174734233 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 335 secs. Pages in use: 208
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 340/514 210/2000 EGFr-PT-10420-CTLFireability-2024-09 50816752 m, 122031 m/sec, 177018334 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 340 secs. Pages in use: 210
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 345/514 213/2000 EGFr-PT-10420-CTLFireability-2024-09 51454115 m, 127472 m/sec, 179413768 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 345 secs. Pages in use: 213
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 350/514 215/2000 EGFr-PT-10420-CTLFireability-2024-09 52042441 m, 117665 m/sec, 181617190 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 350 secs. Pages in use: 215
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 355/514 218/2000 EGFr-PT-10420-CTLFireability-2024-09 52657923 m, 123096 m/sec, 183929816 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 355 secs. Pages in use: 218
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 360/514 221/2000 EGFr-PT-10420-CTLFireability-2024-09 53298435 m, 128102 m/sec, 186339628 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 360 secs. Pages in use: 221
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 365/514 223/2000 EGFr-PT-10420-CTLFireability-2024-09 53939543 m, 128221 m/sec, 188751261 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 365 secs. Pages in use: 223
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 370/514 226/2000 EGFr-PT-10420-CTLFireability-2024-09 54576387 m, 127368 m/sec, 191156004 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 370 secs. Pages in use: 226
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 375/514 229/2000 EGFr-PT-10420-CTLFireability-2024-09 55210837 m, 126890 m/sec, 193557532 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 375 secs. Pages in use: 229
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 380/514 231/2000 EGFr-PT-10420-CTLFireability-2024-09 55840766 m, 125985 m/sec, 195942748 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 380 secs. Pages in use: 231
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 385/514 234/2000 EGFr-PT-10420-CTLFireability-2024-09 56473721 m, 126591 m/sec, 198336630 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 385 secs. Pages in use: 234
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 390/514 236/2000 EGFr-PT-10420-CTLFireability-2024-09 57097516 m, 124759 m/sec, 200699132 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 390 secs. Pages in use: 236
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 395/514 239/2000 EGFr-PT-10420-CTLFireability-2024-09 57697773 m, 120051 m/sec, 202965792 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 395 secs. Pages in use: 239
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 400/514 241/2000 EGFr-PT-10420-CTLFireability-2024-09 58292946 m, 119034 m/sec, 205216791 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 400 secs. Pages in use: 241
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 405/514 244/2000 EGFr-PT-10420-CTLFireability-2024-09 58899614 m, 121333 m/sec, 207501117 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 405 secs. Pages in use: 244
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 410/514 246/2000 EGFr-PT-10420-CTLFireability-2024-09 59493995 m, 118876 m/sec, 209758675 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 410 secs. Pages in use: 246
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 415/514 249/2000 EGFr-PT-10420-CTLFireability-2024-09 60091869 m, 119574 m/sec, 212026337 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 415 secs. Pages in use: 249
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 420/514 251/2000 EGFr-PT-10420-CTLFireability-2024-09 60695738 m, 120773 m/sec, 214319314 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 420 secs. Pages in use: 251
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 425/514 254/2000 EGFr-PT-10420-CTLFireability-2024-09 61306691 m, 122190 m/sec, 216651408 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 425 secs. Pages in use: 254
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 430/514 256/2000 EGFr-PT-10420-CTLFireability-2024-09 61905203 m, 119702 m/sec, 218928972 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 430 secs. Pages in use: 256
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 435/514 259/2000 EGFr-PT-10420-CTLFireability-2024-09 62491306 m, 117220 m/sec, 221164231 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 435 secs. Pages in use: 259
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 440/514 261/2000 EGFr-PT-10420-CTLFireability-2024-09 63095476 m, 120834 m/sec, 223473754 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 440 secs. Pages in use: 261
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 445/514 264/2000 EGFr-PT-10420-CTLFireability-2024-09 63710766 m, 123058 m/sec, 225824880 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 445 secs. Pages in use: 264
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 450/514 266/2000 EGFr-PT-10420-CTLFireability-2024-09 64323536 m, 122554 m/sec, 228172316 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 450 secs. Pages in use: 266
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 455/514 269/2000 EGFr-PT-10420-CTLFireability-2024-09 64937043 m, 122701 m/sec, 230518749 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 455 secs. Pages in use: 269
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 460/514 271/2000 EGFr-PT-10420-CTLFireability-2024-09 65536866 m, 119964 m/sec, 232814255 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 460 secs. Pages in use: 271
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 465/514 274/2000 EGFr-PT-10420-CTLFireability-2024-09 66154865 m, 123599 m/sec, 235176485 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 465 secs. Pages in use: 274
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 470/514 276/2000 EGFr-PT-10420-CTLFireability-2024-09 66755982 m, 120223 m/sec, 237468381 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 470 secs. Pages in use: 276
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 475/514 279/2000 EGFr-PT-10420-CTLFireability-2024-09 67343640 m, 117531 m/sec, 239713323 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 475 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-07: AG false findpath[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2024-10: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-13: LTL/CTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mEGFr-PT-10420-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mEGFr-PT-10420-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-05: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] EGFr-PT-10420-CTLFireability-2024-11: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 485/514 280/2000 EGFr-PT-10420-CTLFireability-2024-09 67698157 m, 70903 m/sec, 241068261 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 487 secs. Pages in use: 280
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 402 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="EGFr-PT-10420"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is EGFr-PT-10420, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r159-smll-171636267100010"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/EGFr-PT-10420.tgz
mv EGFr-PT-10420 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;