fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r158-smll-171636267000486
Last Updated
July 7, 2024

About the Execution of ITS-Tools for FamilyReunion-PT-L00010M0001C001P001G001

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
938.932 15823.00 47739.00 243.60 TTTTTTTFTFTFTTFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r158-smll-171636267000486.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool itstools
Input is FamilyReunion-PT-L00010M0001C001P001G001, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r158-smll-171636267000486
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.8M
-rw-r--r-- 1 mcc users 20K Apr 11 20:20 CTLCardinality.txt
-rw-r--r-- 1 mcc users 151K Apr 11 20:20 CTLCardinality.xml
-rw-r--r-- 1 mcc users 26K Apr 11 20:15 CTLFireability.txt
-rw-r--r-- 1 mcc users 115K Apr 11 20:15 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.0K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 11K Apr 22 14:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 55K Apr 22 14:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 15K Apr 22 14:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 50K Apr 22 14:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 58K Apr 11 20:29 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 440K Apr 11 20:29 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 57K Apr 11 20:24 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 220K Apr 11 20:24 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.9K Apr 22 14:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 7.3K Apr 22 14:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 24 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 552K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-00
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-01
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-02
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-03
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-04
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-05
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-06
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-07
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-08
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-09
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-10
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-11
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-12
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-13
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-14
FORMULA_NAME FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-15

=== Now, execution of the tool begins

BK_START 1716682185807

Invoking MCC driver with
BK_TOOL=itstools
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FamilyReunion-PT-L00010M0001C001P001G001
BK_MEMORY_CONFINEMENT=16384
Not applying reductions.
Model is PT
ReachabilityCardinality PT
Running Version 202405141337
[2024-05-26 00:09:48] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -its, -ltsmin, -greatspnpath, /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2024-05-26 00:09:48] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-26 00:09:49] [INFO ] Load time of PNML (sax parser for PT used): 333 ms
[2024-05-26 00:09:49] [INFO ] Transformed 1475 places.
[2024-05-26 00:09:49] [INFO ] Transformed 1234 transitions.
[2024-05-26 00:09:49] [INFO ] Parsed PT model containing 1475 places and 1234 transitions and 3799 arcs in 743 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 96 ms.
Working with output stream class java.io.PrintStream
Reduce places removed 10 places and 0 transitions.
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
RANDOM walk for 40000 steps (60 resets) in 3599 ms. (11 steps per ms) remains 6/15 properties
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-15 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-14 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-13 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-11 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-10 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-08 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-07 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-05 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-00 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
[2024-05-26 00:09:51] [INFO ] Flatten gal took : 486 ms
[2024-05-26 00:09:51] [INFO ] Flatten gal took : 454 ms
[2024-05-26 00:09:51] [INFO ] Time to serialize gal into /tmp/ReachabilityCardinality14411174955923318389.gal : 73 ms
BEST_FIRST walk for 40004 steps (8 resets) in 2585 ms. (15 steps per ms) remains 6/6 properties
[2024-05-26 00:09:52] [INFO ] Time to serialize properties into /tmp/ReachabilityCardinality9731218531029277337.prop : 83 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202405141337/bin/its-reach-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/ReachabilityCardinality14411174955923318389.gal' '-t' 'CGAL' '-reachable-file' '/tmp/ReachabilityCardinality9731218531029277337.prop' '--nowitness' '--gen-order' 'FOLLOW'
BEST_FIRST walk for 40004 steps (8 resets) in 1254 ms. (31 steps per ms) remains 6/6 properties

its-reach command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202405141337/bin/its-reach-linux64 --gc-threshold 2000000 --quiet ...329
BEST_FIRST walk for 40003 steps (8 resets) in 208 ms. (191 steps per ms) remains 6/6 properties
Loading property file /tmp/ReachabilityCardinality9731218531029277337.prop.
BEST_FIRST walk for 40003 steps (8 resets) in 1464 ms. (27 steps per ms) remains 6/6 properties
BEST_FIRST walk for 40004 steps (8 resets) in 256 ms. (155 steps per ms) remains 6/6 properties
BEST_FIRST walk for 40004 steps (8 resets) in 113 ms. (350 steps per ms) remains 6/6 properties
// Phase 1: matrix 1234 rows 1465 cols
[2024-05-26 00:09:53] [INFO ] Computed 332 invariants in 113 ms
SDD proceeding with computation,6 properties remain. new max is 4
SDD size :1 after 4
SDD proceeding with computation,6 properties remain. new max is 8
SDD size :4 after 17
SDD proceeding with computation,6 properties remain. new max is 16
SDD size :17 after 32
SDD proceeding with computation,6 properties remain. new max is 32
SDD size :32 after 256
SDD proceeding with computation,6 properties remain. new max is 64
SDD size :256 after 6336
SDD proceeding with computation,6 properties remain. new max is 128
SDD size :6336 after 188160
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/1333 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/1333 variables, 120/121 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/1333 variables, 0/121 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 3 (OVERLAPS) 35/1368 variables, 29/150 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/1368 variables, 78/228 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/1368 variables, 0/228 constraints. Problems are: Problem set: 0 solved, 6 unsolved
Problem FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-01 is UNSAT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-01 TRUE TECHNIQUES SMT_REFINEMENT
Problem FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-02 is UNSAT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-02 TRUE TECHNIQUES SMT_REFINEMENT
Problem FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-03 is UNSAT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-03 TRUE TECHNIQUES SMT_REFINEMENT
Problem FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-06 is UNSAT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-06 TRUE TECHNIQUES SMT_REFINEMENT
Problem FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-12 is UNSAT
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-12 TRUE TECHNIQUES SMT_REFINEMENT
At refinement iteration 6 (OVERLAPS) 97/1465 variables, 104/332 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/1465 variables, 0/332 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 8 (OVERLAPS) 1234/2699 variables, 1465/1797 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 9 (INCLUDED_ONLY) 0/2699 variables, 0/1797 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 10 (OVERLAPS) 0/2699 variables, 0/1797 constraints. Problems are: Problem set: 5 solved, 1 unsolved
No progress, stopping.
After SMT solving in domain Real declared 2699/2699 variables, and 1797 constraints, problems are : Problem set: 5 solved, 1 unsolved in 3495 ms.
Refiners :[Positive P Invariants (semi-flows): 30/30 constraints, Generalized P Invariants (flows): 302/302 constraints, State Equation: 1465/1465 constraints, PredecessorRefiner: 6/5 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 5 solved, 1 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/37 variables, 0/0 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 1 (OVERLAPS) 477/514 variables, 23/23 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/514 variables, 2/25 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/514 variables, 0/25 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 4 (OVERLAPS) 24/538 variables, 1/26 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/538 variables, 0/26 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 6 (OVERLAPS) 85/623 variables, 3/29 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/623 variables, 1/30 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/623 variables, 0/30 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 9 (OVERLAPS) 713/1336 variables, 237/267 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 10 (INCLUDED_ONLY) 0/1336 variables, 0/267 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 11 (OVERLAPS) 30/1366 variables, 3/270 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 12 (INCLUDED_ONLY) 0/1366 variables, 0/270 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 13 (OVERLAPS) 97/1463 variables, 61/331 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 14 (INCLUDED_ONLY) 0/1463 variables, 0/331 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 15 (OVERLAPS) 2/1465 variables, 1/332 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 16 (INCLUDED_ONLY) 0/1465 variables, 0/332 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 17 (OVERLAPS) 1234/2699 variables, 1465/1797 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 18 (INCLUDED_ONLY) 0/2699 variables, 1/1798 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 19 (INCLUDED_ONLY) 0/2699 variables, 0/1798 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 20 (OVERLAPS) 0/2699 variables, 0/1798 constraints. Problems are: Problem set: 5 solved, 1 unsolved
No progress, stopping.
After SMT solving in domain Int declared 2699/2699 variables, and 1798 constraints, problems are : Problem set: 5 solved, 1 unsolved in 2733 ms.
Refiners :[Positive P Invariants (semi-flows): 30/30 constraints, Generalized P Invariants (flows): 302/302 constraints, State Equation: 1465/1465 constraints, PredecessorRefiner: 1/5 constraints, Known Traps: 0/0 constraints]
After SMT, in 8427ms problems are : Problem set: 5 solved, 1 unsolved
Finished Parikh walk after 237 steps, including 0 resets, run visited all 1 properties in 3 ms. (steps per millisecond=79 )
FORMULA FamilyReunion-PT-L00010M0001C001P001G001-ReachabilityCardinality-2024-09 FALSE TECHNIQUES PARIKH_WALK
Parikh walk visited 1 properties in 23 ms.
ITS runner timed out or was interrupted.
ITS tools runner thread asked to quit. Dying gracefully.
All properties solved without resorting to model-checking.
Total runtime 13082 ms.

BK_STOP 1716682201630

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/bin//../itstools/bin//../
+ BINDIR=/home/mcc/BenchKit/bin//../itstools/bin//../
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit/bin//../itstools/bin//..//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../itstools/bin//..//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../itstools/bin//..//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-PT-L00010M0001C001P001G001"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool itstools"
echo " Input is FamilyReunion-PT-L00010M0001C001P001G001, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r158-smll-171636267000486"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-PT-L00010M0001C001P001G001.tgz
mv FamilyReunion-PT-L00010M0001C001P001G001 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;