fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r137-tall-171631134700628
Last Updated
July 7, 2024

About the Execution of LoLA for DoubleLock-PT-p3s1

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16199.203 213216.00 216806.00 816.90 ??FF???????????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r137-tall-171631134700628.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is DoubleLock-PT-p3s1, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r137-tall-171631134700628
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 568K
-rw-r--r-- 1 mcc users 7.3K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 85K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K Apr 22 14:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Apr 22 14:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 19 07:17 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 19 18:16 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Apr 12 13:18 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 172K Apr 12 13:18 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Apr 12 13:17 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 105K Apr 12 13:17 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K May 19 07:11 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 19 15:25 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 39K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DoubleLock-PT-p3s1-LTLFireability-00
FORMULA_NAME DoubleLock-PT-p3s1-LTLFireability-01
FORMULA_NAME DoubleLock-PT-p3s1-LTLFireability-02
FORMULA_NAME DoubleLock-PT-p3s1-LTLFireability-03
FORMULA_NAME DoubleLock-PT-p3s1-LTLFireability-04
FORMULA_NAME DoubleLock-PT-p3s1-LTLFireability-05
FORMULA_NAME DoubleLock-PT-p3s1-LTLFireability-06
FORMULA_NAME DoubleLock-PT-p3s1-LTLFireability-07
FORMULA_NAME DoubleLock-PT-p3s1-LTLFireability-08
FORMULA_NAME DoubleLock-PT-p3s1-LTLFireability-09
FORMULA_NAME DoubleLock-PT-p3s1-LTLFireability-10
FORMULA_NAME DoubleLock-PT-p3s1-LTLFireability-11
FORMULA_NAME DoubleLock-PT-p3s1-LTLFireability-12
FORMULA_NAME DoubleLock-PT-p3s1-LTLFireability-13
FORMULA_NAME DoubleLock-PT-p3s1-LTLFireability-14
FORMULA_NAME DoubleLock-PT-p3s1-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1717062549981

FORMULA DoubleLock-PT-p3s1-LTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p3s1-LTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1717062763197

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from LTLFireability.xml
[lola][I] Rule S: 4 transitions removed,6 places removed
[lola][I] LAUNCH task # 14 (type CNST) for 13 DoubleLock-PT-p3s1-LTLFireability-03
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 14 (type CNST) for DoubleLock-PT-p3s1-LTLFireability-03
[lola][I] result : false
[lola][I] LAUNCH task # 41 (type EXCL) for 40 DoubleLock-PT-p3s1-LTLFireability-12
[lola][I] time limit : 156 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 53 (type FNDP) for 6 DoubleLock-PT-p3s1-LTLFireability-02
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 54 (type EQUN) for 6 DoubleLock-PT-p3s1-LTLFireability-02
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 60 (type EQUN) for 43 DoubleLock-PT-p3s1-LTLFireability-13
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 53 (type FNDP) for DoubleLock-PT-p3s1-LTLFireability-02
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][W] CANCELED task # 54 (type EQUN) for DoubleLock-PT-p3s1-LTLFireability-02 (obsolete)
[lola][I] FINISHED task # 54 (type EQUN) for DoubleLock-PT-p3s1-LTLFireability-02
[lola][I] result : unknown
[lola][I] FINISHED task # 60 (type EQUN) for DoubleLock-PT-p3s1-LTLFireability-13
[lola][I] result : unknown
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 5/257 18/2000 DoubleLock-PT-p3s1-LTLFireability-12 2623033 m, 524606 m/sec, 2623032 t fired, .
[lola][.]
[lola][.] Time elapsed: 5 secs. Pages in use: 18
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 10/257 34/2000 DoubleLock-PT-p3s1-LTLFireability-12 5214220 m, 518237 m/sec, 5214219 t fired, .
[lola][.]
[lola][.] Time elapsed: 10 secs. Pages in use: 34
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 15/257 51/2000 DoubleLock-PT-p3s1-LTLFireability-12 7787113 m, 514578 m/sec, 7787112 t fired, .
[lola][.]
[lola][.] Time elapsed: 15 secs. Pages in use: 51
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 20/257 68/2000 DoubleLock-PT-p3s1-LTLFireability-12 10343452 m, 511267 m/sec, 10343451 t fired, .
[lola][.]
[lola][.] Time elapsed: 20 secs. Pages in use: 68
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 25/257 84/2000 DoubleLock-PT-p3s1-LTLFireability-12 12905969 m, 512503 m/sec, 12905969 t fired, .
[lola][.]
[lola][.] Time elapsed: 25 secs. Pages in use: 84
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 30/257 101/2000 DoubleLock-PT-p3s1-LTLFireability-12 15440692 m, 506944 m/sec, 15440691 t fired, .
[lola][.]
[lola][.] Time elapsed: 30 secs. Pages in use: 101
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 35/257 117/2000 DoubleLock-PT-p3s1-LTLFireability-12 17965784 m, 505018 m/sec, 17965783 t fired, .
[lola][.]
[lola][.] Time elapsed: 35 secs. Pages in use: 117
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 40/257 133/2000 DoubleLock-PT-p3s1-LTLFireability-12 20470063 m, 500855 m/sec, 20470063 t fired, .
[lola][.]
[lola][.] Time elapsed: 40 secs. Pages in use: 133
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 45/257 150/2000 DoubleLock-PT-p3s1-LTLFireability-12 22977010 m, 501389 m/sec, 22977010 t fired, .
[lola][.]
[lola][.] Time elapsed: 45 secs. Pages in use: 150
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 50/257 166/2000 DoubleLock-PT-p3s1-LTLFireability-12 25485415 m, 501681 m/sec, 25485414 t fired, .
[lola][.]
[lola][.] Time elapsed: 50 secs. Pages in use: 166
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 55/257 182/2000 DoubleLock-PT-p3s1-LTLFireability-12 27986219 m, 500160 m/sec, 27986219 t fired, .
[lola][.]
[lola][.] Time elapsed: 55 secs. Pages in use: 182
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 60/257 198/2000 DoubleLock-PT-p3s1-LTLFireability-12 30476118 m, 497979 m/sec, 30476117 t fired, .
[lola][.]
[lola][.] Time elapsed: 60 secs. Pages in use: 198
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 65/257 214/2000 DoubleLock-PT-p3s1-LTLFireability-12 32947261 m, 494228 m/sec, 32947261 t fired, .
[lola][.]
[lola][.] Time elapsed: 65 secs. Pages in use: 214
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 70/257 230/2000 DoubleLock-PT-p3s1-LTLFireability-12 35369496 m, 484447 m/sec, 35369496 t fired, .
[lola][.]
[lola][.] Time elapsed: 70 secs. Pages in use: 230
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 75/257 246/2000 DoubleLock-PT-p3s1-LTLFireability-12 37862033 m, 498507 m/sec, 37862033 t fired, .
[lola][.]
[lola][.] Time elapsed: 75 secs. Pages in use: 246
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 80/257 262/2000 DoubleLock-PT-p3s1-LTLFireability-12 40360599 m, 499713 m/sec, 40360598 t fired, .
[lola][.]
[lola][.] Time elapsed: 80 secs. Pages in use: 262
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 85/257 278/2000 DoubleLock-PT-p3s1-LTLFireability-12 42852443 m, 498368 m/sec, 42852442 t fired, .
[lola][.]
[lola][.] Time elapsed: 85 secs. Pages in use: 278
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 90/257 295/2000 DoubleLock-PT-p3s1-LTLFireability-12 45338304 m, 497172 m/sec, 45338304 t fired, .
[lola][.]
[lola][.] Time elapsed: 90 secs. Pages in use: 295
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 95/257 311/2000 DoubleLock-PT-p3s1-LTLFireability-12 47831721 m, 498683 m/sec, 47831721 t fired, .
[lola][.]
[lola][.] Time elapsed: 95 secs. Pages in use: 311
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 100/257 327/2000 DoubleLock-PT-p3s1-LTLFireability-12 50310556 m, 495767 m/sec, 50310556 t fired, .
[lola][.]
[lola][.] Time elapsed: 100 secs. Pages in use: 327
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 105/257 343/2000 DoubleLock-PT-p3s1-LTLFireability-12 52781461 m, 494181 m/sec, 52781461 t fired, .
[lola][.]
[lola][.] Time elapsed: 105 secs. Pages in use: 343
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 110/257 359/2000 DoubleLock-PT-p3s1-LTLFireability-12 55242936 m, 492295 m/sec, 55242936 t fired, .
[lola][.]
[lola][.] Time elapsed: 110 secs. Pages in use: 359
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 115/257 375/2000 DoubleLock-PT-p3s1-LTLFireability-12 57719292 m, 495271 m/sec, 57719291 t fired, .
[lola][.]
[lola][.] Time elapsed: 115 secs. Pages in use: 375
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 120/257 391/2000 DoubleLock-PT-p3s1-LTLFireability-12 60177285 m, 491598 m/sec, 60177284 t fired, .
[lola][.]
[lola][.] Time elapsed: 120 secs. Pages in use: 391
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 125/257 407/2000 DoubleLock-PT-p3s1-LTLFireability-12 62642311 m, 493005 m/sec, 62642311 t fired, .
[lola][.]
[lola][.] Time elapsed: 125 secs. Pages in use: 407
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 130/257 423/2000 DoubleLock-PT-p3s1-LTLFireability-12 65084480 m, 488433 m/sec, 65084479 t fired, .
[lola][.]
[lola][.] Time elapsed: 130 secs. Pages in use: 423
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 135/257 438/2000 DoubleLock-PT-p3s1-LTLFireability-12 67512199 m, 485543 m/sec, 67512199 t fired, .
[lola][.]
[lola][.] Time elapsed: 135 secs. Pages in use: 438
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 140/257 454/2000 DoubleLock-PT-p3s1-LTLFireability-12 69934498 m, 484459 m/sec, 69934497 t fired, .
[lola][.]
[lola][.] Time elapsed: 140 secs. Pages in use: 454
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 145/257 470/2000 DoubleLock-PT-p3s1-LTLFireability-12 72365347 m, 486169 m/sec, 72365346 t fired, .
[lola][.]
[lola][.] Time elapsed: 145 secs. Pages in use: 470
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 150/257 485/2000 DoubleLock-PT-p3s1-LTLFireability-12 74759289 m, 478788 m/sec, 74759289 t fired, .
[lola][.]
[lola][.] Time elapsed: 150 secs. Pages in use: 485
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 155/257 501/2000 DoubleLock-PT-p3s1-LTLFireability-12 77170880 m, 482318 m/sec, 77170879 t fired, .
[lola][.]
[lola][.] Time elapsed: 155 secs. Pages in use: 501
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 160/257 517/2000 DoubleLock-PT-p3s1-LTLFireability-12 79586981 m, 483220 m/sec, 79586981 t fired, .
[lola][.]
[lola][.] Time elapsed: 160 secs. Pages in use: 517
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 165/257 532/2000 DoubleLock-PT-p3s1-LTLFireability-12 81985469 m, 479697 m/sec, 81985469 t fired, .
[lola][.]
[lola][.] Time elapsed: 165 secs. Pages in use: 532
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 170/257 548/2000 DoubleLock-PT-p3s1-LTLFireability-12 84393710 m, 481648 m/sec, 84393710 t fired, .
[lola][.]
[lola][.] Time elapsed: 170 secs. Pages in use: 548
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 175/257 563/2000 DoubleLock-PT-p3s1-LTLFireability-12 86789275 m, 479113 m/sec, 86789274 t fired, .
[lola][.]
[lola][.] Time elapsed: 175 secs. Pages in use: 563
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 180/257 579/2000 DoubleLock-PT-p3s1-LTLFireability-12 89204620 m, 483069 m/sec, 89204619 t fired, .
[lola][.]
[lola][.] Time elapsed: 180 secs. Pages in use: 579
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 185/257 595/2000 DoubleLock-PT-p3s1-LTLFireability-12 91640602 m, 487196 m/sec, 91640601 t fired, .
[lola][.]
[lola][.] Time elapsed: 185 secs. Pages in use: 595
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 190/257 611/2000 DoubleLock-PT-p3s1-LTLFireability-12 94062141 m, 484307 m/sec, 94062141 t fired, .
[lola][.]
[lola][.] Time elapsed: 190 secs. Pages in use: 611
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 195/257 626/2000 DoubleLock-PT-p3s1-LTLFireability-12 96454563 m, 478484 m/sec, 96454563 t fired, .
[lola][.]
[lola][.] Time elapsed: 195 secs. Pages in use: 626
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 200/257 641/2000 DoubleLock-PT-p3s1-LTLFireability-12 98819618 m, 473011 m/sec, 98819618 t fired, .
[lola][.]
[lola][.] Time elapsed: 200 secs. Pages in use: 641
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 205/257 657/2000 DoubleLock-PT-p3s1-LTLFireability-12 101190960 m, 474268 m/sec, 101190959 t fired, .
[lola][.]
[lola][.] Time elapsed: 205 secs. Pages in use: 657
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DoubleLock-PT-p3s1-LTLFireability-02: CONJ false findpath
[lola][.] DoubleLock-PT-p3s1-LTLFireability-03: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DoubleLock-PT-p3s1-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-13: F 0 1 0 0 2 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DoubleLock-PT-p3s1-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 41 LTL EXCL 210/257 672/2000 DoubleLock-PT-p3s1-LTLFireability-12 103539447 m, 469697 m/sec, 103539447 t fired, .
[lola][.]
[lola][.] Time elapsed: 210 secs. Pages in use: 672
[lola][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 417 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DoubleLock-PT-p3s1"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is DoubleLock-PT-p3s1, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r137-tall-171631134700628"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DoubleLock-PT-p3s1.tgz
mv DoubleLock-PT-p3s1 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;