About the Execution of LoLA for DoubleLock-PT-p3s1
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
16207.483 | 229048.00 | 229072.00 | 632.50 | ?????T?TF??FTF?? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r137-tall-171631134700625.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is DoubleLock-PT-p3s1, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r137-tall-171631134700625
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 568K
-rw-r--r-- 1 mcc users 7.3K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 85K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K Apr 22 14:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Apr 22 14:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 19 07:17 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 19 18:16 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Apr 12 13:18 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 172K Apr 12 13:18 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Apr 12 13:17 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 105K Apr 12 13:17 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K May 19 07:11 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 19 15:25 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 39K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-2024-00
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-2024-01
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-2024-02
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-2024-03
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-2024-04
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-2024-05
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-2024-06
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-2024-07
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-2024-08
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-2024-09
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-2024-10
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-2024-11
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-2023-12
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-2023-13
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-2023-14
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-2023-15
=== Now, execution of the tool begins
BK_START 1717062055264
FORMULA DoubleLock-PT-p3s1-CTLCardinality-2023-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p3s1-CTLCardinality-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p3s1-CTLCardinality-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p3s1-CTLCardinality-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p3s1-CTLCardinality-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p3s1-CTLCardinality-2023-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717062284312
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLCardinality.xml[0m
[[35mlola[0m][I] Rule S: 4 transitions removed,6 places removed
[[35mlola[0m][I] LAUNCH task # 37 (type EXCL) for 36 DoubleLock-PT-p3s1-CTLCardinality-2023-12
[[35mlola[0m][I] time limit : 138 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 37 (type EXCL) for DoubleLock-PT-p3s1-CTLCardinality-2023-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 24
[[35mlola[0m][I] fired transitions : 24
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 25 (type CNST) for 24 DoubleLock-PT-p3s1-CTLCardinality-2024-08
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 34 (type CNST) for 33 DoubleLock-PT-p3s1-CTLCardinality-2024-11
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 25 (type CNST) for DoubleLock-PT-p3s1-CTLCardinality-2024-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 22 (type CNST) for 21 DoubleLock-PT-p3s1-CTLCardinality-2024-07
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 34 (type CNST) for DoubleLock-PT-p3s1-CTLCardinality-2024-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 22 (type CNST) for DoubleLock-PT-p3s1-CTLCardinality-2024-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 16 (type EXCL) for 15 DoubleLock-PT-p3s1-CTLCardinality-2024-05
[[35mlola[0m][I] time limit : 224 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 16 (type EXCL) for DoubleLock-PT-p3s1-CTLCardinality-2024-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 28 (type EXCL) for 27 DoubleLock-PT-p3s1-CTLCardinality-2024-09
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 55 (type EQUN) for 3 DoubleLock-PT-p3s1-CTLCardinality-2024-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 57 (type EQUN) for 3 DoubleLock-PT-p3s1-CTLCardinality-2024-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 40 (type CNST) for 39 DoubleLock-PT-p3s1-CTLCardinality-2023-13
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 40 (type CNST) for DoubleLock-PT-p3s1-CTLCardinality-2023-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 55 (type EQUN) for DoubleLock-PT-p3s1-CTLCardinality-2024-01
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 57 (type EQUN) for DoubleLock-PT-p3s1-CTLCardinality-2024-01
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 5/326 15/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 3476774 m, 695354 m/sec, 4319624 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 9 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 10/326 29/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 6836459 m, 671937 m/sec, 8493784 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 14 secs. Pages in use: 29
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 15/326 43/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 10295285 m, 691765 m/sec, 12791107 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 19 secs. Pages in use: 43
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 20/326 57/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 13647106 m, 670364 m/sec, 16955491 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 24 secs. Pages in use: 57
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 25/326 70/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 17033309 m, 677240 m/sec, 21162591 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 29 secs. Pages in use: 70
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 30/326 84/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 20395017 m, 672341 m/sec, 25339259 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 34 secs. Pages in use: 84
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 35/326 98/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 23712402 m, 663477 m/sec, 29460864 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 39 secs. Pages in use: 98
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 40/326 111/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 27046950 m, 666909 m/sec, 33603781 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 44 secs. Pages in use: 111
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 45/326 125/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 30325040 m, 655618 m/sec, 37676560 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 49 secs. Pages in use: 125
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 50/326 138/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 33573958 m, 649783 m/sec, 41713095 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 54 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 55/326 151/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 36784649 m, 642138 m/sec, 45702135 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 59 secs. Pages in use: 151
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 60/326 165/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 39994404 m, 641951 m/sec, 49690013 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 64 secs. Pages in use: 165
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 65/326 178/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 43181007 m, 637320 m/sec, 53649125 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 69 secs. Pages in use: 178
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 70/326 191/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 46406182 m, 645035 m/sec, 57656161 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 74 secs. Pages in use: 191
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 75/326 204/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 49645602 m, 647884 m/sec, 61680901 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 79 secs. Pages in use: 204
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 80/326 218/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 52885321 m, 647943 m/sec, 65706000 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 84 secs. Pages in use: 218
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 85/326 231/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 56126589 m, 648253 m/sec, 69733030 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 89 secs. Pages in use: 231
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 90/326 244/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 59386731 m, 652028 m/sec, 73783509 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 94 secs. Pages in use: 244
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 95/326 258/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 62644893 m, 651632 m/sec, 77831529 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 99 secs. Pages in use: 258
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 100/326 271/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 65898201 m, 650661 m/sec, 81873518 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 104 secs. Pages in use: 271
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 105/326 284/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 69133470 m, 647053 m/sec, 85893095 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 109 secs. Pages in use: 284
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 110/326 298/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 72419844 m, 657274 m/sec, 89976166 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 114 secs. Pages in use: 298
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 115/326 311/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 75664092 m, 648849 m/sec, 94006897 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 119 secs. Pages in use: 311
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 120/326 324/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 78919017 m, 650985 m/sec, 98050894 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 124 secs. Pages in use: 324
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 125/326 338/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 82150450 m, 646286 m/sec, 102065706 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 129 secs. Pages in use: 338
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 130/326 351/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 85396728 m, 649255 m/sec, 106098960 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 134 secs. Pages in use: 351
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 135/326 364/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 88647327 m, 650119 m/sec, 110137585 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 139 secs. Pages in use: 364
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 140/326 377/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 91866002 m, 643735 m/sec, 114136543 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 144 secs. Pages in use: 377
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 145/326 391/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 95062407 m, 639281 m/sec, 118107834 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 149 secs. Pages in use: 391
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 150/326 404/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 98276301 m, 642778 m/sec, 122100854 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 154 secs. Pages in use: 404
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 155/326 417/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 101475332 m, 639806 m/sec, 126075408 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 159 secs. Pages in use: 417
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 160/326 430/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 104685898 m, 642113 m/sec, 130064293 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 164 secs. Pages in use: 430
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 165/326 443/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 107897451 m, 642310 m/sec, 134054404 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 169 secs. Pages in use: 443
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 170/326 456/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 111115418 m, 643593 m/sec, 138052484 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 174 secs. Pages in use: 456
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 175/326 470/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 114327627 m, 642441 m/sec, 142043411 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 179 secs. Pages in use: 470
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 180/326 483/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 117513492 m, 637173 m/sec, 146001607 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 184 secs. Pages in use: 483
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 185/326 496/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 120704634 m, 638228 m/sec, 149966359 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 189 secs. Pages in use: 496
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 190/326 509/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 123924451 m, 643963 m/sec, 153966737 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 194 secs. Pages in use: 509
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 195/326 522/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 127113700 m, 637849 m/sec, 157929137 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 199 secs. Pages in use: 522
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 200/326 535/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 130304289 m, 638117 m/sec, 161893209 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 204 secs. Pages in use: 535
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 205/326 548/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 133505432 m, 640228 m/sec, 165870380 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 209 secs. Pages in use: 548
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 210/326 561/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 136692515 m, 637416 m/sec, 169830090 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 214 secs. Pages in use: 561
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 215/326 575/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 139900090 m, 641515 m/sec, 173815259 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 219 secs. Pages in use: 575
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p3s1-CTLCardinality-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p3s1-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-01: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-14: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p3s1-CTLCardinality-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 28 CTL EXCL 222/326 580/2000 DoubleLock-PT-p3s1-CTLCardinality-2024-09 141202905 m, 260563 m/sec, 175433906 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 226 secs. Pages in use: 580
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 399 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DoubleLock-PT-p3s1"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is DoubleLock-PT-p3s1, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r137-tall-171631134700625"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DoubleLock-PT-p3s1.tgz
mv DoubleLock-PT-p3s1 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;