About the Execution of LoLA for DoubleLock-PT-p1s3
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
16208.651 | 1810486.00 | 1803086.00 | 5475.10 | T??FTT?FF?F??T?T | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r137-tall-171631134600601.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
....................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is DoubleLock-PT-p1s3, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r137-tall-171631134600601
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 3.8M
-rw-r--r-- 1 mcc users 8.2K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 95K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.8K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 40K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.0K May 19 07:09 LTLCardinality.txt
-rw-r--r-- 1 mcc users 19K May 19 15:48 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 19 07:17 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 19 18:16 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Apr 12 13:39 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 118K Apr 12 13:39 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 10K May 14 13:22 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 89K May 14 13:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K May 19 07:11 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 19 15:25 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 3.4M May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DoubleLock-PT-p1s3-CTLCardinality-2024-00
FORMULA_NAME DoubleLock-PT-p1s3-CTLCardinality-2024-01
FORMULA_NAME DoubleLock-PT-p1s3-CTLCardinality-2024-02
FORMULA_NAME DoubleLock-PT-p1s3-CTLCardinality-2024-03
FORMULA_NAME DoubleLock-PT-p1s3-CTLCardinality-2024-04
FORMULA_NAME DoubleLock-PT-p1s3-CTLCardinality-2024-05
FORMULA_NAME DoubleLock-PT-p1s3-CTLCardinality-2024-06
FORMULA_NAME DoubleLock-PT-p1s3-CTLCardinality-2024-07
FORMULA_NAME DoubleLock-PT-p1s3-CTLCardinality-2024-08
FORMULA_NAME DoubleLock-PT-p1s3-CTLCardinality-2024-09
FORMULA_NAME DoubleLock-PT-p1s3-CTLCardinality-2024-10
FORMULA_NAME DoubleLock-PT-p1s3-CTLCardinality-2024-11
FORMULA_NAME DoubleLock-PT-p1s3-CTLCardinality-2023-12
FORMULA_NAME DoubleLock-PT-p1s3-CTLCardinality-2023-13
FORMULA_NAME DoubleLock-PT-p1s3-CTLCardinality-2023-14
FORMULA_NAME DoubleLock-PT-p1s3-CTLCardinality-2023-15
=== Now, execution of the tool begins
BK_START 1717057723167
FORMULA DoubleLock-PT-p1s3-CTLCardinality-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p1s3-CTLCardinality-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p1s3-CTLCardinality-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p1s3-CTLCardinality-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p1s3-CTLCardinality-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p1s3-CTLCardinality-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p1s3-CTLCardinality-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p1s3-CTLCardinality-2023-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p1s3-CTLCardinality-2023-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717059533653
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLCardinality.xml[0m
[[35mlola[0m][I] Rule S: 256 transitions removed,132 places removed
[[35mlola[0m][I] LAUNCH task # 1 (type CNST) for 0 DoubleLock-PT-p1s3-CTLCardinality-2024-00
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 1 (type CNST) for DoubleLock-PT-p1s3-CTLCardinality-2024-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 10 (type CNST) for 9 DoubleLock-PT-p1s3-CTLCardinality-2024-03
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 10 (type CNST) for DoubleLock-PT-p1s3-CTLCardinality-2024-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 25 (type CNST) for 24 DoubleLock-PT-p1s3-CTLCardinality-2024-08
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 13 (type CNST) for 12 DoubleLock-PT-p1s3-CTLCardinality-2024-04
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 22 (type CNST) for 21 DoubleLock-PT-p1s3-CTLCardinality-2024-07
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 25 (type CNST) for DoubleLock-PT-p1s3-CTLCardinality-2024-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 16 (type CNST) for 15 DoubleLock-PT-p1s3-CTLCardinality-2024-05
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 13 (type CNST) for DoubleLock-PT-p1s3-CTLCardinality-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 31 (type CNST) for 30 DoubleLock-PT-p1s3-CTLCardinality-2024-10
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 16 (type CNST) for DoubleLock-PT-p1s3-CTLCardinality-2024-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 46 (type CNST) for 45 DoubleLock-PT-p1s3-CTLCardinality-2023-15
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 22 (type CNST) for DoubleLock-PT-p1s3-CTLCardinality-2024-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 46 (type CNST) for DoubleLock-PT-p1s3-CTLCardinality-2023-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 31 (type CNST) for DoubleLock-PT-p1s3-CTLCardinality-2024-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 276 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 40 (type EXCL) for 39 DoubleLock-PT-p1s3-CTLCardinality-2023-13
[[35mlola[0m][I] time limit : 415 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 51 (type EQUN) for 33 DoubleLock-PT-p1s3-CTLCardinality-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 40 (type EXCL) for DoubleLock-PT-p1s3-CTLCardinality-2023-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 292
[[35mlola[0m][I] fired transitions : 325
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 43 (type EXCL) for 42 DoubleLock-PT-p1s3-CTLCardinality-2023-14
[[35mlola[0m][I] time limit : 474 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 56 (type EQUN) for 6 DoubleLock-PT-p1s3-CTLCardinality-2024-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 58 (type EQUN) for 6 DoubleLock-PT-p1s3-CTLCardinality-2024-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 56 (type EQUN) for DoubleLock-PT-p1s3-CTLCardinality-2024-02
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 58 (type EQUN) for DoubleLock-PT-p1s3-CTLCardinality-2024-02
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 2/474 1/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 88083 m, 17616 m/sec, 356953 t fired, .
[[35mlola[0m][.] 51 EF STEQ 2/3321 0/5 DoubleLock-PT-p1s3-CTLCardinality-2024-11 sara not yet started (preprocessing).
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 281 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 7/474 2/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 300010 m, 42385 m/sec, 1136195 t fired, .
[[35mlola[0m][.] 51 EF STEQ 7/3321 0/5 DoubleLock-PT-p1s3-CTLCardinality-2024-11 sara not yet started (preprocessing).
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 286 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 12/474 4/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 524991 m, 44996 m/sec, 1886136 t fired, .
[[35mlola[0m][.] 51 EF STEQ 12/3321 0/5 DoubleLock-PT-p1s3-CTLCardinality-2024-11 sara not yet started (preprocessing).
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 291 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 51 (type EQUN) for DoubleLock-PT-p1s3-CTLCardinality-2024-11
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 17/474 5/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 749567 m, 44915 m/sec, 2634723 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 296 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 22/474 7/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 973860 m, 44858 m/sec, 3382362 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 301 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 27/474 8/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 1198026 m, 44833 m/sec, 4129586 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 306 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 32/474 10/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 1422276 m, 44850 m/sec, 4877082 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 311 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 37/474 11/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 1645581 m, 44661 m/sec, 5621435 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 316 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 42/474 12/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 1868458 m, 44575 m/sec, 6364355 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 321 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 47/474 14/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 2098034 m, 45915 m/sec, 7129610 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 326 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 52/474 15/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 2327800 m, 45953 m/sec, 7895498 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 331 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 57/474 17/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 2557154 m, 45870 m/sec, 8660008 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 336 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 62/474 18/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 2786827 m, 45934 m/sec, 9425587 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 341 secs. Pages in use: 18
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 67/474 20/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 3016228 m, 45880 m/sec, 10190258 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 346 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 72/474 21/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 3246031 m, 45960 m/sec, 10956268 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 351 secs. Pages in use: 21
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 77/474 23/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 3475078 m, 45809 m/sec, 11719759 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 356 secs. Pages in use: 23
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 82/474 24/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 3704317 m, 45847 m/sec, 12483888 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 361 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 87/474 26/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 3933163 m, 45769 m/sec, 13246709 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 366 secs. Pages in use: 26
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 92/474 27/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 4161765 m, 45720 m/sec, 14008710 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 371 secs. Pages in use: 27
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 97/474 28/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 4390464 m, 45739 m/sec, 14771047 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 376 secs. Pages in use: 28
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 102/474 30/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 4619553 m, 45817 m/sec, 15534677 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 381 secs. Pages in use: 30
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 107/474 31/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 4848243 m, 45738 m/sec, 16296977 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 386 secs. Pages in use: 31
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 112/474 33/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 5076906 m, 45732 m/sec, 17059182 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 391 secs. Pages in use: 33
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 117/474 34/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 5305620 m, 45742 m/sec, 17821565 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 396 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 122/474 36/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 5533365 m, 45549 m/sec, 18580716 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 401 secs. Pages in use: 36
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 127/474 37/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 5761840 m, 45695 m/sec, 19342295 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 406 secs. Pages in use: 37
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 132/474 39/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 5991414 m, 45914 m/sec, 20107542 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 411 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 137/474 40/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 6220676 m, 45852 m/sec, 20871754 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 416 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 142/474 42/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 6449614 m, 45787 m/sec, 21634876 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 421 secs. Pages in use: 42
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 147/474 43/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 6678378 m, 45752 m/sec, 22397422 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 426 secs. Pages in use: 43
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 152/474 45/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 6906640 m, 45652 m/sec, 23158298 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 431 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 157/474 46/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 7135109 m, 45693 m/sec, 23919860 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 436 secs. Pages in use: 46
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 162/474 47/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 7363999 m, 45778 m/sec, 24682830 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 441 secs. Pages in use: 47
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 167/474 49/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 7592403 m, 45680 m/sec, 25444174 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 446 secs. Pages in use: 49
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 172/474 50/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 7820469 m, 45613 m/sec, 26204390 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 451 secs. Pages in use: 50
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 177/474 52/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 8048372 m, 45580 m/sec, 26964072 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 456 secs. Pages in use: 52
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 182/474 53/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 8275980 m, 45521 m/sec, 27722760 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 461 secs. Pages in use: 53
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 187/474 55/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 8504000 m, 45604 m/sec, 28482829 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 466 secs. Pages in use: 55
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 192/474 56/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 8733119 m, 45823 m/sec, 29246562 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 471 secs. Pages in use: 56
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 197/474 58/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 8961519 m, 45680 m/sec, 30007895 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 476 secs. Pages in use: 58
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 202/474 59/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 9190002 m, 45696 m/sec, 30769502 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 481 secs. Pages in use: 59
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 207/474 61/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 9418261 m, 45651 m/sec, 31530368 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 486 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 212/474 62/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 9646152 m, 45578 m/sec, 32290004 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 491 secs. Pages in use: 62
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 217/474 63/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 9874043 m, 45578 m/sec, 33049640 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 496 secs. Pages in use: 63
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 222/474 65/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 10102458 m, 45683 m/sec, 33811024 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 501 secs. Pages in use: 65
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 227/474 66/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 10329806 m, 45469 m/sec, 34568851 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 506 secs. Pages in use: 66
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 232/474 68/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 10556851 m, 45409 m/sec, 35325665 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 511 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 237/474 69/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 10784351 m, 45500 m/sec, 36084000 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 516 secs. Pages in use: 69
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 242/474 71/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 11011372 m, 45404 m/sec, 36840738 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 521 secs. Pages in use: 71
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 247/474 72/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 11238220 m, 45369 m/sec, 37596896 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 526 secs. Pages in use: 72
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 252/474 74/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 11466350 m, 45626 m/sec, 38357332 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 531 secs. Pages in use: 74
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 257/474 75/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 11693966 m, 45523 m/sec, 39116051 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 536 secs. Pages in use: 75
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 262/474 76/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 11920779 m, 45362 m/sec, 39872092 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 541 secs. Pages in use: 76
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 267/474 78/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 12148039 m, 45452 m/sec, 40629628 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 546 secs. Pages in use: 78
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 272/474 79/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 12375454 m, 45483 m/sec, 41387675 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 551 secs. Pages in use: 79
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 277/474 81/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 12602428 m, 45394 m/sec, 42144258 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 556 secs. Pages in use: 81
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 282/474 82/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 12830151 m, 45544 m/sec, 42903334 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 561 secs. Pages in use: 82
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 287/474 84/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 13057129 m, 45395 m/sec, 43659926 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 567 secs. Pages in use: 84
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 293/474 85/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 13283723 m, 45318 m/sec, 44415237 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 572 secs. Pages in use: 85
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 298/474 87/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 13510521 m, 45359 m/sec, 45171232 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 577 secs. Pages in use: 87
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 303/474 88/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 13737341 m, 45364 m/sec, 45927300 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 582 secs. Pages in use: 88
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 308/474 90/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 13963709 m, 45273 m/sec, 46681859 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 587 secs. Pages in use: 90
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 313/474 91/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 14191581 m, 45574 m/sec, 47441435 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 592 secs. Pages in use: 91
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 318/474 92/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 14418608 m, 45405 m/sec, 48198190 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 597 secs. Pages in use: 92
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 323/474 94/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 14645089 m, 45296 m/sec, 48953124 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 602 secs. Pages in use: 94
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 328/474 95/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 14868914 m, 44765 m/sec, 49699210 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 607 secs. Pages in use: 95
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 333/474 97/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 15092798 m, 44776 m/sec, 50445494 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 612 secs. Pages in use: 97
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 338/474 98/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 15319405 m, 45321 m/sec, 51200847 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 617 secs. Pages in use: 98
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 343/474 100/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 15546915 m, 45502 m/sec, 51959212 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 622 secs. Pages in use: 100
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 348/474 101/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 15773869 m, 45390 m/sec, 52715730 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 627 secs. Pages in use: 101
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 353/474 102/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 15994595 m, 44145 m/sec, 53451480 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 632 secs. Pages in use: 102
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 358/474 104/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 16215164 m, 44113 m/sec, 54186715 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 637 secs. Pages in use: 104
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 363/474 105/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 16435702 m, 44107 m/sec, 54921836 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 642 secs. Pages in use: 105
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 368/474 107/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 16660935 m, 45046 m/sec, 55672616 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 647 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 373/474 108/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 16886565 m, 45126 m/sec, 56424712 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 652 secs. Pages in use: 108
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 378/474 110/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 17109462 m, 44579 m/sec, 57167700 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 657 secs. Pages in use: 110
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 383/474 111/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 17337340 m, 45575 m/sec, 57927299 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 662 secs. Pages in use: 111
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 388/474 112/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 17565088 m, 45549 m/sec, 58686460 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 667 secs. Pages in use: 112
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 393/474 114/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 17792656 m, 45513 m/sec, 59445016 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 672 secs. Pages in use: 114
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 398/474 115/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 18019755 m, 45419 m/sec, 60202014 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 677 secs. Pages in use: 115
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 403/474 117/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 18247289 m, 45506 m/sec, 60960460 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 682 secs. Pages in use: 117
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 408/474 118/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 18475030 m, 45548 m/sec, 61719595 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 687 secs. Pages in use: 118
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 413/474 120/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 18702275 m, 45449 m/sec, 62477080 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 692 secs. Pages in use: 120
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 418/474 121/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 18930803 m, 45705 m/sec, 63238844 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 697 secs. Pages in use: 121
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 423/474 123/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 19159108 m, 45661 m/sec, 63999856 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 702 secs. Pages in use: 123
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 428/474 124/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 19386222 m, 45422 m/sec, 64756904 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 707 secs. Pages in use: 124
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 433/474 126/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 19610206 m, 44796 m/sec, 65503516 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 712 secs. Pages in use: 126
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 438/474 127/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 19836176 m, 45194 m/sec, 66256754 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 717 secs. Pages in use: 127
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 443/474 128/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 20056956 m, 44156 m/sec, 66992683 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 722 secs. Pages in use: 128
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 448/474 130/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 20277769 m, 44162 m/sec, 67728727 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 727 secs. Pages in use: 130
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 453/474 131/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 20498377 m, 44121 m/sec, 68464084 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 732 secs. Pages in use: 131
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 458/474 133/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 20717890 m, 43902 m/sec, 69195794 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 737 secs. Pages in use: 133
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 463/474 134/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 20937044 m, 43830 m/sec, 69926310 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 742 secs. Pages in use: 134
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 468/474 135/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 21156867 m, 43964 m/sec, 70659055 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 747 secs. Pages in use: 135
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 473/474 137/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-14 21376753 m, 43977 m/sec, 71392008 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 752 secs. Pages in use: 137
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 43 (type EXCL) for DoubleLock-PT-p1s3-CTLCardinality-2023-14 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 757 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 37 (type EXCL) for 36 DoubleLock-PT-p1s3-CTLCardinality-2023-12
[[35mlola[0m][I] time limit : 473 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 43 (type EXCL) for 42 DoubleLock-PT-p1s3-CTLCardinality-2023-14
[[35mlola[0m][I] time limit : 2843 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 5/473 3/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 428928 m, 85785 m/sec, 440965 t fired, .
[[35mlola[0m][.] 43 CTL EXCL 5/2843 2/5 DoubleLock-PT-p1s3-CTLCardinality-2023-14 190976 m, -4237155 m/sec, 770179 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 762 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 10/473 6/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 902484 m, 94711 m/sec, 927813 t fired, .
[[35mlola[0m][.] 43 CTL EXCL 10/406 3/5 DoubleLock-PT-p1s3-CTLCardinality-2023-14 428101 m, 47425 m/sec, 1563170 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 767 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 15/473 9/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 1364229 m, 92349 m/sec, 1402521 t fired, .
[[35mlola[0m][.] 43 CTL EXCL 15/406 5/5 DoubleLock-PT-p1s3-CTLCardinality-2023-14 664454 m, 47270 m/sec, 2351014 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 772 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 43 (type EXCL) for DoubleLock-PT-p1s3-CTLCardinality-2023-14 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 20/473 12/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 1824559 m, 92066 m/sec, 1875771 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 777 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 25/473 15/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 2288152 m, 92718 m/sec, 2352378 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 782 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 30/473 18/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 2750562 m, 92482 m/sec, 2827767 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 787 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 35/473 21/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 3213310 m, 92549 m/sec, 3303505 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 792 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 40/473 24/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 3677396 m, 92817 m/sec, 3780618 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 797 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 45/473 27/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 4140449 m, 92610 m/sec, 4256669 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 802 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 50/473 30/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 4604340 m, 92778 m/sec, 4733581 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 807 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 55/473 33/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 5067066 m, 92545 m/sec, 5209296 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 812 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 60/473 36/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 5530042 m, 92595 m/sec, 5685268 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 817 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 65/473 39/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 5992061 m, 92403 m/sec, 6160256 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 822 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 70/473 42/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 6455682 m, 92724 m/sec, 6636891 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 827 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 75/473 45/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 6918613 m, 92586 m/sec, 7112817 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 832 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 80/473 48/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 7382739 m, 92825 m/sec, 7589970 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 837 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 85/473 51/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 7846318 m, 92715 m/sec, 8066562 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 842 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 90/473 54/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 8312452 m, 93226 m/sec, 8545781 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 847 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 95/473 57/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 8780778 m, 93665 m/sec, 9027254 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 852 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 100/473 60/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 9248432 m, 93530 m/sec, 9508034 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 857 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 105/473 63/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 9717251 m, 93763 m/sec, 9990012 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 862 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 110/473 66/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 10185960 m, 93741 m/sec, 10471878 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 867 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 115/473 69/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 10654516 m, 93711 m/sec, 10953587 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 872 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 120/473 72/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 11121196 m, 93336 m/sec, 11433366 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 877 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 125/473 75/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 11588391 m, 93439 m/sec, 11913676 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 882 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 130/473 78/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 12056504 m, 93622 m/sec, 12394929 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 887 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 135/473 81/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 12524087 m, 93516 m/sec, 12875638 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 892 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 140/473 84/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 12991533 m, 93489 m/sec, 13356205 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 897 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 145/473 87/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 13459324 m, 93558 m/sec, 13837127 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 902 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 150/473 90/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 13926538 m, 93442 m/sec, 14317455 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 907 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 155/473 93/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 14394105 m, 93513 m/sec, 14798146 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 912 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 160/473 96/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 14861714 m, 93521 m/sec, 15278881 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 917 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 165/473 99/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 15329445 m, 93546 m/sec, 15759742 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 922 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 170/473 102/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 15796606 m, 93432 m/sec, 16240016 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 927 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 175/473 105/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 16263689 m, 93416 m/sec, 16720211 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 932 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 180/473 108/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 16731032 m, 93468 m/sec, 17200672 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 937 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 185/473 111/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 17197963 m, 93386 m/sec, 17680710 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 942 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 190/473 114/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 17663093 m, 93026 m/sec, 18158896 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 947 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 195/473 117/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 18127301 m, 92841 m/sec, 18636134 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 952 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 200/473 120/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 18591946 m, 92929 m/sec, 19113822 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 957 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 205/473 124/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 19061139 m, 93838 m/sec, 19596185 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 962 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 210/473 127/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 19529901 m, 93752 m/sec, 20078105 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 967 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 215/473 130/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 19998258 m, 93671 m/sec, 20559609 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 972 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 220/473 133/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 20466165 m, 93581 m/sec, 21040650 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 977 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 225/473 136/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 20933484 m, 93463 m/sec, 21521087 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 982 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 230/473 139/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 21401179 m, 93539 m/sec, 22001910 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 987 secs. Pages in use: 139
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 235/473 142/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 21867287 m, 93221 m/sec, 22481102 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 992 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 240/473 145/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 22332819 m, 93106 m/sec, 22959702 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 997 secs. Pages in use: 145
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 245/473 148/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 22798650 m, 93166 m/sec, 23438609 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1002 secs. Pages in use: 148
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 250/473 151/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 23264047 m, 93079 m/sec, 23917069 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1007 secs. Pages in use: 151
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 255/473 154/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 23730607 m, 93312 m/sec, 24396727 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1012 secs. Pages in use: 154
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 260/473 157/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 24195796 m, 93037 m/sec, 24874973 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1017 secs. Pages in use: 157
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 265/473 160/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 24661091 m, 93059 m/sec, 25353330 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1022 secs. Pages in use: 160
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 270/473 163/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 25125760 m, 92933 m/sec, 25831041 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1027 secs. Pages in use: 163
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 275/473 166/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 25589864 m, 92820 m/sec, 26308174 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1032 secs. Pages in use: 166
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 280/473 169/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 26054431 m, 92913 m/sec, 26785780 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1037 secs. Pages in use: 169
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 285/473 172/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 26519123 m, 92938 m/sec, 27263516 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1042 secs. Pages in use: 172
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 290/473 175/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 26981686 m, 92512 m/sec, 27739063 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1047 secs. Pages in use: 175
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 295/473 178/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 27444564 m, 92575 m/sec, 28214934 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1052 secs. Pages in use: 178
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 300/473 181/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 27907848 m, 92656 m/sec, 28691223 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1057 secs. Pages in use: 181
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 305/473 184/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 28373906 m, 93211 m/sec, 29170363 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1062 secs. Pages in use: 184
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 310/473 187/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 28840568 m, 93332 m/sec, 29650124 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1067 secs. Pages in use: 187
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 315/473 190/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 29306645 m, 93215 m/sec, 30129285 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1072 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 320/473 193/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 29772381 m, 93147 m/sec, 30608094 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1077 secs. Pages in use: 193
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 325/473 196/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 30237848 m, 93093 m/sec, 31086627 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1082 secs. Pages in use: 196
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 330/473 199/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 30703745 m, 93179 m/sec, 31565601 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1087 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 335/473 202/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 31168944 m, 93039 m/sec, 32043858 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1092 secs. Pages in use: 202
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 340/473 205/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 31633472 m, 92905 m/sec, 32521426 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1097 secs. Pages in use: 205
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 345/473 208/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 32097730 m, 92851 m/sec, 32998715 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1102 secs. Pages in use: 208
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 350/473 211/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 32561100 m, 92674 m/sec, 33475093 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1107 secs. Pages in use: 211
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 355/473 214/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 33026011 m, 92982 m/sec, 33953054 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1112 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 360/473 217/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 33491712 m, 93140 m/sec, 34431828 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1117 secs. Pages in use: 217
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 365/473 220/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 33956748 m, 93007 m/sec, 34909917 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1122 secs. Pages in use: 220
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 370/473 223/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 34421763 m, 93003 m/sec, 35387984 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1127 secs. Pages in use: 223
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 375/473 226/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 34885690 m, 92785 m/sec, 35864934 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1132 secs. Pages in use: 226
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 380/473 229/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 35350373 m, 92936 m/sec, 36342661 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1137 secs. Pages in use: 229
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 385/473 232/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 35815240 m, 92973 m/sec, 36820577 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1142 secs. Pages in use: 232
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 390/473 235/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 36278814 m, 92714 m/sec, 37297163 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1147 secs. Pages in use: 235
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 395/473 238/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 36742098 m, 92656 m/sec, 37773452 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1152 secs. Pages in use: 238
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 400/473 241/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 37204816 m, 92543 m/sec, 38249158 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1157 secs. Pages in use: 241
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 405/473 244/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 37670147 m, 93066 m/sec, 38727551 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1162 secs. Pages in use: 244
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 410/473 247/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 38137242 m, 93419 m/sec, 39207758 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1167 secs. Pages in use: 247
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 415/473 250/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 38603489 m, 93249 m/sec, 39687092 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1172 secs. Pages in use: 250
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 420/473 253/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 39069833 m, 93268 m/sec, 40166526 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1177 secs. Pages in use: 253
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 425/473 256/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 39535737 m, 93180 m/sec, 40645508 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1182 secs. Pages in use: 256
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 430/473 259/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 40002024 m, 93257 m/sec, 41124884 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1187 secs. Pages in use: 259
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 435/473 262/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 40467656 m, 93126 m/sec, 41603587 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1192 secs. Pages in use: 262
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 440/473 265/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 40932451 m, 92959 m/sec, 42081428 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1197 secs. Pages in use: 265
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 445/473 268/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 41397407 m, 92991 m/sec, 42559437 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1202 secs. Pages in use: 268
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 450/473 271/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 41861159 m, 92750 m/sec, 43036206 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1207 secs. Pages in use: 271
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 455/473 274/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 42325742 m, 92916 m/sec, 43513829 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1212 secs. Pages in use: 274
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 460/473 277/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 42790608 m, 92973 m/sec, 43991744 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1217 secs. Pages in use: 277
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 465/473 280/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 43255126 m, 92903 m/sec, 44469302 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1222 secs. Pages in use: 280
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 470/473 283/2000 DoubleLock-PT-p1s3-CTLCardinality-2023-12 43720097 m, 92994 m/sec, 44947324 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1227 secs. Pages in use: 283
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 37 (type EXCL) for DoubleLock-PT-p1s3-CTLCardinality-2023-12 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1232 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 28 (type EXCL) for 27 DoubleLock-PT-p1s3-CTLCardinality-2024-09
[[35mlola[0m][I] time limit : 473 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 37 (type EXCL) for 36 DoubleLock-PT-p1s3-CTLCardinality-2023-12
[[35mlola[0m][I] time limit : 2368 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 28 (type EXCL) for DoubleLock-PT-p1s3-CTLCardinality-2024-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 5/473 4/5 DoubleLock-PT-p1s3-CTLCardinality-2023-12 467776 m, -8650464 m/sec, 480903 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1237 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 37 (type EXCL) for DoubleLock-PT-p1s3-CTLCardinality-2023-12 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-11: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1242 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 19 (type EXCL) for 18 DoubleLock-PT-p1s3-CTLCardinality-2024-06
[[35mlola[0m][I] time limit : 589 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 19 (type EXCL) for DoubleLock-PT-p1s3-CTLCardinality-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 48 (type EXCL) for 33 DoubleLock-PT-p1s3-CTLCardinality-2024-11
[[35mlola[0m][I] time limit : 786 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 48 (type EXCL) for DoubleLock-PT-p1s3-CTLCardinality-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 92
[[35mlola[0m][I] fired transitions : 92
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 53 (type EXCL) for 6 DoubleLock-PT-p1s3-CTLCardinality-2024-02
[[35mlola[0m][I] time limit : 1179 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 53 (type EXCL) for DoubleLock-PT-p1s3-CTLCardinality-2024-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 111
[[35mlola[0m][I] fired transitions : 111
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 DoubleLock-PT-p1s3-CTLCardinality-2024-01
[[35mlola[0m][I] time limit : 2358 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 5/2358 4/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 476777 m, 95355 m/sec, 535999 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1247 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 10/2358 7/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 1044912 m, 113627 m/sec, 1104133 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1252 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 15/2358 11/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 1611330 m, 113283 m/sec, 1670551 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1257 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 20/2358 14/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 2176566 m, 113047 m/sec, 2235787 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1262 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 25/2358 18/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 2741247 m, 112936 m/sec, 2800468 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1267 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 30/2358 22/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 3305547 m, 112860 m/sec, 3364768 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1272 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 35/2358 25/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 3869219 m, 112734 m/sec, 3928441 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1277 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 40/2358 29/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 4432378 m, 112631 m/sec, 4491599 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1282 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 45/2358 32/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 4995248 m, 112574 m/sec, 5054469 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1287 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 50/2358 36/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 5557076 m, 112365 m/sec, 5616298 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1292 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 55/2358 40/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 6120731 m, 112731 m/sec, 6179953 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1297 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 60/2358 43/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 6684100 m, 112673 m/sec, 6743321 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1302 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 65/2358 47/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 7246821 m, 112544 m/sec, 7306043 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1307 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 70/2358 50/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 7809370 m, 112509 m/sec, 7868592 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1312 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 75/2358 54/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 8370995 m, 112325 m/sec, 8430216 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1317 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 80/2358 57/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 8933655 m, 112532 m/sec, 8992877 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1322 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 85/2358 61/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 9495766 m, 112422 m/sec, 9554988 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1327 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 90/2358 65/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 10057344 m, 112315 m/sec, 10116566 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1332 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 95/2358 68/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 10609623 m, 110455 m/sec, 10668845 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1337 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 100/2358 72/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 11159785 m, 110032 m/sec, 11219007 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1342 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 105/2358 75/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 11712819 m, 110606 m/sec, 11772041 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1347 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 110/2358 79/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 12265226 m, 110481 m/sec, 12324447 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1352 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 115/2358 82/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 12816824 m, 110319 m/sec, 12876046 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1357 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 120/2358 86/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 13368165 m, 110268 m/sec, 13427387 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1362 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 125/2358 89/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 13919104 m, 110187 m/sec, 13978326 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1367 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 130/2358 93/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 14470604 m, 110300 m/sec, 14529825 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1372 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 135/2358 96/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 15020781 m, 110035 m/sec, 15080002 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1377 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 140/2358 100/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 15571473 m, 110138 m/sec, 15630694 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1382 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 145/2358 103/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 16121676 m, 110040 m/sec, 16180898 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1387 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 150/2358 107/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 16670238 m, 109712 m/sec, 16729460 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1392 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 155/2358 110/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 17221524 m, 110257 m/sec, 17280746 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1397 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 160/2358 114/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 17772284 m, 110152 m/sec, 17831506 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1402 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 165/2358 117/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 18322431 m, 110029 m/sec, 18381652 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1407 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 170/2358 121/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 18871471 m, 109808 m/sec, 18930692 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1412 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 175/2358 124/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 19421319 m, 109969 m/sec, 19480541 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1417 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 180/2358 128/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 19972125 m, 110161 m/sec, 20031346 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1422 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 185/2358 131/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 20522187 m, 110012 m/sec, 20581408 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1427 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 190/2358 135/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 21072610 m, 110084 m/sec, 21131831 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1432 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 195/2358 138/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 21621818 m, 109841 m/sec, 21681039 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1437 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 200/2358 142/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 22169742 m, 109584 m/sec, 22228964 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1442 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 205/2358 145/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 22722144 m, 110480 m/sec, 22781366 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1447 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 210/2358 149/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 23273207 m, 110212 m/sec, 23332429 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1452 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 215/2358 152/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 23823268 m, 110012 m/sec, 23882490 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1457 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 220/2358 156/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 24373544 m, 110055 m/sec, 24432766 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1462 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 225/2358 159/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 24923395 m, 109970 m/sec, 24982616 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1467 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 230/2358 163/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 25474563 m, 110233 m/sec, 25533785 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1472 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 235/2358 166/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 26024834 m, 110054 m/sec, 26084055 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1477 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 240/2358 170/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 26574844 m, 110002 m/sec, 26634066 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1482 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 245/2358 173/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 27124398 m, 109910 m/sec, 27183619 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1487 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 250/2358 177/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 27672973 m, 109715 m/sec, 27732194 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1492 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 255/2358 180/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 28220417 m, 109488 m/sec, 28279638 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1497 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 260/2358 184/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 28769595 m, 109835 m/sec, 28828817 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1502 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 265/2358 187/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 29317249 m, 109530 m/sec, 29376470 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1507 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 270/2358 191/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 29865151 m, 109580 m/sec, 29924372 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1512 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 275/2358 194/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 30413051 m, 109580 m/sec, 30472272 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1517 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 280/2358 198/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 30961156 m, 109621 m/sec, 31020377 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1522 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 285/2358 201/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 31509946 m, 109758 m/sec, 31569167 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1527 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 290/2358 205/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 32058029 m, 109616 m/sec, 32117251 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1532 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 295/2358 208/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 32605088 m, 109411 m/sec, 32664309 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1537 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 300/2358 212/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 33151514 m, 109285 m/sec, 33210735 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1542 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 305/2358 215/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 33699489 m, 109595 m/sec, 33758710 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1547 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 310/2358 219/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 34247828 m, 109667 m/sec, 34307049 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1552 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 315/2358 222/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 34797416 m, 109917 m/sec, 34856638 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1557 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 320/2358 226/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 35346856 m, 109888 m/sec, 35406078 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1562 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 325/2358 229/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 35895415 m, 109711 m/sec, 35954636 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1567 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 330/2358 233/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 36445131 m, 109943 m/sec, 36504352 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1572 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 335/2358 236/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 36991654 m, 109304 m/sec, 37050876 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1577 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 340/2358 240/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 37538949 m, 109459 m/sec, 37598170 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1582 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 345/2358 243/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 38086335 m, 109477 m/sec, 38145557 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1587 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 350/2358 247/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 38633938 m, 109520 m/sec, 38693160 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1592 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 355/2358 250/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 39182351 m, 109682 m/sec, 39241572 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1597 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 360/2358 254/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 39730654 m, 109660 m/sec, 39789875 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1602 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 365/2358 257/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 40278336 m, 109536 m/sec, 40337557 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1607 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 370/2358 261/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 40825711 m, 109475 m/sec, 40884932 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1612 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 375/2358 264/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 41371349 m, 109127 m/sec, 41430570 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1617 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 380/2358 268/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 41918658 m, 109461 m/sec, 41977879 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1622 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 385/2358 271/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 42457478 m, 107764 m/sec, 42516700 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1627 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 390/2358 275/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 42990677 m, 106639 m/sec, 43049899 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1632 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 395/2358 278/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 43522357 m, 106336 m/sec, 43581578 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1637 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 400/2358 281/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 44069342 m, 109397 m/sec, 44128563 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1642 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 405/2358 285/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 44619618 m, 110055 m/sec, 44678840 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1647 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 410/2358 288/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 45169091 m, 109894 m/sec, 45228312 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1652 secs. Pages in use: 288
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 415/2358 292/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 45715299 m, 109241 m/sec, 45774520 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1657 secs. Pages in use: 292
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 420/2358 295/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 46260691 m, 109078 m/sec, 46319913 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1662 secs. Pages in use: 295
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 425/2358 299/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 46804427 m, 108747 m/sec, 46863648 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1667 secs. Pages in use: 299
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 430/2358 302/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 47350584 m, 109231 m/sec, 47409806 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1672 secs. Pages in use: 302
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 435/2358 306/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 47895919 m, 109067 m/sec, 47955141 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1677 secs. Pages in use: 306
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 440/2358 309/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 48440693 m, 108954 m/sec, 48499915 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1682 secs. Pages in use: 309
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 445/2358 313/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 48986423 m, 109146 m/sec, 49045644 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1687 secs. Pages in use: 313
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 450/2358 316/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 49530611 m, 108837 m/sec, 49589832 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1692 secs. Pages in use: 316
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 455/2358 320/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 50075957 m, 109069 m/sec, 50135178 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1697 secs. Pages in use: 320
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 460/2358 323/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 50621768 m, 109162 m/sec, 50680989 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1702 secs. Pages in use: 323
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 465/2358 327/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 51165696 m, 108785 m/sec, 51224918 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1707 secs. Pages in use: 327
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 470/2358 330/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 51709274 m, 108715 m/sec, 51768495 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1712 secs. Pages in use: 330
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 475/2358 334/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 52253198 m, 108784 m/sec, 52312420 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1717 secs. Pages in use: 334
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 480/2358 337/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 52797450 m, 108850 m/sec, 52856671 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1722 secs. Pages in use: 337
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 485/2358 341/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 53341278 m, 108765 m/sec, 53400500 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1727 secs. Pages in use: 341
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 490/2358 344/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 53884791 m, 108702 m/sec, 53944012 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1732 secs. Pages in use: 344
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 502/2358 346/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 54229594 m, 68960 m/sec, 54288815 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1745 secs. Pages in use: 346
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 517/2358 346/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 54230259 m, 133 m/sec, 54289480 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1760 secs. Pages in use: 346
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 525/2358 346/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 54236789 m, 1306 m/sec, 54296011 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1768 secs. Pages in use: 346
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 545/2358 346/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 54237112 m, 64 m/sec, 54296334 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1788 secs. Pages in use: 346
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-00: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-02: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-04: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDoubleLock-PT-p1s3-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2024-11: EG true state space / EG[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mDoubleLock-PT-p1s3-CTLCardinality-2023-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DoubleLock-PT-p1s3-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 561/2358 346/2000 DoubleLock-PT-p1s3-CTLCardinality-2024-01 54237423 m, 62 m/sec, 54296644 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1804 secs. Pages in use: 346
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 403 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DoubleLock-PT-p1s3"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is DoubleLock-PT-p1s3, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r137-tall-171631134600601"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DoubleLock-PT-p1s3.tgz
mv DoubleLock-PT-p1s3 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;