MCC'2024- Execution of r137-tall-171631133500098

About the Execution of LoLA for Dekker-PT-020

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
16205.920	577096.00	1030632.00	2976.40	???????T????????	normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r137-tall-171631133500098.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is Dekker-PT-020, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r137-tall-171631133500098
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 804K
-rw-r--r-- 1 mcc users 7.5K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 78K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.4K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 51K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Apr 22 14:39 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Apr 22 14:39 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Apr 22 14:39 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 22 14:39 LTLFireability.xml
-rw-r--r-- 1 mcc users 17K Apr 11 20:14 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 175K Apr 11 20:14 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Apr 11 20:12 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 97K Apr 11 20:12 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:39 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:39 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 247K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Dekker-PT-020-CTLFireability-2024-00
FORMULA_NAME Dekker-PT-020-CTLFireability-2024-01
FORMULA_NAME Dekker-PT-020-CTLFireability-2024-02
FORMULA_NAME Dekker-PT-020-CTLFireability-2024-03
FORMULA_NAME Dekker-PT-020-CTLFireability-2024-04
FORMULA_NAME Dekker-PT-020-CTLFireability-2024-05
FORMULA_NAME Dekker-PT-020-CTLFireability-2024-06
FORMULA_NAME Dekker-PT-020-CTLFireability-2024-07
FORMULA_NAME Dekker-PT-020-CTLFireability-2024-08
FORMULA_NAME Dekker-PT-020-CTLFireability-2024-09
FORMULA_NAME Dekker-PT-020-CTLFireability-2024-10
FORMULA_NAME Dekker-PT-020-CTLFireability-2024-11
FORMULA_NAME Dekker-PT-020-CTLFireability-2023-12
FORMULA_NAME Dekker-PT-020-CTLFireability-2023-13
FORMULA_NAME Dekker-PT-020-CTLFireability-2023-14
FORMULA_NAME Dekker-PT-020-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717011533285

FORMULA Dekker-PT-020-CTLFireability-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1717012110381

--------------------
content from stderr:

[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 22 (type CNST) for 21 Dekker-PT-020-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 22 (type CNST) for Dekker-PT-020-CTLFireability-2024-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 42 (type EXCL) for 41 Dekker-PT-020-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 171 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 64 (type EQUN) for 27 Dekker-PT-020-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 66 (type SKEL/FNDP) for 50 Dekker-PT-020-CTLFireability-2023-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 67 (type SKEL/EQUN) for 50 Dekker-PT-020-CTLFireability-2023-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 66 (type SKEL/FNDP) for Dekker-PT-020-CTLFireability-2023-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 67 (type EQUN) for Dekker-PT-020-CTLFireability-2023-14 (obsolete)
[[35mlola[0m][I] FINISHED task # 67 (type SKEL/EQUN) for Dekker-PT-020-CTLFireability-2023-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 64 (type EQUN) for Dekker-PT-020-CTLFireability-2024-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 69 (type FNDP) for 50 Dekker-PT-020-CTLFireability-2023-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 70 (type EQUN) for 50 Dekker-PT-020-CTLFireability-2023-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 69 (type FNDP) for Dekker-PT-020-CTLFireability-2023-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 70 (type EQUN) for Dekker-PT-020-CTLFireability-2023-14 (obsolete)
[[35mlola[0m][I] FINISHED task # 70 (type EQUN) for Dekker-PT-020-CTLFireability-2023-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 5/211 2/2000 Dekker-PT-020-CTLFireability-2024-11 414781 m, 82956 m/sec, 7371895 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 10/211 4/2000 Dekker-PT-020-CTLFireability-2024-11 863985 m, 89840 m/sec, 15144114 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 15/211 6/2000 Dekker-PT-020-CTLFireability-2024-11 1308262 m, 88855 m/sec, 22886359 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 15 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 20/211 8/2000 Dekker-PT-020-CTLFireability-2024-11 1750540 m, 88455 m/sec, 30564216 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 20 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 25/211 10/2000 Dekker-PT-020-CTLFireability-2024-11 2191128 m, 88117 m/sec, 38499966 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 25 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 30/211 12/2000 Dekker-PT-020-CTLFireability-2024-11 2624234 m, 86621 m/sec, 46234529 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 30 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 35/211 13/2000 Dekker-PT-020-CTLFireability-2024-11 3049216 m, 84996 m/sec, 53821972 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 35 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 40/211 15/2000 Dekker-PT-020-CTLFireability-2024-11 3461145 m, 82385 m/sec, 61279916 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 40 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 45/211 16/2000 Dekker-PT-020-CTLFireability-2024-11 3795519 m, 66874 m/sec, 68808392 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 45 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 50/211 18/2000 Dekker-PT-020-CTLFireability-2024-11 4203075 m, 81511 m/sec, 75983257 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 50 secs. Pages in use: 18
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 55/211 20/2000 Dekker-PT-020-CTLFireability-2024-11 4597263 m, 78837 m/sec, 82952218 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 55 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 60/211 21/2000 Dekker-PT-020-CTLFireability-2024-11 4996517 m, 79850 m/sec, 90111741 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 60 secs. Pages in use: 21
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 65/211 22/2000 Dekker-PT-020-CTLFireability-2024-11 5184105 m, 37517 m/sec, 99754102 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 65 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 70/211 24/2000 Dekker-PT-020-CTLFireability-2024-11 5587022 m, 80583 m/sec, 106481276 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 70 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 75/211 24/2000 Dekker-PT-020-CTLFireability-2024-11 5676264 m, 17848 m/sec, 116889376 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 75 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 80/211 24/2000 Dekker-PT-020-CTLFireability-2024-11 5676390 m, 25 m/sec, 128228818 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 80 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 85/211 24/2000 Dekker-PT-020-CTLFireability-2024-11 5676459 m, 13 m/sec, 139464112 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 85 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 90/211 24/2000 Dekker-PT-020-CTLFireability-2024-11 5676505 m, 9 m/sec, 151123651 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 90 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 95/211 25/2000 Dekker-PT-020-CTLFireability-2024-11 5949099 m, 54518 m/sec, 159847784 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 95 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 100/211 27/2000 Dekker-PT-020-CTLFireability-2024-11 6200596 m, 50299 m/sec, 168135397 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 100 secs. Pages in use: 27
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 105/211 27/2000 Dekker-PT-020-CTLFireability-2024-11 6200773 m, 35 m/sec, 179092720 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 105 secs. Pages in use: 27
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 110/211 27/2000 Dekker-PT-020-CTLFireability-2024-11 6200838 m, 13 m/sec, 190274851 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 110 secs. Pages in use: 27
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 115/211 27/2000 Dekker-PT-020-CTLFireability-2024-11 6200871 m, 6 m/sec, 201804738 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 115 secs. Pages in use: 27
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 120/211 27/2000 Dekker-PT-020-CTLFireability-2024-11 6225553 m, 4936 m/sec, 213413084 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 120 secs. Pages in use: 27
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 125/211 27/2000 Dekker-PT-020-CTLFireability-2024-11 6280701 m, 11029 m/sec, 223795551 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 125 secs. Pages in use: 27
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 130/211 27/2000 Dekker-PT-020-CTLFireability-2024-11 6280819 m, 23 m/sec, 235005039 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 130 secs. Pages in use: 27
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 135/211 27/2000 Dekker-PT-020-CTLFireability-2024-11 6280869 m, 10 m/sec, 246608383 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 135 secs. Pages in use: 27
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 140/211 27/2000 Dekker-PT-020-CTLFireability-2024-11 6280890 m, 4 m/sec, 258689044 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 140 secs. Pages in use: 27
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 145/211 28/2000 Dekker-PT-020-CTLFireability-2024-11 6620414 m, 67904 m/sec, 266749065 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 145 secs. Pages in use: 28
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 150/211 29/2000 Dekker-PT-020-CTLFireability-2024-11 6805055 m, 36928 m/sec, 275450607 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 150 secs. Pages in use: 29
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 155/211 29/2000 Dekker-PT-020-CTLFireability-2024-11 6805148 m, 18 m/sec, 286084407 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 155 secs. Pages in use: 29
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 160/211 29/2000 Dekker-PT-020-CTLFireability-2024-11 6805186 m, 7 m/sec, 297118609 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 160 secs. Pages in use: 29
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 165/211 29/2000 Dekker-PT-020-CTLFireability-2024-11 6805191 m, 1 m/sec, 308303612 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 165 secs. Pages in use: 29
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 170/211 29/2000 Dekker-PT-020-CTLFireability-2024-11 6857148 m, 10391 m/sec, 319300104 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 170 secs. Pages in use: 29
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 175/211 29/2000 Dekker-PT-020-CTLFireability-2024-11 6857538 m, 78 m/sec, 330347976 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 175 secs. Pages in use: 29
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 180/211 29/2000 Dekker-PT-020-CTLFireability-2024-11 6857605 m, 13 m/sec, 341672134 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 180 secs. Pages in use: 29
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 185/211 29/2000 Dekker-PT-020-CTLFireability-2024-11 6857630 m, 5 m/sec, 353336673 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 185 secs. Pages in use: 29
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 190/211 29/2000 Dekker-PT-020-CTLFireability-2024-11 6862028 m, 879 m/sec, 365538802 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 190 secs. Pages in use: 29
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 195/211 31/2000 Dekker-PT-020-CTLFireability-2024-11 7279210 m, 83436 m/sec, 372403366 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 195 secs. Pages in use: 31
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 200/211 31/2000 Dekker-PT-020-CTLFireability-2024-11 7381748 m, 20507 m/sec, 381951895 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 200 secs. Pages in use: 31
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 205/211 31/2000 Dekker-PT-020-CTLFireability-2024-11 7381874 m, 25 m/sec, 392785090 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 205 secs. Pages in use: 31
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 210/211 31/2000 Dekker-PT-020-CTLFireability-2024-11 7381912 m, 7 m/sec, 403870374 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 210 secs. Pages in use: 31
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 42 (type EXCL) for Dekker-PT-020-CTLFireability-2024-11 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 215 secs. Pages in use: 31
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 58 (type EXCL) for 57 Dekker-PT-020-CTLFireability-2023-15
[[35mlola[0m][I] time limit : 211 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 42 (type EXCL) for 41 Dekker-PT-020-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 3385 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 58 (type EXCL) for Dekker-PT-020-CTLFireability-2023-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 4
[[35mlola[0m][I] fired transitions : 8
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 5/211 2/5 Dekker-PT-020-CTLFireability-2024-11 436616 m, -1389059 m/sec, 7782109 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 220 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 10/211 4/5 Dekker-PT-020-CTLFireability-2024-11 877104 m, 88097 m/sec, 15382900 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 225 secs. Pages in use: 36
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 42 (type EXCL) for Dekker-PT-020-CTLFireability-2024-11 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-14: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 230 secs. Pages in use: 37
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 53 (type EXCL) for 50 Dekker-PT-020-CTLFireability-2023-14
[[35mlola[0m][I] time limit : 224 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 53 (type EXCL) for Dekker-PT-020-CTLFireability-2023-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 5
[[35mlola[0m][I] fired transitions : 5
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 48 (type EXCL) for 47 Dekker-PT-020-CTLFireability-2023-13
[[35mlola[0m][I] time limit : 240 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 48 (type EXCL) for Dekker-PT-020-CTLFireability-2023-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 10
[[35mlola[0m][I] fired transitions : 64
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 39 (type EXCL) for 38 Dekker-PT-020-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 259 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 5/259 1/2000 Dekker-PT-020-CTLFireability-2024-10 170097 m, 34019 m/sec, 2850111 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 235 secs. Pages in use: 37
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 10/259 2/2000 Dekker-PT-020-CTLFireability-2024-10 241425 m, 14265 m/sec, 7089599 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 240 secs. Pages in use: 37
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 15/259 2/2000 Dekker-PT-020-CTLFireability-2024-10 353382 m, 22391 m/sec, 9143091 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 245 secs. Pages in use: 37
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 20/259 2/2000 Dekker-PT-020-CTLFireability-2024-10 460882 m, 21500 m/sec, 11039080 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 250 secs. Pages in use: 37
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 25/259 3/2000 Dekker-PT-020-CTLFireability-2024-10 560297 m, 19883 m/sec, 12752002 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 255 secs. Pages in use: 37
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 30/259 3/2000 Dekker-PT-020-CTLFireability-2024-10 672926 m, 22525 m/sec, 14630791 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 260 secs. Pages in use: 37
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 35/259 4/2000 Dekker-PT-020-CTLFireability-2024-10 791077 m, 23630 m/sec, 16767499 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 265 secs. Pages in use: 38
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 40/259 4/2000 Dekker-PT-020-CTLFireability-2024-10 891848 m, 20154 m/sec, 18824229 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 270 secs. Pages in use: 38
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 45/259 5/2000 Dekker-PT-020-CTLFireability-2024-10 997690 m, 21168 m/sec, 20726898 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 275 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 50/259 5/2000 Dekker-PT-020-CTLFireability-2024-10 1114558 m, 23373 m/sec, 22782680 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 280 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 55/259 6/2000 Dekker-PT-020-CTLFireability-2024-10 1205630 m, 18214 m/sec, 24450677 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 285 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 60/259 6/2000 Dekker-PT-020-CTLFireability-2024-10 1330671 m, 25008 m/sec, 26797175 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 290 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 65/259 7/2000 Dekker-PT-020-CTLFireability-2024-10 1434726 m, 20811 m/sec, 28688640 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 295 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 70/259 7/2000 Dekker-PT-020-CTLFireability-2024-10 1544743 m, 22003 m/sec, 30593163 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 300 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 75/259 7/2000 Dekker-PT-020-CTLFireability-2024-10 1639531 m, 18957 m/sec, 32263441 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 305 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 80/259 8/2000 Dekker-PT-020-CTLFireability-2024-10 1731551 m, 18404 m/sec, 33857891 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 310 secs. Pages in use: 43
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 85/259 8/2000 Dekker-PT-020-CTLFireability-2024-10 1841745 m, 22038 m/sec, 36046973 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 315 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 90/259 9/2000 Dekker-PT-020-CTLFireability-2024-10 1953375 m, 22326 m/sec, 38051419 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 320 secs. Pages in use: 46
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 95/259 9/2000 Dekker-PT-020-CTLFireability-2024-10 2060470 m, 21419 m/sec, 39927144 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 325 secs. Pages in use: 46
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 100/259 10/2000 Dekker-PT-020-CTLFireability-2024-10 2166845 m, 21275 m/sec, 41938926 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 330 secs. Pages in use: 47
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 105/259 10/2000 Dekker-PT-020-CTLFireability-2024-10 2279984 m, 22627 m/sec, 44200169 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 335 secs. Pages in use: 47
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 110/259 11/2000 Dekker-PT-020-CTLFireability-2024-10 2384522 m, 20907 m/sec, 46043793 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 340 secs. Pages in use: 48
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 115/259 11/2000 Dekker-PT-020-CTLFireability-2024-10 2481619 m, 19419 m/sec, 47835879 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 345 secs. Pages in use: 48
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 120/259 11/2000 Dekker-PT-020-CTLFireability-2024-10 2583823 m, 20440 m/sec, 49666317 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 350 secs. Pages in use: 48
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 125/259 12/2000 Dekker-PT-020-CTLFireability-2024-10 2677316 m, 18698 m/sec, 51502922 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 355 secs. Pages in use: 49
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 130/259 12/2000 Dekker-PT-020-CTLFireability-2024-10 2780738 m, 20684 m/sec, 53436608 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 360 secs. Pages in use: 50
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 135/259 13/2000 Dekker-PT-020-CTLFireability-2024-10 2901159 m, 24084 m/sec, 55542935 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 365 secs. Pages in use: 52
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 140/259 13/2000 Dekker-PT-020-CTLFireability-2024-10 2999266 m, 19621 m/sec, 57342058 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 370 secs. Pages in use: 52
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 145/259 13/2000 Dekker-PT-020-CTLFireability-2024-10 3094957 m, 19138 m/sec, 59092885 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 375 secs. Pages in use: 52
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 150/259 14/2000 Dekker-PT-020-CTLFireability-2024-10 3190852 m, 19179 m/sec, 61065619 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 380 secs. Pages in use: 53
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 155/259 14/2000 Dekker-PT-020-CTLFireability-2024-10 3297594 m, 21348 m/sec, 63002754 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 385 secs. Pages in use: 54
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 160/259 15/2000 Dekker-PT-020-CTLFireability-2024-10 3406467 m, 21774 m/sec, 65013440 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 390 secs. Pages in use: 55
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 165/259 15/2000 Dekker-PT-020-CTLFireability-2024-10 3508644 m, 20435 m/sec, 66823889 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 395 secs. Pages in use: 55
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 170/259 16/2000 Dekker-PT-020-CTLFireability-2024-10 3585343 m, 15339 m/sec, 68260347 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 400 secs. Pages in use: 56
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 175/259 16/2000 Dekker-PT-020-CTLFireability-2024-10 3683226 m, 19576 m/sec, 70148237 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 405 secs. Pages in use: 56
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 180/259 17/2000 Dekker-PT-020-CTLFireability-2024-10 3815831 m, 26521 m/sec, 72341629 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 410 secs. Pages in use: 58
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 185/259 17/2000 Dekker-PT-020-CTLFireability-2024-10 3928756 m, 22585 m/sec, 74308097 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 415 secs. Pages in use: 59
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 190/259 17/2000 Dekker-PT-020-CTLFireability-2024-10 4027764 m, 19801 m/sec, 76012857 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 420 secs. Pages in use: 59
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 195/259 18/2000 Dekker-PT-020-CTLFireability-2024-10 4122663 m, 18979 m/sec, 77843572 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 425 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 200/259 18/2000 Dekker-PT-020-CTLFireability-2024-10 4231861 m, 21839 m/sec, 79935953 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 430 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 205/259 19/2000 Dekker-PT-020-CTLFireability-2024-10 4341004 m, 21828 m/sec, 81881921 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 435 secs. Pages in use: 62
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 210/259 19/2000 Dekker-PT-020-CTLFireability-2024-10 4436661 m, 19131 m/sec, 83619232 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 440 secs. Pages in use: 63
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 215/259 20/2000 Dekker-PT-020-CTLFireability-2024-10 4547607 m, 22189 m/sec, 85522949 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 445 secs. Pages in use: 64
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 220/259 20/2000 Dekker-PT-020-CTLFireability-2024-10 4638544 m, 18187 m/sec, 87396343 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 450 secs. Pages in use: 64
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 225/259 20/2000 Dekker-PT-020-CTLFireability-2024-10 4748256 m, 21942 m/sec, 89466763 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 455 secs. Pages in use: 64
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 230/259 21/2000 Dekker-PT-020-CTLFireability-2024-10 4855641 m, 21477 m/sec, 91401934 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 460 secs. Pages in use: 65
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 235/259 21/2000 Dekker-PT-020-CTLFireability-2024-10 4957116 m, 20295 m/sec, 93187378 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 465 secs. Pages in use: 66
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 240/259 22/2000 Dekker-PT-020-CTLFireability-2024-10 5055169 m, 19610 m/sec, 94996401 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 470 secs. Pages in use: 67
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 245/259 22/2000 Dekker-PT-020-CTLFireability-2024-10 5139694 m, 16905 m/sec, 96757750 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 475 secs. Pages in use: 67
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 250/259 22/2000 Dekker-PT-020-CTLFireability-2024-10 5184868 m, 9034 m/sec, 103610962 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 480 secs. Pages in use: 67
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 255/259 23/2000 Dekker-PT-020-CTLFireability-2024-10 5290193 m, 21065 m/sec, 105477932 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 485 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 39 (type EXCL) for Dekker-PT-020-CTLFireability-2024-10 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 3 0 0 4 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 490 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 34 (type EXCL) for 27 Dekker-PT-020-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 259 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 39 (type EXCL) for 38 Dekker-PT-020-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 3110 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 34 (type EXCL) for Dekker-PT-020-CTLFireability-2024-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 5
[[35mlola[0m][I] fired transitions : 5
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 1 0 0 5 0 0 1
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 5/282 1/5 Dekker-PT-020-CTLFireability-2024-10 141252 m, -1029788 m/sec, 2323219 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 495 secs. Pages in use: 70
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 1 0 0 5 0 0 1
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 10/282 1/5 Dekker-PT-020-CTLFireability-2024-10 219090 m, 15567 m/sec, 6699202 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 500 secs. Pages in use: 70
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 1 0 0 5 0 0 1
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 15/282 2/5 Dekker-PT-020-CTLFireability-2024-10 339198 m, 24021 m/sec, 8914111 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 505 secs. Pages in use: 72
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 1 0 0 5 0 0 1
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 20/282 2/5 Dekker-PT-020-CTLFireability-2024-10 436514 m, 19463 m/sec, 10623311 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 510 secs. Pages in use: 73
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 1 0 0 5 0 0 1
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 25/282 3/5 Dekker-PT-020-CTLFireability-2024-10 545418 m, 21780 m/sec, 12497275 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 515 secs. Pages in use: 75
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 1 0 0 5 0 0 1
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 30/282 3/5 Dekker-PT-020-CTLFireability-2024-10 654712 m, 21858 m/sec, 14318092 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 520 secs. Pages in use: 75
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 1 0 0 5 0 0 1
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 35/282 4/5 Dekker-PT-020-CTLFireability-2024-10 775005 m, 24058 m/sec, 16534625 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 525 secs. Pages in use: 76
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 1 0 0 5 0 0 1
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 40/282 4/5 Dekker-PT-020-CTLFireability-2024-10 864788 m, 17956 m/sec, 18315694 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 530 secs. Pages in use: 76
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 1 0 0 5 0 0 1
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 45/282 5/5 Dekker-PT-020-CTLFireability-2024-10 976781 m, 22398 m/sec, 20349451 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 535 secs. Pages in use: 77
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 1 0 0 5 0 0 1
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 50/282 5/5 Dekker-PT-020-CTLFireability-2024-10 1078998 m, 20443 m/sec, 22197088 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 540 secs. Pages in use: 78
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 1 0 0 5 0 0 1
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 55/282 5/5 Dekker-PT-020-CTLFireability-2024-10 1186361 m, 21472 m/sec, 24102661 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 545 secs. Pages in use: 78
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 39 (type EXCL) for Dekker-PT-020-CTLFireability-2024-10 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 1 0 0 5 0 0 1
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 550 secs. Pages in use: 78
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 25 (type EXCL) for 24 Dekker-PT-020-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 305 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 1 0 0 5 0 0 1
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 CTL EXCL 5/305 3/2000 Dekker-PT-020-CTLFireability-2024-08 575552 m, 115110 m/sec, 9462116 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 555 secs. Pages in use: 78
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 1 0 0 5 0 0 1
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 CTL EXCL 10/305 5/2000 Dekker-PT-020-CTLFireability-2024-08 1147451 m, 114379 m/sec, 18419342 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 560 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 1 0 0 5 0 0 1
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 CTL EXCL 15/305 8/2000 Dekker-PT-020-CTLFireability-2024-08 1714168 m, 113343 m/sec, 27561308 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 565 secs. Pages in use: 84
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 1 0 0 5 0 0 1
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 CTL EXCL 20/305 10/2000 Dekker-PT-020-CTLFireability-2024-08 2261058 m, 109378 m/sec, 36676943 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 570 secs. Pages in use: 86
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2024-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDekker-PT-020-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mDekker-PT-020-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-09: DISJ 0 1 0 0 5 0 0 1
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Dekker-PT-020-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 CTL EXCL 26/305 11/2000 Dekker-PT-020-CTLFireability-2024-08 2605940 m, 68976 m/sec, 42249411 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 576 secs. Pages in use: 87
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 408 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Dekker-PT-020"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is Dekker-PT-020, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r137-tall-171631133500098"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Dekker-PT-020.tgz
mv Dekker-PT-020 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;