Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r137-tall-171631133500090.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is Dekker-PT-015, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r137-tall-171631133500090
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 668K
-rw-r--r-- 1 mcc users 6.8K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 69K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.8K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 45K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Apr 22 14:39 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Apr 22 14:39 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Apr 22 14:39 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 22 14:39 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Apr 11 20:13 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 148K Apr 11 20:13 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 15K Apr 11 20:11 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 118K Apr 11 20:11 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:39 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:39 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 141K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Dekker-PT-015-CTLFireability-2024-00
FORMULA_NAME Dekker-PT-015-CTLFireability-2024-01
FORMULA_NAME Dekker-PT-015-CTLFireability-2024-02
FORMULA_NAME Dekker-PT-015-CTLFireability-2024-03
FORMULA_NAME Dekker-PT-015-CTLFireability-2024-04
FORMULA_NAME Dekker-PT-015-CTLFireability-2024-05
FORMULA_NAME Dekker-PT-015-CTLFireability-2024-06
FORMULA_NAME Dekker-PT-015-CTLFireability-2024-07
FORMULA_NAME Dekker-PT-015-CTLFireability-2024-08
FORMULA_NAME Dekker-PT-015-CTLFireability-2024-09
FORMULA_NAME Dekker-PT-015-CTLFireability-2024-10
FORMULA_NAME Dekker-PT-015-CTLFireability-2024-11
FORMULA_NAME Dekker-PT-015-CTLFireability-2023-12
FORMULA_NAME Dekker-PT-015-CTLFireability-2023-13
FORMULA_NAME Dekker-PT-015-CTLFireability-2023-14
FORMULA_NAME Dekker-PT-015-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717011410219

FORMULA Dekker-PT-015-CTLFireability-2024-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Dekker-PT-015-CTLFireability-2024-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Dekker-PT-015-CTLFireability-2023-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Dekker-PT-015-CTLFireability-2023-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Dekker-PT-015-CTLFireability-2023-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Dekker-PT-015-CTLFireability-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Dekker-PT-015-CTLFireability-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Dekker-PT-015-CTLFireability-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Dekker-PT-015-CTLFireability-2024-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Dekker-PT-015-CTLFireability-2024-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Dekker-PT-015-CTLFireability-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Dekker-PT-015-CTLFireability-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Dekker-PT-015-CTLFireability-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Dekker-PT-015-CTLFireability-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Dekker-PT-015-CTLFireability-2024-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Dekker-PT-015-CTLFireability-2023-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[lola] FINAL RESULTS
[lola]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola] Dekker-PT-015-CTLFireability-2024-00: CTL true CTL model checker
[lola] Dekker-PT-015-CTLFireability-2024-01: CTL false CTL model checker
[lola] Dekker-PT-015-CTLFireability-2024-02: DISJ false DISJ
[lola] Dekker-PT-015-CTLFireability-2024-03: CTL false CTL model checker
[lola] Dekker-PT-015-CTLFireability-2024-04: CTL false CTL model checker
[lola] Dekker-PT-015-CTLFireability-2024-05: CTL false CTL model checker
[lola] Dekker-PT-015-CTLFireability-2024-06: CTL false CTL model checker
[lola] Dekker-PT-015-CTLFireability-2024-07: CTL true CTL model checker
[lola] Dekker-PT-015-CTLFireability-2024-08: CTL false CTL model checker
[lola] Dekker-PT-015-CTLFireability-2024-09: CTL true CTL model checker
[lola] Dekker-PT-015-CTLFireability-2024-10: CTL true CTL model checker
[lola] Dekker-PT-015-CTLFireability-2024-11: DISJ true findpath
[lola] Dekker-PT-015-CTLFireability-2023-12: CTL false CTL model checker
[lola] Dekker-PT-015-CTLFireability-2023-13: CTL true CTL model checker
[lola] Dekker-PT-015-CTLFireability-2023-14: CTL true CTL model checker
[lola] Dekker-PT-015-CTLFireability-2023-15: CTL false CTL model checker
[lola]
[lola] Time elapsed: 86 secs. Pages in use: 2

BK_STOP 1717011497010

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from CTLFireability.xml
[lola][I] Rule S: 0 transitions removed,0 places removed
[lola][I] LAUNCH task # 27 (type EXCL) for 26 Dekker-PT-015-CTLFireability-2024-06
[lola][I] time limit : 105 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 68 (type FNDP) for 41 Dekker-PT-015-CTLFireability-2024-11
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 69 (type EQUN) for 41 Dekker-PT-015-CTLFireability-2024-11
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 71 (type FNDP) for 41 Dekker-PT-015-CTLFireability-2024-11
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] NOTDEADLOCKFREE
[lola][I] FINISHED task # 71 (type FNDP) for Dekker-PT-015-CTLFireability-2024-11
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][W] CANCELED task # 68 (type FNDP) for Dekker-PT-015-CTLFireability-2024-11 (obsolete)
[lola][W] CANCELED task # 69 (type EQUN) for Dekker-PT-015-CTLFireability-2024-11 (obsolete)
[lola][I] FINISHED task # 68 (type FNDP) for Dekker-PT-015-CTLFireability-2024-11
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][I] LAUNCH task # 75 (type SKEL/SRCH) for 6 Dekker-PT-015-CTLFireability-2024-02
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 75 (type SKEL/SRCH) for Dekker-PT-015-CTLFireability-2024-02
[lola][I] result : false
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] FINISHED task # 69 (type EQUN) for Dekker-PT-015-CTLFireability-2024-11
[lola][I] result : unknown
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] Dekker-PT-015-CTLFireability-2024-11: DISJ true findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] Dekker-PT-015-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-02: DISJ 0 2 0 0 3 0 0 1
[lola][.] Dekker-PT-015-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 5/225 1/2000 Dekker-PT-015-CTLFireability-2024-06 221652 m, 44330 m/sec, 11412803 t fired, .
[lola][.]
[lola][.] Time elapsed: 5 secs. Pages in use: 2
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I] FINISHED task # 27 (type EXCL) for Dekker-PT-015-CTLFireability-2024-06
[lola][I] result : false
[lola][I] markings : 278528
[lola][I] fired transitions : 17524514
[lola][I] time used : 7
[lola][I] memory pages used : 2
[lola][I] LAUNCH task # 66 (type EXCL) for 65 Dekker-PT-015-CTLFireability-2023-15
[lola][I] time limit : 239 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] Dekker-PT-015-CTLFireability-2024-06: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-11: DISJ true findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] Dekker-PT-015-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-02: DISJ 0 2 0 0 3 0 0 1
[lola][.] Dekker-PT-015-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2023-15: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 66 CTL EXCL 3/239 1/2000 Dekker-PT-015-CTLFireability-2023-15 157284 m, 31456 m/sec, 4008838 t fired, .
[lola][.]
[lola][.] Time elapsed: 10 secs. Pages in use: 2
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] Dekker-PT-015-CTLFireability-2024-06: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-11: DISJ true findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] Dekker-PT-015-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-02: DISJ 0 2 0 0 3 0 0 1
[lola][.] Dekker-PT-015-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2023-15: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 66 CTL EXCL 8/239 2/2000 Dekker-PT-015-CTLFireability-2023-15 262879 m, 21119 m/sec, 15033304 t fired, .
[lola][.]
[lola][.] Time elapsed: 15 secs. Pages in use: 2
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I] FINISHED task # 66 (type EXCL) for Dekker-PT-015-CTLFireability-2023-15
[lola][I] result : false
[lola][I] markings : 278528
[lola][I] fired transitions : 17427535
[lola][I] time used : 9
[lola][I] memory pages used : 2
[lola][I] LAUNCH task # 60 (type EXCL) for 59 Dekker-PT-015-CTLFireability-2023-13
[lola][I] time limit : 256 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 60 (type EXCL) for Dekker-PT-015-CTLFireability-2023-13
[lola][I] result : true
[lola][I] markings : 15
[lola][I] fired transitions : 14
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 57 (type EXCL) for 56 Dekker-PT-015-CTLFireability-2023-12
[lola][I] time limit : 275 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 57 (type EXCL) for Dekker-PT-015-CTLFireability-2023-12
[lola][I] result : false
[lola][I] markings : 15
[lola][I] fired transitions : 14
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 39 (type EXCL) for 38 Dekker-PT-015-CTLFireability-2024-10
[lola][I] time limit : 298 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 39 (type EXCL) for Dekker-PT-015-CTLFireability-2024-10
[lola][I] result : true
[lola][I] markings : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 33 (type EXCL) for 32 Dekker-PT-015-CTLFireability-2024-08
[lola][I] time limit : 325 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] Dekker-PT-015-CTLFireability-2024-06: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-11: DISJ true findpath
[lola][.] Dekker-PT-015-CTLFireability-2023-12: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] Dekker-PT-015-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-02: DISJ 0 2 0 0 3 0 0 1
[lola][.] Dekker-PT-015-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 33 CTL EXCL 4/325 1/2000 Dekker-PT-015-CTLFireability-2024-08 174655 m, 34931 m/sec, 7411620 t fired, .
[lola][.]
[lola][.] Time elapsed: 20 secs. Pages in use: 2
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I] FINISHED task # 33 (type EXCL) for Dekker-PT-015-CTLFireability-2024-08
[lola][I] result : false
[lola][I] markings : 278528
[lola][I] fired transitions : 18247067
[lola][I] time used : 9
[lola][I] memory pages used : 2
[lola][I] LAUNCH task # 30 (type EXCL) for 29 Dekker-PT-015-CTLFireability-2024-07
[lola][I] time limit : 357 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] Dekker-PT-015-CTLFireability-2024-06: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-08: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-11: DISJ true findpath
[lola][.] Dekker-PT-015-CTLFireability-2023-12: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] Dekker-PT-015-CTLFireability-2024-02: DISJ 0 2 0 0 3 0 0 1
[lola][.] Dekker-PT-015-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 30 CTL EXCL 0/357 1/2000 Dekker-PT-015-CTLFireability-2024-07 24112 m, 4822 m/sec, 318832 t fired, .
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[lola][.] Dekker-PT-015-CTLFireability-2024-06: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-08: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-11: DISJ true findpath
[lola][.] Dekker-PT-015-CTLFireability-2023-12: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-15: CTL false CTL model checker
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[lola][.] Dekker-PT-015-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-02: DISJ 0 2 0 0 3 0 0 1
[lola][.] Dekker-PT-015-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 30 CTL EXCL 5/357 2/2000 Dekker-PT-015-CTLFireability-2024-07 241170 m, 43411 m/sec, 12617088 t fired, .
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[lola][I] markings : 278528
[lola][I] fired transitions : 17337643
[lola][I] time used : 7
[lola][I] memory pages used : 2
[lola][I] LAUNCH task # 24 (type EXCL) for 23 Dekker-PT-015-CTLFireability-2024-05
[lola][I] time limit : 396 sec
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[lola][.] Dekker-PT-015-CTLFireability-2024-06: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-07: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-08: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-11: DISJ true findpath
[lola][.] Dekker-PT-015-CTLFireability-2023-12: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-15: CTL false CTL model checker
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] Dekker-PT-015-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-02: DISJ 0 2 0 0 3 0 0 1
[lola][.] Dekker-PT-015-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 24 CTL EXCL 3/396 1/2000 Dekker-PT-015-CTLFireability-2024-05 191037 m, 38207 m/sec, 7812690 t fired, .
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[lola][I] result : false
[lola][I] markings : 278528
[lola][I] fired transitions : 17148001
[lola][I] time used : 7
[lola][I] memory pages used : 2
[lola][I] LAUNCH task # 21 (type EXCL) for 20 Dekker-PT-015-CTLFireability-2024-04
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[lola][.] Dekker-PT-015-CTLFireability-2024-05: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-06: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-07: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-08: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-11: DISJ true findpath
[lola][.] Dekker-PT-015-CTLFireability-2023-12: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-15: CTL false CTL model checker
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[lola][.] Dekker-PT-015-CTLFireability-2024-02: DISJ 0 2 0 0 3 0 0 1
[lola][.] Dekker-PT-015-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 21 CTL EXCL 1/445 1/2000 Dekker-PT-015-CTLFireability-2024-04 100668 m, 20133 m/sec, 2668981 t fired, .
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[lola][.] Dekker-PT-015-CTLFireability-2024-07: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-08: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-11: DISJ true findpath
[lola][.] Dekker-PT-015-CTLFireability-2023-12: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-15: CTL false CTL model checker
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[lola][.] Dekker-PT-015-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-02: DISJ 0 2 0 0 3 0 0 1
[lola][.] Dekker-PT-015-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 21 CTL EXCL 6/445 1/2000 Dekker-PT-015-CTLFireability-2024-04 238440 m, 27554 m/sec, 14206203 t fired, .
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[lola][I] fired transitions : 19329724
[lola][I] time used : 8
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[lola][I] LAUNCH task # 18 (type EXCL) for 17 Dekker-PT-015-CTLFireability-2024-03
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[lola][.] Dekker-PT-015-CTLFireability-2024-04: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-05: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-06: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-07: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-08: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-11: DISJ true findpath
[lola][.] Dekker-PT-015-CTLFireability-2023-12: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-15: CTL false CTL model checker
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] Dekker-PT-015-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-02: DISJ 0 2 0 0 3 0 0 1
[lola][.] Dekker-PT-015-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 18 CTL EXCL 3/507 1/2000 Dekker-PT-015-CTLFireability-2024-03 174153 m, 34830 m/sec, 6660307 t fired, .
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[lola][I] fired transitions : 17670173
[lola][I] time used : 7
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[lola][I] LAUNCH task # 15 (type EXCL) for 6 Dekker-PT-015-CTLFireability-2024-02
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[lola][I] FINISHED task # 15 (type EXCL) for Dekker-PT-015-CTLFireability-2024-02
[lola][I] result : false
[lola][I] markings : 11873
[lola][I] fired transitions : 135926
[lola][I] time used : 0
[lola][I] memory pages used : 1
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[lola][.] Dekker-PT-015-CTLFireability-2024-03: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-04: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-05: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-06: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-07: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-08: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-11: DISJ true findpath
[lola][.] Dekker-PT-015-CTLFireability-2023-12: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-15: CTL false CTL model checker
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[lola][.] Dekker-PT-015-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-02: DISJ 0 0 1 0 4 0 0 1
[lola][.] Dekker-PT-015-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 13 CTL EXCL 1/709 1/2000 Dekker-PT-015-CTLFireability-2024-02 79979 m, 15995 m/sec, 1242159 t fired, .
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[lola][.] Dekker-PT-015-CTLFireability-2024-07: CTL true CTL model checker
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[lola][.] Dekker-PT-015-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-11: DISJ true findpath
[lola][.] Dekker-PT-015-CTLFireability-2023-12: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-15: CTL false CTL model checker
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] Dekker-PT-015-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-02: DISJ 0 0 1 0 4 0 0 1
[lola][.] Dekker-PT-015-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 13 CTL EXCL 6/709 2/2000 Dekker-PT-015-CTLFireability-2024-02 249498 m, 33903 m/sec, 13494554 t fired, .
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[lola][I] fired transitions : 17509838
[lola][I] time used : 7
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[lola][I] LAUNCH task # 4 (type EXCL) for 3 Dekker-PT-015-CTLFireability-2024-01
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[lola][.] Dekker-PT-015-CTLFireability-2024-02: DISJ false DISJ
[lola][.] Dekker-PT-015-CTLFireability-2024-03: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-04: CTL false CTL model checker
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[lola][.] Dekker-PT-015-CTLFireability-2024-07: CTL true CTL model checker
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[lola][.] Dekker-PT-015-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-11: DISJ true findpath
[lola][.] Dekker-PT-015-CTLFireability-2023-12: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-15: CTL false CTL model checker
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[lola][.] Dekker-PT-015-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 4 CTL EXCL 4/884 1/2000 Dekker-PT-015-CTLFireability-2024-01 157286 m, 31457 m/sec, 4130292 t fired, .
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[lola][.] Dekker-PT-015-CTLFireability-2024-07: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-08: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-11: DISJ true findpath
[lola][.] Dekker-PT-015-CTLFireability-2023-12: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-15: CTL false CTL model checker
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] Dekker-PT-015-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 4 CTL EXCL 9/884 2/2000 Dekker-PT-015-CTLFireability-2024-01 257551 m, 20053 m/sec, 13608439 t fired, .
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[lola][I] markings : 278528
[lola][I] fired transitions : 17391646
[lola][I] time used : 11
[lola][I] memory pages used : 2
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] Dekker-PT-015-CTLFireability-2024-01: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-02: DISJ false DISJ
[lola][.] Dekker-PT-015-CTLFireability-2024-03: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-04: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-05: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-06: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-07: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-08: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-11: DISJ true findpath
[lola][.] Dekker-PT-015-CTLFireability-2023-12: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] Dekker-PT-015-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] Dekker-PT-015-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 1 CTL EXCL 3/1176 1/2000 Dekker-PT-015-CTLFireability-2024-00 174685 m, 34937 m/sec, 7458130 t fired, .
[lola][.]
[lola][.] Time elapsed: 75 secs. Pages in use: 2
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I] FINISHED task # 1 (type EXCL) for Dekker-PT-015-CTLFireability-2024-00
[lola][I] result : true
[lola][I] markings : 278528
[lola][I] fired transitions : 17778205
[lola][I] time used : 7
[lola][I] memory pages used : 2
[lola][I] LAUNCH task # 36 (type EXCL) for 35 Dekker-PT-015-CTLFireability-2024-09
[lola][I] time limit : 1760 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 36 (type EXCL) for Dekker-PT-015-CTLFireability-2024-09
[lola][I] result : true
[lola][I] markings : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 63 (type EXCL) for 62 Dekker-PT-015-CTLFireability-2023-14
[lola][I] time limit : 3521 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] Dekker-PT-015-CTLFireability-2024-00: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-01: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-02: DISJ false DISJ
[lola][.] Dekker-PT-015-CTLFireability-2024-03: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-04: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-05: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-06: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-07: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-08: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-09: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-11: DISJ true findpath
[lola][.] Dekker-PT-015-CTLFireability-2023-12: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] Dekker-PT-015-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 63 CTL EXCL 1/3521 1/2000 Dekker-PT-015-CTLFireability-2023-14 98069 m, 19613 m/sec, 1569485 t fired, .
[lola][.]
[lola][.] Time elapsed: 80 secs. Pages in use: 2
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] Dekker-PT-015-CTLFireability-2024-00: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-01: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-02: DISJ false DISJ
[lola][.] Dekker-PT-015-CTLFireability-2024-03: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-04: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-05: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-06: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-07: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-08: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-09: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2024-11: DISJ true findpath
[lola][.] Dekker-PT-015-CTLFireability-2023-12: CTL false CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] Dekker-PT-015-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] Dekker-PT-015-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 63 CTL EXCL 6/3521 2/2000 Dekker-PT-015-CTLFireability-2023-14 252265 m, 30839 m/sec, 13983452 t fired, .
[lola][.]
[lola][.] Time elapsed: 85 secs. Pages in use: 2
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I] FINISHED task # 63 (type EXCL) for Dekker-PT-015-CTLFireability-2023-14
[lola][I] result : true
[lola][I] markings : 278528
[lola][I] fired transitions : 18026749
[lola][I] time used : 7
[lola][I] memory pages used : 2
[lola][I] Portfolio finished: no open formulas

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Dekker-PT-015"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is Dekker-PT-015, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r137-tall-171631133500090"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Dekker-PT-015.tgz
mv Dekker-PT-015 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;