fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r131-smll-171624288500164
Last Updated
July 7, 2024

About the Execution of 2023-gold for DLCround-PT-12a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
532.300 16890.00 29159.00 508.10 TTTTTTTFFFTFFTFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r131-smll-171624288500164.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool gold2023
Input is DLCround-PT-12a, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r131-smll-171624288500164
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.4M
-rw-r--r-- 1 mcc users 8.3K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 94K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.9K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.1K Apr 22 14:38 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Apr 22 14:38 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Apr 22 14:38 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 22 14:38 LTLFireability.xml
-rw-r--r-- 1 mcc users 16K Apr 13 18:35 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 173K Apr 13 18:35 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.7K Apr 13 17:27 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K Apr 13 17:27 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:38 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:38 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 871K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-2024-00
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-2024-01
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-2024-02
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-2024-03
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-2024-04
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-2024-05
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-2024-06
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-2024-07
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-2024-08
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-2024-09
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-2024-10
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-2024-11
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-2024-12
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-2024-13
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-2024-14
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-2024-15

=== Now, execution of the tool begins

BK_START 1716398545368

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=gold2023
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCround-PT-12a
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2024-05-22 17:22:27] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2024-05-22 17:22:27] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-22 17:22:28] [INFO ] Load time of PNML (sax parser for PT used): 298 ms
[2024-05-22 17:22:28] [INFO ] Transformed 419 places.
[2024-05-22 17:22:28] [INFO ] Transformed 3407 transitions.
[2024-05-22 17:22:28] [INFO ] Found NUPN structural information;
[2024-05-22 17:22:28] [INFO ] Parsed PT model containing 419 places and 3407 transitions and 13330 arcs in 441 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 28 ms.
Working with output stream class java.io.PrintStream
Ensure Unique test removed 315 transitions
Reduce redundant transitions removed 315 transitions.
FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 879 ms. (steps per millisecond=11 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 74 ms. (steps per millisecond=135 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 123 ms. (steps per millisecond=81 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 113 ms. (steps per millisecond=88 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 71 ms. (steps per millisecond=140 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 201 ms. (steps per millisecond=49 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 74 ms. (steps per millisecond=135 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 88 ms. (steps per millisecond=113 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 63 ms. (steps per millisecond=158 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 107 ms. (steps per millisecond=93 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 108 ms. (steps per millisecond=92 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 67 ms. (steps per millisecond=149 ) properties (out of 11) seen :0
Interrupted probabilistic random walk after 66695 steps, run timeout after 3001 ms. (steps per millisecond=22 ) properties seen :{}
Probabilistic random walk after 66695 steps, saw 52121 distinct states, run finished after 3004 ms. (steps per millisecond=22 ) properties seen :0
Running SMT prover for 11 properties.
[2024-05-22 17:22:33] [INFO ] Flow matrix only has 250 transitions (discarded 2842 similar events)
// Phase 1: matrix 250 rows 419 cols
[2024-05-22 17:22:33] [INFO ] Computed 277 invariants in 15 ms
[2024-05-22 17:22:34] [INFO ] After 638ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:11
[2024-05-22 17:22:34] [INFO ] [Nat]Absence check using 277 positive place invariants in 100 ms returned sat
[2024-05-22 17:22:34] [INFO ] After 424ms SMT Verify possible using all constraints in natural domain returned unsat :11 sat :0
FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-15 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-14 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-13 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-11 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-10 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-09 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-08 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-05 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-04 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-02 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-00 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 11 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
All properties solved without resorting to model-checking.
Total runtime 6906 ms.
starting LoLA
BK_INPUT DLCround-PT-12a
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-12a-ReachabilityCardinality-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1716398562258

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 50 (type SKEL/FNDP) for 3 DLCround-PT-12a-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type SKEL/EQUN) for 3 DLCround-PT-12a-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type SKEL/SRCH) for 3 DLCround-PT-12a-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 54 (type SKEL/SRCH) for 3 DLCround-PT-12a-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 53 (type SKEL/SRCH) for DLCround-PT-12a-ReachabilityCardinality-2024-01
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 50 (type FNDP) for DLCround-PT-12a-ReachabilityCardinality-2024-01 (obsolete)
lola: CANCELED task # 51 (type EQUN) for DLCround-PT-12a-ReachabilityCardinality-2024-01 (obsolete)
lola: CANCELED task # 54 (type SRCH) for DLCround-PT-12a-ReachabilityCardinality-2024-01 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-51.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 51 (type SKEL/EQUN) for DLCround-PT-12a-ReachabilityCardinality-2024-01
lola: result : false
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 58 (type SKEL/FNDP) for 15 DLCround-PT-12a-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SKEL/EQUN) for 15 DLCround-PT-12a-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type SKEL/SRCH) for 15 DLCround-PT-12a-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 62 (type SKEL/SRCH) for 15 DLCround-PT-12a-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 62 (type SKEL/SRCH) for DLCround-PT-12a-ReachabilityCardinality-2024-05
lola: result : false
lola: markings : 7
lola: fired transitions : 32
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 58 (type FNDP) for DLCround-PT-12a-ReachabilityCardinality-2024-05 (obsolete)
lola: CANCELED task # 59 (type EQUN) for DLCround-PT-12a-ReachabilityCardinality-2024-05 (obsolete)
lola: CANCELED task # 61 (type SRCH) for DLCround-PT-12a-ReachabilityCardinality-2024-05 (obsolete)
lola: FINISHED task # 61 (type SKEL/SRCH) for DLCround-PT-12a-ReachabilityCardinality-2024-05
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 58 (type SKEL/FNDP) for DLCround-PT-12a-ReachabilityCardinality-2024-05
lola: result : unknown
lola: fired transitions : 1421
lola: tried executions : 712
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 59 (type SKEL/EQUN) for DLCround-PT-12a-ReachabilityCardinality-2024-05
lola: result : unknown
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 28 (type CNST) for 27 DLCround-PT-12a-ReachabilityCardinality-2024-09
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 34 (type CNST) for 33 DLCround-PT-12a-ReachabilityCardinality-2024-11
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 43 (type CNST) for 42 DLCround-PT-12a-ReachabilityCardinality-2024-14
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 43 (type CNST) for DLCround-PT-12a-ReachabilityCardinality-2024-14
lola: result : false
lola: LAUNCH INITIAL
lola: LAUNCH task # 1 (type CNST) for 0 DLCround-PT-12a-ReachabilityCardinality-2024-00
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 40 (type CNST) for 39 DLCround-PT-12a-ReachabilityCardinality-2024-13
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 1 (type CNST) for DLCround-PT-12a-ReachabilityCardinality-2024-00
lola: result : true
lola: FINISHED task # 40 (type CNST) for DLCround-PT-12a-ReachabilityCardinality-2024-13
lola: result : true
lola: planning for DLCround-PT-12a-ReachabilityCardinality-2024-01 stopped (result already fixed).
lola: planning for DLCround-PT-12a-ReachabilityCardinality-2024-05 stopped (result already fixed).
lola: FINISHED task # 34 (type CNST) for DLCround-PT-12a-ReachabilityCardinality-2024-11
lola: result : false
lola: FINISHED task # 28 (type CNST) for DLCround-PT-12a-ReachabilityCardinality-2024-09
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 66 (type SKEL/FNDP) for 45 DLCround-PT-12a-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type SKEL/EQUN) for 45 DLCround-PT-12a-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type SKEL/SRCH) for 45 DLCround-PT-12a-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 70 (type SKEL/SRCH) for 45 DLCround-PT-12a-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 69 (type SKEL/SRCH) for DLCround-PT-12a-ReachabilityCardinality-2024-15
lola: result : false
lola: markings : 11
lola: fired transitions : 100
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 66 (type FNDP) for DLCround-PT-12a-ReachabilityCardinality-2024-15 (obsolete)
lola: CANCELED task # 67 (type EQUN) for DLCround-PT-12a-ReachabilityCardinality-2024-15 (obsolete)
lola: CANCELED task # 70 (type SRCH) for DLCround-PT-12a-ReachabilityCardinality-2024-15 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 73 (type SKEL/FNDP) for 36 DLCround-PT-12a-ReachabilityCardinality-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 74 (type SKEL/EQUN) for 36 DLCround-PT-12a-ReachabilityCardinality-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 76 (type SKEL/SRCH) for 36 DLCround-PT-12a-ReachabilityCardinality-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 77 (type SKEL/SRCH) for 36 DLCround-PT-12a-ReachabilityCardinality-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-67.sara.
lola: FINISHED task # 77 (type SKEL/SRCH) for DLCround-PT-12a-ReachabilityCardinality-2024-12
lola: result : false
lola: markings : 56
lola: fired transitions : 277
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 73 (type FNDP) for DLCround-PT-12a-ReachabilityCardinality-2024-12 (obsolete)
lola: CANCELED task # 74 (type EQUN) for DLCround-PT-12a-ReachabilityCardinality-2024-12 (obsolete)
lola: CANCELED task # 76 (type SRCH) for DLCround-PT-12a-ReachabilityCardinality-2024-12 (obsolete)
lola: FINISHED task # 73 (type SKEL/FNDP) for DLCround-PT-12a-ReachabilityCardinality-2024-12
lola: result : unknown
lola: fired transitions : 9663
lola: tried executions : 4833
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-74.sara.
sara: place or transition ordering is non-deterministic

sara: place or transition ordering is non-deterministic
lola: FINISHED task # 74 (type SKEL/EQUN) for DLCround-PT-12a-ReachabilityCardinality-2024-12
lola: result : false

lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 84 (type EXCL) for 30 DLCround-PT-12a-ReachabilityCardinality-2024-10
lola: time limit : 513 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 80 (type FNDP) for 30 DLCround-PT-12a-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 81 (type EQUN) for 30 DLCround-PT-12a-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 83 (type SRCH) for 30 DLCround-PT-12a-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 84 (type EXCL) for DLCround-PT-12a-ReachabilityCardinality-2024-10
lola: result : false
lola: markings : 4
lola: fired transitions : 25
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 80 (type FNDP) for DLCround-PT-12a-ReachabilityCardinality-2024-10 (obsolete)
lola: CANCELED task # 81 (type EQUN) for DLCround-PT-12a-ReachabilityCardinality-2024-10 (obsolete)
lola: CANCELED task # 83 (type SRCH) for DLCround-PT-12a-ReachabilityCardinality-2024-10 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 91 (type EXCL) for 6 DLCround-PT-12a-ReachabilityCardinality-2024-02
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 87 (type FNDP) for 6 DLCround-PT-12a-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 88 (type EQUN) for 6 DLCround-PT-12a-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 90 (type SRCH) for 6 DLCround-PT-12a-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 67 (type SKEL/EQUN) for DLCround-PT-12a-ReachabilityCardinality-2024-15
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 81 (type EQUN) for DLCround-PT-12a-ReachabilityCardinality-2024-10
lola: result : false
lola: FINISHED task # 91 (type EXCL) for DLCround-PT-12a-ReachabilityCardinality-2024-02
lola: result : false
lola: markings : 20
lola: fired transitions : 198
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 87 (type FNDP) for DLCround-PT-12a-ReachabilityCardinality-2024-02 (obsolete)
lola: CANCELED task # 88 (type EQUN) for DLCround-PT-12a-ReachabilityCardinality-2024-02 (obsolete)
lola: CANCELED task # 90 (type SRCH) for DLCround-PT-12a-ReachabilityCardinality-2024-02 (obsolete)
lola: LAUNCH task # 98 (type EXCL) for 9 DLCround-PT-12a-ReachabilityCardinality-2024-03
lola: time limit : 718 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 94 (type FNDP) for 9 DLCround-PT-12a-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 95 (type EQUN) for 9 DLCround-PT-12a-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 97 (type SRCH) for 9 DLCround-PT-12a-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 98 (type EXCL) for DLCround-PT-12a-ReachabilityCardinality-2024-03
lola: result : false
lola: markings : 19
lola: fired transitions : 154
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 94 (type FNDP) for DLCround-PT-12a-ReachabilityCardinality-2024-03 (obsolete)
lola: CANCELED task # 95 (type EQUN) for DLCround-PT-12a-ReachabilityCardinality-2024-03 (obsolete)
lola: CANCELED task # 97 (type SRCH) for DLCround-PT-12a-ReachabilityCardinality-2024-03 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-88.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-95.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 105 (type EXCL) for 12 DLCround-PT-12a-ReachabilityCardinality-2024-04
lola: sara: place or transition ordering is non-deterministic
time limit : 898 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 101 (type FNDP) for 12 DLCround-PT-12a-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 102 (type EQUN) for 12 DLCround-PT-12a-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 104 (type SRCH) for 12 DLCround-PT-12a-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 105 (type EXCL) for DLCround-PT-12a-ReachabilityCardinality-2024-04
lola: result : false
lola: markings : 18
lola: fired transitions : 67
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 101 (type FNDP) for DLCround-PT-12a-ReachabilityCardinality-2024-04 (obsolete)
lola: CANCELED task # 102 (type EQUN) for DLCround-PT-12a-ReachabilityCardinality-2024-04 (obsolete)
lola: CANCELED task # 104 (type SRCH) for DLCround-PT-12a-ReachabilityCardinality-2024-04 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 111 (type EXCL) for 24 DLCround-PT-12a-ReachabilityCardinality-2024-08
lola: time limit : 1198 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 107 (type FNDP) for 24 DLCround-PT-12a-ReachabilityCardinality-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 108 (type EQUN) for 24 DLCround-PT-12a-ReachabilityCardinality-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 110 (type SRCH) for 24 DLCround-PT-12a-ReachabilityCardinality-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: place or transition ordering is non-deterministic

lola: rewrite Frontend/Parser/formula_rewrite.k:711

lola: FINISHED task # 88 (type EQUN) for DLCround-PT-12a-ReachabilityCardinality-2024-02
lola: result : false
lola: FINISHED task # 110 (type SRCH) for DLCround-PT-12a-ReachabilityCardinality-2024-08
lola: result : false
lola: markings : 12
lola: fired transitions : 71
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 107 (type FNDP) for DLCround-PT-12a-ReachabilityCardinality-2024-08 (obsolete)
lola: CANCELED task # 108 (type EQUN) for DLCround-PT-12a-ReachabilityCardinality-2024-08 (obsolete)
lola: CANCELED task # 111 (type EXCL) for DLCround-PT-12a-ReachabilityCardinality-2024-08 (obsolete)
lola: FINISHED task # 107 (type FNDP) for DLCround-PT-12a-ReachabilityCardinality-2024-08
lola: result : unknown
lola: fired transitions : 525
lola: tried executions : 155
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-108.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 123 (type EXCL) for 21 DLCround-PT-12a-ReachabilityCardinality-2024-07
lola: time limit : 1796 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 119 (type FNDP) for 21 DLCround-PT-12a-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: planning for DLCround-PT-12a-ReachabilityCardinality-2024-12 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 120 (type EQUN) for 21 DLCround-PT-12a-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 122 (type SRCH) for 21 DLCround-PT-12a-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 123 (type EXCL) for DLCround-PT-12a-ReachabilityCardinality-2024-07
lola: result : false
lola: markings : 3
lola: fired transitions : 19
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 119 (type FNDP) for DLCround-PT-12a-ReachabilityCardinality-2024-07 (obsolete)
lola: CANCELED task # 120 (type EQUN) for DLCround-PT-12a-ReachabilityCardinality-2024-07 (obsolete)
lola: CANCELED task # 122 (type SRCH) for DLCround-PT-12a-ReachabilityCardinality-2024-07 (obsolete)
lola: FINISHED task # 95 (type EQUN) for DLCround-PT-12a-ReachabilityCardinality-2024-03
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-102.sara.

lola: LAUNCH task # 118 (type EXCL) for 18 DLCround-PT-12a-ReachabilityCardinality-2024-06
lola: time limit : 3593 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 114 (type FNDP) for 18 DLCround-PT-12a-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 115 (type EQUN) for 18 DLCround-PT-12a-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 117 (type SRCH) for 18 DLCround-PT-12a-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 108 (type EQUN) for DLCround-PT-12a-ReachabilityCardinality-2024-08
lola: result : false
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-120.sara.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: planning for DLCround-PT-12a-ReachabilityCardinality-2024-15 stopped (result already fixed).
lola: FINISHED task # 118 (type EXCL) for DLCround-PT-12a-ReachabilityCardinality-2024-06
lola: result : false
lola: markings : 10
lola: fired transitions : 91
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 114 (type FNDP) for DLCround-PT-12a-ReachabilityCardinality-2024-06 (obsolete)
lola: CANCELED task # 115 (type EQUN) for DLCround-PT-12a-ReachabilityCardinality-2024-06 (obsolete)
lola: CANCELED task # 117 (type SRCH) for DLCround-PT-12a-ReachabilityCardinality-2024-06 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-12a-ReachabilityCardinality-2024-00: INITIAL true preprocessing
DLCround-PT-12a-ReachabilityCardinality-2024-01: AG true skeleton: tandem / insertion
DLCround-PT-12a-ReachabilityCardinality-2024-02: AG true tandem / relaxed
DLCround-PT-12a-ReachabilityCardinality-2024-03: AG true tandem / relaxed
DLCround-PT-12a-ReachabilityCardinality-2024-04: AG true tandem / relaxed
DLCround-PT-12a-ReachabilityCardinality-2024-05: AG true skeleton: tandem / relaxed
DLCround-PT-12a-ReachabilityCardinality-2024-06: AG true tandem / relaxed
DLCround-PT-12a-ReachabilityCardinality-2024-07: EF false tandem / relaxed
DLCround-PT-12a-ReachabilityCardinality-2024-08: EF false tandem / insertion
DLCround-PT-12a-ReachabilityCardinality-2024-09: INITIAL false preprocessing
DLCround-PT-12a-ReachabilityCardinality-2024-10: AG true tandem / relaxed
DLCround-PT-12a-ReachabilityCardinality-2024-11: INITIAL false preprocessing
DLCround-PT-12a-ReachabilityCardinality-2024-12: EF false skeleton: tandem / relaxed
DLCround-PT-12a-ReachabilityCardinality-2024-13: INITIAL true preprocessing
DLCround-PT-12a-ReachabilityCardinality-2024-14: INITIAL false preprocessing
DLCround-PT-12a-ReachabilityCardinality-2024-15: AG true skeleton: tandem / insertion


Time elapsed: 7 secs. Pages in use: 2

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-12a"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="gold2023"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool gold2023"
echo " Input is DLCround-PT-12a, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r131-smll-171624288500164"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-12a.tgz
mv DLCround-PT-12a execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;