Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r131-smll-171624288400149.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool gold2023
Input is DLCround-PT-10b, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r131-smll-171624288400149
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.9M
-rw-r--r-- 1 mcc users 6.6K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 68K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.9K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 54K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:38 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 22 14:38 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 19 07:16 LTLFireability.txt
-rw-r--r-- 1 mcc users 14K May 19 18:11 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.5K Apr 13 12:17 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 84K Apr 13 12:17 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.7K Apr 13 12:17 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 63K Apr 13 12:17 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:38 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:38 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 1.5M May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-10b-ReachabilityCardinality-2024-00
FORMULA_NAME DLCround-PT-10b-ReachabilityCardinality-2024-01
FORMULA_NAME DLCround-PT-10b-ReachabilityCardinality-2024-02
FORMULA_NAME DLCround-PT-10b-ReachabilityCardinality-2024-03
FORMULA_NAME DLCround-PT-10b-ReachabilityCardinality-2024-04
FORMULA_NAME DLCround-PT-10b-ReachabilityCardinality-2024-05
FORMULA_NAME DLCround-PT-10b-ReachabilityCardinality-2024-06
FORMULA_NAME DLCround-PT-10b-ReachabilityCardinality-2024-07
FORMULA_NAME DLCround-PT-10b-ReachabilityCardinality-2024-08
FORMULA_NAME DLCround-PT-10b-ReachabilityCardinality-2024-09
FORMULA_NAME DLCround-PT-10b-ReachabilityCardinality-2024-10
FORMULA_NAME DLCround-PT-10b-ReachabilityCardinality-2024-11
FORMULA_NAME DLCround-PT-10b-ReachabilityCardinality-2024-12
FORMULA_NAME DLCround-PT-10b-ReachabilityCardinality-2024-13
FORMULA_NAME DLCround-PT-10b-ReachabilityCardinality-2024-14
FORMULA_NAME DLCround-PT-10b-ReachabilityCardinality-2024-15

=== Now, execution of the tool begins

BK_START 1716397888658

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=gold2023
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCround-PT-10b
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2024-05-22 17:11:31] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2024-05-22 17:11:31] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-22 17:11:31] [INFO ] Load time of PNML (sax parser for PT used): 438 ms
[2024-05-22 17:11:32] [INFO ] Transformed 3924 places.
[2024-05-22 17:11:32] [INFO ] Transformed 6192 transitions.
[2024-05-22 17:11:32] [INFO ] Found NUPN structural information;
[2024-05-22 17:11:32] [INFO ] Parsed PT model containing 3924 places and 6192 transitions and 17304 arcs in 906 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 22 ms.
Working with output stream class java.io.PrintStream
FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 874 ms. (steps per millisecond=11 ) properties (out of 10) seen :6
FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-14 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-11 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-08 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-07 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-02 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-00 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 55 ms. (steps per millisecond=181 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 71 ms. (steps per millisecond=140 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 4) seen :0
Running SMT prover for 4 properties.
// Phase 1: matrix 6192 rows 3924 cols
[2024-05-22 17:11:33] [INFO ] Computed 213 invariants in 82 ms
[2024-05-22 17:11:36] [INFO ] [Real]Absence check using 213 positive place invariants in 575 ms returned sat
[2024-05-22 17:11:36] [INFO ] After 3074ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2024-05-22 17:11:39] [INFO ] [Nat]Absence check using 213 positive place invariants in 292 ms returned sat
[2024-05-22 17:11:44] [INFO ] After 5075ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2024-05-22 17:11:47] [INFO ] Deduced a trap composed of 302 places in 2354 ms of which 14 ms to minimize.
[2024-05-22 17:11:47] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 3008 ms
[2024-05-22 17:11:50] [INFO ] Deduced a trap composed of 183 places in 1936 ms of which 2 ms to minimize.
[2024-05-22 17:11:50] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 2579 ms
[2024-05-22 17:11:52] [INFO ] After 12193ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 1036 ms.
[2024-05-22 17:11:53] [INFO ] After 16161ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Fused 4 Parikh solutions to 3 different solutions.
FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-03 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
Parikh walk visited 1 properties in 144 ms.
Support contains 41 out of 3924 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3924/3924 places, 6192/6192 transitions.
Graph (trivial) has 3546 edges and 3924 vertex of which 609 / 3924 are part of one of the 48 SCC in 18 ms
Free SCC test removed 561 places
Drop transitions removed 629 transitions
Reduce isomorphic transitions removed 629 transitions.
Drop transitions removed 1401 transitions
Trivial Post-agglo rules discarded 1401 transitions
Performed 1401 trivial Post agglomeration. Transition count delta: 1401
Iterating post reduction 0 with 1401 rules applied. Total rules applied 1402 place count 3363 transition count 4162
Reduce places removed 1401 places and 0 transitions.
Ensure Unique test removed 43 transitions
Reduce isomorphic transitions removed 43 transitions.
Drop transitions removed 31 transitions
Trivial Post-agglo rules discarded 31 transitions
Performed 31 trivial Post agglomeration. Transition count delta: 31
Iterating post reduction 1 with 1475 rules applied. Total rules applied 2877 place count 1962 transition count 4088
Reduce places removed 31 places and 0 transitions.
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 2 with 39 rules applied. Total rules applied 2916 place count 1931 transition count 4080
Reduce places removed 4 places and 0 transitions.
Performed 18 Post agglomeration using F-continuation condition.Transition count delta: 18
Iterating post reduction 3 with 22 rules applied. Total rules applied 2938 place count 1927 transition count 4062
Reduce places removed 18 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 4 with 20 rules applied. Total rules applied 2958 place count 1909 transition count 4060
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 5 with 1 rules applied. Total rules applied 2959 place count 1908 transition count 4060
Performed 22 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 6 with 22 Pre rules applied. Total rules applied 2959 place count 1908 transition count 4038
Deduced a syphon composed of 22 places in 28 ms
Reduce places removed 22 places and 0 transitions.
Iterating global reduction 6 with 44 rules applied. Total rules applied 3003 place count 1886 transition count 4038
Discarding 506 places :
Symmetric choice reduction at 6 with 506 rule applications. Total rules 3509 place count 1380 transition count 3532
Iterating global reduction 6 with 506 rules applied. Total rules applied 4015 place count 1380 transition count 3532
Performed 215 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 6 with 215 Pre rules applied. Total rules applied 4015 place count 1380 transition count 3317
Deduced a syphon composed of 215 places in 73 ms
Reduce places removed 215 places and 0 transitions.
Iterating global reduction 6 with 430 rules applied. Total rules applied 4445 place count 1165 transition count 3317
Discarding 71 places :
Symmetric choice reduction at 6 with 71 rule applications. Total rules 4516 place count 1094 transition count 2341
Iterating global reduction 6 with 71 rules applied. Total rules applied 4587 place count 1094 transition count 2341
Ensure Unique test removed 22 transitions
Reduce isomorphic transitions removed 22 transitions.
Iterating post reduction 6 with 22 rules applied. Total rules applied 4609 place count 1094 transition count 2319
Performed 286 Post agglomeration using F-continuation condition with reduction of 9 identical transitions.
Deduced a syphon composed of 286 places in 2 ms
Reduce places removed 286 places and 0 transitions.
Iterating global reduction 7 with 572 rules applied. Total rules applied 5181 place count 808 transition count 2024
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 7 with 7 rules applied. Total rules applied 5188 place count 808 transition count 2017
Discarding 4 places :
Symmetric choice reduction at 8 with 4 rule applications. Total rules 5192 place count 804 transition count 1961
Iterating global reduction 8 with 4 rules applied. Total rules applied 5196 place count 804 transition count 1961
Performed 62 Post agglomeration using F-continuation condition.Transition count delta: -668
Deduced a syphon composed of 62 places in 3 ms
Reduce places removed 62 places and 0 transitions.
Iterating global reduction 8 with 124 rules applied. Total rules applied 5320 place count 742 transition count 2629
Drop transitions removed 69 transitions
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 73 transitions.
Iterating post reduction 8 with 73 rules applied. Total rules applied 5393 place count 742 transition count 2556
Renaming transitions due to excessive name length > 1024 char.
Discarding 22 places :
Symmetric choice reduction at 9 with 22 rule applications. Total rules 5415 place count 720 transition count 1942
Iterating global reduction 9 with 22 rules applied. Total rules applied 5437 place count 720 transition count 1942
Ensure Unique test removed 17 transitions
Reduce isomorphic transitions removed 17 transitions.
Iterating post reduction 9 with 17 rules applied. Total rules applied 5454 place count 720 transition count 1925
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: -55
Deduced a syphon composed of 5 places in 2 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 10 with 10 rules applied. Total rules applied 5464 place count 715 transition count 1980
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 10 with 2 rules applied. Total rules applied 5466 place count 715 transition count 1978
Drop transitions removed 198 transitions
Redundant transition composition rules discarded 198 transitions
Iterating global reduction 11 with 198 rules applied. Total rules applied 5664 place count 715 transition count 1780
Discarding 10 places :
Symmetric choice reduction at 11 with 10 rule applications. Total rules 5674 place count 705 transition count 1629
Iterating global reduction 11 with 10 rules applied. Total rules applied 5684 place count 705 transition count 1629
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 11 with 8 rules applied. Total rules applied 5692 place count 705 transition count 1621
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: -20
Deduced a syphon composed of 3 places in 2 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 12 with 6 rules applied. Total rules applied 5698 place count 702 transition count 1641
Drop transitions removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 12 with 3 rules applied. Total rules applied 5701 place count 702 transition count 1638
Drop transitions removed 17 transitions
Redundant transition composition rules discarded 17 transitions
Iterating global reduction 13 with 17 rules applied. Total rules applied 5718 place count 702 transition count 1621
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -16
Deduced a syphon composed of 2 places in 2 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 13 with 4 rules applied. Total rules applied 5722 place count 700 transition count 1637
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 13 with 2 rules applied. Total rules applied 5724 place count 700 transition count 1635
Drop transitions removed 14 transitions
Redundant transition composition rules discarded 14 transitions
Iterating global reduction 14 with 14 rules applied. Total rules applied 5738 place count 700 transition count 1621
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -16
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 14 with 4 rules applied. Total rules applied 5742 place count 698 transition count 1637
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 14 with 2 rules applied. Total rules applied 5744 place count 698 transition count 1635
Drop transitions removed 14 transitions
Redundant transition composition rules discarded 14 transitions
Iterating global reduction 15 with 14 rules applied. Total rules applied 5758 place count 698 transition count 1621
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -20
Deduced a syphon composed of 2 places in 2 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 15 with 4 rules applied. Total rules applied 5762 place count 696 transition count 1641
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 15 with 2 rules applied. Total rules applied 5764 place count 696 transition count 1639
Drop transitions removed 10 transitions
Redundant transition composition rules discarded 10 transitions
Iterating global reduction 16 with 10 rules applied. Total rules applied 5774 place count 696 transition count 1629
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: -12
Deduced a syphon composed of 1 places in 2 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 16 with 2 rules applied. Total rules applied 5776 place count 695 transition count 1641
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 16 with 1 rules applied. Total rules applied 5777 place count 695 transition count 1640
Drop transitions removed 9 transitions
Redundant transition composition rules discarded 9 transitions
Iterating global reduction 17 with 9 rules applied. Total rules applied 5786 place count 695 transition count 1631
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: -12
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 17 with 2 rules applied. Total rules applied 5788 place count 694 transition count 1643
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 17 with 1 rules applied. Total rules applied 5789 place count 694 transition count 1642
Drop transitions removed 9 transitions
Redundant transition composition rules discarded 9 transitions
Iterating global reduction 18 with 9 rules applied. Total rules applied 5798 place count 694 transition count 1633
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: -12
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 18 with 2 rules applied. Total rules applied 5800 place count 693 transition count 1645
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 18 with 1 rules applied. Total rules applied 5801 place count 693 transition count 1644
Drop transitions removed 9 transitions
Redundant transition composition rules discarded 9 transitions
Iterating global reduction 19 with 9 rules applied. Total rules applied 5810 place count 693 transition count 1635
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: -13
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 19 with 2 rules applied. Total rules applied 5812 place count 692 transition count 1648
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 19 with 1 rules applied. Total rules applied 5813 place count 692 transition count 1647
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 20 with 1 rules applied. Total rules applied 5814 place count 692 transition count 1646
Free-agglomeration rule applied 359 times with reduction of 184 identical transitions.
Iterating global reduction 20 with 359 rules applied. Total rules applied 6173 place count 692 transition count 1103
Reduce places removed 359 places and 0 transitions.
Drop transitions removed 412 transitions
Ensure Unique test removed 10 transitions
Reduce isomorphic transitions removed 422 transitions.
Graph (complete) has 905 edges and 333 vertex of which 291 are kept as prefixes of interest. Removing 42 places using SCC suffix rule.2 ms
Discarding 42 places :
Also discarding 0 output transitions
Iterating post reduction 20 with 782 rules applied. Total rules applied 6955 place count 291 transition count 681
Drop transitions removed 8 transitions
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 11 transitions.
Iterating post reduction 21 with 11 rules applied. Total rules applied 6966 place count 291 transition count 670
Discarding 73 places :
Symmetric choice reduction at 22 with 73 rule applications. Total rules 7039 place count 218 transition count 536
Iterating global reduction 22 with 73 rules applied. Total rules applied 7112 place count 218 transition count 536
Drop transitions removed 81 transitions
Redundant transition composition rules discarded 81 transitions
Iterating global reduction 22 with 81 rules applied. Total rules applied 7193 place count 218 transition count 455
Reduce places removed 1 places and 0 transitions.
Graph (complete) has 622 edges and 217 vertex of which 215 are kept as prefixes of interest. Removing 2 places using SCC suffix rule.0 ms
Discarding 2 places :
Also discarding 0 output transitions
Iterating post reduction 22 with 2 rules applied. Total rules applied 7195 place count 215 transition count 455
Drop transitions removed 2 transitions
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 23 with 3 rules applied. Total rules applied 7198 place count 215 transition count 452
Discarding 7 places :
Symmetric choice reduction at 24 with 7 rule applications. Total rules 7205 place count 208 transition count 441
Iterating global reduction 24 with 7 rules applied. Total rules applied 7212 place count 208 transition count 441
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: -6
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 24 with 2 rules applied. Total rules applied 7214 place count 207 transition count 447
Drop transitions removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 24 with 5 rules applied. Total rules applied 7219 place count 207 transition count 442
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 25 with 1 rules applied. Total rules applied 7220 place count 207 transition count 441
Free-agglomeration rule applied 1 times.
Iterating global reduction 25 with 1 rules applied. Total rules applied 7221 place count 207 transition count 440
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 25 with 1 rules applied. Total rules applied 7222 place count 206 transition count 440
Free-agglomeration rule (complex) applied 2 times.
Iterating global reduction 26 with 2 rules applied. Total rules applied 7224 place count 206 transition count 467
Reduce places removed 2 places and 0 transitions.
Drop transitions removed 18 transitions
Reduce isomorphic transitions removed 18 transitions.
Iterating post reduction 26 with 20 rules applied. Total rules applied 7244 place count 204 transition count 449
Drop transitions removed 11 transitions
Redundant transition composition rules discarded 11 transitions
Iterating global reduction 27 with 11 rules applied. Total rules applied 7255 place count 204 transition count 438
Partial Free-agglomeration rule applied 3 times.
Drop transitions removed 3 transitions
Iterating global reduction 27 with 3 rules applied. Total rules applied 7258 place count 204 transition count 438
Applied a total of 7258 rules in 2241 ms. Remains 204 /3924 variables (removed 3720) and now considering 438/6192 (removed 5754) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 2242 ms. Remains : 204/3924 places, 438/6192 transitions.
Finished random walk after 667 steps, including 0 resets, run visited all 3 properties in 18 ms. (steps per millisecond=37 )
FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-15 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-09 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-05 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 24240 ms.
starting LoLA
BK_INPUT DLCround-PT-10b
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-ReachabilityCardinality-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1716397984061

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-10b-ReachabilityCardinality-2024-00: AG 0 0 0 0 1 0 0 0
DLCround-PT-10b-ReachabilityCardinality-2024-01: AG 0 0 0 0 0 0 0 0
DLCround-PT-10b-ReachabilityCardinality-2024-02: AG 0 0 0 0 1 0 0 0
DLCround-PT-10b-ReachabilityCardinality-2024-03: EF 0 0 0 0 0 0 0 0
DLCround-PT-10b-ReachabilityCardinality-2024-04: AG 0 0 0 0 1 0 0 0
DLCround-PT-10b-ReachabilityCardinality-2024-05: EF 0 0 0 0 1 0 0 0
DLCround-PT-10b-ReachabilityCardinality-2024-06: AG 0 0 0 0 1 0 0 0
DLCround-PT-10b-ReachabilityCardinality-2024-07: AG 0 0 0 0 0 0 0 0
DLCround-PT-10b-ReachabilityCardinality-2024-08: AG 0 0 0 0 1 0 0 0
DLCround-PT-10b-ReachabilityCardinality-2024-09: AG 0 0 0 0 0 0 0 0
DLCround-PT-10b-ReachabilityCardinality-2024-10: EF 0 0 0 0 1 0 0 0
DLCround-PT-10b-ReachabilityCardinality-2024-11: AG 0 0 0 0 1 0 0 0
DLCround-PT-10b-ReachabilityCardinality-2024-12: AG 0 0 0 0 1 0 0 0
DLCround-PT-10b-ReachabilityCardinality-2024-13: EF 0 0 0 0 1 0 0 0
DLCround-PT-10b-ReachabilityCardinality-2024-14: EF 0 0 0 0 1 0 0 0
DLCround-PT-10b-ReachabilityCardinality-2024-15: AG 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 48 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 53 (type EXCL) for 18 DLCround-PT-10b-ReachabilityCardinality-2024-06
lola: time limit : 221 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 49 (type FNDP) for 18 DLCround-PT-10b-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type EQUN) for 18 DLCround-PT-10b-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 52 (type SRCH) for 18 DLCround-PT-10b-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 53 (type EXCL) for DLCround-PT-10b-ReachabilityCardinality-2024-06
lola: result : false
lola: markings : 77
lola: fired transitions : 156
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 49 (type FNDP) for DLCround-PT-10b-ReachabilityCardinality-2024-06 (obsolete)
lola: CANCELED task # 50 (type EQUN) for DLCround-PT-10b-ReachabilityCardinality-2024-06 (obsolete)
lola: CANCELED task # 52 (type SRCH) for DLCround-PT-10b-ReachabilityCardinality-2024-06 (obsolete)
lola: FINISHED task # 50 (type EQUN) for DLCround-PT-10b-ReachabilityCardinality-2024-06
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 60 (type EXCL) for 3 DLCround-PT-10b-ReachabilityCardinality-2024-01
lola: time limit : 236 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 56 (type FNDP) for 3 DLCround-PT-10b-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
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lola: LAUNCH task # 57 (type EQUN) for 3 DLCround-PT-10b-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
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lola: LAUNCH task # 59 (type SRCH) for 3 DLCround-PT-10b-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 60 (type EXCL) for DLCround-PT-10b-ReachabilityCardinality-2024-01
lola: result : false
lola: markings : 91
lola: fired transitions : 146
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 56 (type FNDP) for DLCround-PT-10b-ReachabilityCardinality-2024-01 (obsolete)
lola: CANCELED task # 57 (type EQUN) for DLCround-PT-10b-ReachabilityCardinality-2024-01 (obsolete)
lola: CANCELED task # 59 (type SRCH) for DLCround-PT-10b-ReachabilityCardinality-2024-01 (obsolete)
lola: LAUNCH task # 67 (type EXCL) for 6 DLCround-PT-10b-ReachabilityCardinality-2024-02
lola: time limit : 253 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 63 (type FNDP) for 6 DLCround-PT-10b-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 64 (type EQUN) for 6 DLCround-PT-10b-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type SRCH) for 6 DLCround-PT-10b-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: FINISHED task # 67 (type EXCL) for DLCround-PT-10b-ReachabilityCardinality-2024-02
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 63 (type FNDP) for DLCround-PT-10b-ReachabilityCardinality-2024-02 (obsolete)
lola: CANCELED task # 64 (type EQUN) for DLCround-PT-10b-ReachabilityCardinality-2024-02 (obsolete)
lola: CANCELED task # 66 (type SRCH) for DLCround-PT-10b-ReachabilityCardinality-2024-02 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 63 (type FNDP) for DLCround-PT-10b-ReachabilityCardinality-2024-02
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-57.sara.
sara: place or transition ordering is non-deterministic

lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 74 (type EXCL) for 12 DLCround-PT-10b-ReachabilityCardinality-2024-04
lola: time limit : 273 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 70 (type FNDP) for 12 DLCround-PT-10b-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 71 (type EQUN) for 12 DLCround-PT-10b-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 73 (type SRCH) for 12 DLCround-PT-10b-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 57 (type EQUN) for DLCround-PT-10b-ReachabilityCardinality-2024-01
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 74 (type EXCL) for DLCround-PT-10b-ReachabilityCardinality-2024-04
lola: result : false
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 70 (type FNDP) for DLCround-PT-10b-ReachabilityCardinality-2024-04 (obsolete)
lola: CANCELED task # 71 (type EQUN) for DLCround-PT-10b-ReachabilityCardinality-2024-04 (obsolete)
lola: CANCELED task # 73 (type SRCH) for DLCround-PT-10b-ReachabilityCardinality-2024-04 (obsolete)
lola: LAUNCH task # 81 (type EXCL) for 24 DLCround-PT-10b-ReachabilityCardinality-2024-08
lola: time limit : 295 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 77 (type FNDP) for 24 DLCround-PT-10b-ReachabilityCardinality-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 78 (type EQUN) for 24 DLCround-PT-10b-ReachabilityCardinality-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 80 (type SRCH) for 24 DLCround-PT-10b-ReachabilityCardinality-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 81 (type EXCL) for DLCround-PT-10b-ReachabilityCardinality-2024-08
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 77 (type FNDP) for DLCround-PT-10b-ReachabilityCardinality-2024-08 (obsolete)
lola: CANCELED task # 78 (type EQUN) for DLCround-PT-10b-ReachabilityCardinality-2024-08 (obsolete)
lola: CANCELED task # 80 (type SRCH) for DLCround-PT-10b-ReachabilityCardinality-2024-08 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-64.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 77 (type FNDP) for DLCround-PT-10b-ReachabilityCardinality-2024-08
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-78.sara.

lola: FINISHED task # 64 (type EQUN) for DLCround-PT-10b-ReachabilityCardinality-2024-02
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 88 (type EXCL) for 0 DLCround-PT-10b-ReachabilityCardinality-2024-00
lola: time limit : 322 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-71.sara.
lola: LAUNCH task # 84 (type FNDP) for 0 DLCround-PT-10b-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 85 (type EQUN) for 0 DLCround-PT-10b-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: place or transition ordering is non-deterministic

lola: LAUNCH task # 87 (type SRCH) for 0 DLCround-PT-10b-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 78 (type EQUN) for DLCround-PT-10b-ReachabilityCardinality-2024-08
lola: result : true
lola: FINISHED task # 88 (type EXCL) for DLCround-PT-10b-ReachabilityCardinality-2024-00
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 84 (type FNDP) for DLCround-PT-10b-ReachabilityCardinality-2024-00 (obsolete)
lola: CANCELED task # 85 (type EQUN) for DLCround-PT-10b-ReachabilityCardinality-2024-00 (obsolete)
lola: CANCELED task # 87 (type SRCH) for DLCround-PT-10b-ReachabilityCardinality-2024-00 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 84 (type FNDP) for DLCround-PT-10b-ReachabilityCardinality-2024-00
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 71 (type EQUN) for DLCround-PT-10b-ReachabilityCardinality-2024-04
lola: result : false
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-85.sara.

lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 94 (type EXCL) for 9 DLCround-PT-10b-ReachabilityCardinality-2024-03
lola: time limit : 354 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 90 (type FNDP) for 9 DLCround-PT-10b-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 91 (type EQUN) for 9 DLCround-PT-10b-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 93 (type SRCH) for 9 DLCround-PT-10b-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 85 (type EQUN) for DLCround-PT-10b-ReachabilityCardinality-2024-00
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 90 (type FNDP) for DLCround-PT-10b-ReachabilityCardinality-2024-03
lola: result : true
lola: fired transitions : 4
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 93 (type SRCH) for DLCround-PT-10b-ReachabilityCardinality-2024-03
lola: result : true
lola: markings : 6
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 91 (type EQUN) for DLCround-PT-10b-ReachabilityCardinality-2024-03 (obsolete)
lola: CANCELED task # 94 (type EXCL) for DLCround-PT-10b-ReachabilityCardinality-2024-03 (obsolete)
lola: LAUNCH task # 100 (type EXCL) for 42 DLCround-PT-10b-ReachabilityCardinality-2024-14
lola: time limit : 394 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 96 (type FNDP) for 42 DLCround-PT-10b-ReachabilityCardinality-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 97 (type EQUN) for 42 DLCround-PT-10b-ReachabilityCardinality-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 99 (type SRCH) for 42 DLCround-PT-10b-ReachabilityCardinality-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 100 (type EXCL) for DLCround-PT-10b-ReachabilityCardinality-2024-14
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 96 (type FNDP) for DLCround-PT-10b-ReachabilityCardinality-2024-14 (obsolete)
lola: CANCELED task # 97 (type EQUN) for DLCround-PT-10b-ReachabilityCardinality-2024-14 (obsolete)
lola: CANCELED task # 99 (type SRCH) for DLCround-PT-10b-ReachabilityCardinality-2024-14 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-91.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 96 (type FNDP) for DLCround-PT-10b-ReachabilityCardinality-2024-14
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-97.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 91 (type EQUN) for DLCround-PT-10b-ReachabilityCardinality-2024-03
lola: result : true
lola: FINISHED task # 97 (type EQUN) for DLCround-PT-10b-ReachabilityCardinality-2024-14
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 107 (type EXCL) for 27 DLCround-PT-10b-ReachabilityCardinality-2024-09
lola: time limit : 443 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 103 (type FNDP) for 27 DLCround-PT-10b-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 104 (type EQUN) for 27 DLCround-PT-10b-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 106 (type SRCH) for 27 DLCround-PT-10b-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 107 (type EXCL) for DLCround-PT-10b-ReachabilityCardinality-2024-09
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 103 (type FNDP) for DLCround-PT-10b-ReachabilityCardinality-2024-09 (obsolete)
lola: CANCELED task # 104 (type EQUN) for DLCround-PT-10b-ReachabilityCardinality-2024-09 (obsolete)
lola: CANCELED task # 106 (type SRCH) for DLCround-PT-10b-ReachabilityCardinality-2024-09 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 103 (type FNDP) for DLCround-PT-10b-ReachabilityCardinality-2024-09
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-104.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 104 (type EQUN) for DLCround-PT-10b-ReachabilityCardinality-2024-09
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 114 (type EXCL) for 45 DLCround-PT-10b-ReachabilityCardinality-2024-15
lola: time limit : 506 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 110 (type FNDP) for 45 DLCround-PT-10b-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 111 (type EQUN) for 45 DLCround-PT-10b-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 113 (type SRCH) for 45 DLCround-PT-10b-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 113 (type SRCH) for DLCround-PT-10b-ReachabilityCardinality-2024-15
lola: result : true
lola: markings : 8
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 110 (type FNDP) for DLCround-PT-10b-ReachabilityCardinality-2024-15 (obsolete)
lola: CANCELED task # 111 (type EQUN) for DLCround-PT-10b-ReachabilityCardinality-2024-15 (obsolete)
lola: CANCELED task # 114 (type EXCL) for DLCround-PT-10b-ReachabilityCardinality-2024-15 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 110 (type FNDP) for DLCround-PT-10b-ReachabilityCardinality-2024-15
lola: result : true
lola: fired transitions : 6
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-111.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 111 (type EQUN) for DLCround-PT-10b-ReachabilityCardinality-2024-15
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 121 (type EXCL) for 36 DLCround-PT-10b-ReachabilityCardinality-2024-12
lola: time limit : 591 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 117 (type FNDP) for 36 DLCround-PT-10b-ReachabilityCardinality-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 118 (type EQUN) for 36 DLCround-PT-10b-ReachabilityCardinality-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 120 (type SRCH) for 36 DLCround-PT-10b-ReachabilityCardinality-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 120 (type SRCH) for DLCround-PT-10b-ReachabilityCardinality-2024-12
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 117 (type FNDP) for DLCround-PT-10b-ReachabilityCardinality-2024-12 (obsolete)
lola: CANCELED task # 118 (type EQUN) for DLCround-PT-10b-ReachabilityCardinality-2024-12 (obsolete)
lola: CANCELED task # 121 (type EXCL) for DLCround-PT-10b-ReachabilityCardinality-2024-12 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 127 (type EXCL) for 39 DLCround-PT-10b-ReachabilityCardinality-2024-13
lola: time limit : 709 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 123 (type FNDP) for 39 DLCround-PT-10b-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 124 (type EQUN) for 39 DLCround-PT-10b-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 126 (type SRCH) for 39 DLCround-PT-10b-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-118.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-124.sara.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-10b-ReachabilityCardinality-2024-00: AG false tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-01: AG true tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-02: AG false tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-03: EF true findpath
DLCround-PT-10b-ReachabilityCardinality-2024-04: AG true tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-06: AG true tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-08: AG false tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-09: AG false tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-12: AG true tandem / insertion
DLCround-PT-10b-ReachabilityCardinality-2024-14: EF true tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-15: AG false tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-10b-ReachabilityCardinality-2024-05: EF 0 5 0 0 1 0 0 0
DLCround-PT-10b-ReachabilityCardinality-2024-07: AG 0 0 0 0 1 0 0 0
DLCround-PT-10b-ReachabilityCardinality-2024-10: EF 0 5 0 0 1 0 0 0
DLCround-PT-10b-ReachabilityCardinality-2024-11: AG 0 5 0 0 1 0 0 0
DLCround-PT-10b-ReachabilityCardinality-2024-13: EF 0 1 4 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
123 EF FNDP 1/590 0/5 DLCround-PT-10b-ReachabilityCardinality-2024-13 3645 t fired, 1 attempts, .
124 EF STEQ 1/708 0/5 DLCround-PT-10b-ReachabilityCardinality-2024-13 sara is running.
126 EF SRCH 1/708 1/5 DLCround-PT-10b-ReachabilityCardinality-2024-13 5528 m, 1105 m/sec, 9043 t fired, .
127 EF EXCL 1/709 1/32 DLCround-PT-10b-ReachabilityCardinality-2024-13 556 m, 111 m/sec, 708 t fired, .

Time elapsed: 53 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787

lola: FINISHED task # 118 (type EQUN) for DLCround-PT-10b-ReachabilityCardinality-2024-12
lola: result : false
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 124 (type EQUN) for DLCround-PT-10b-ReachabilityCardinality-2024-13
lola: result : false
lola: CANCELED task # 123 (type FNDP) for DLCround-PT-10b-ReachabilityCardinality-2024-13 (obsolete)
lola: CANCELED task # 126 (type SRCH) for DLCround-PT-10b-ReachabilityCardinality-2024-13 (obsolete)
lola: CANCELED task # 127 (type EXCL) for DLCround-PT-10b-ReachabilityCardinality-2024-13 (obsolete)
lola: LAUNCH task # 146 (type EXCL) for 33 DLCround-PT-10b-ReachabilityCardinality-2024-11
lola: time limit : 885 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 129 (type FNDP) for 15 DLCround-PT-10b-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 130 (type EQUN) for 15 DLCround-PT-10b-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 132 (type SRCH) for 15 DLCround-PT-10b-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 123 (type FNDP) for DLCround-PT-10b-ReachabilityCardinality-2024-13
lola: result : unknown
lola: fired transitions : 58665
lola: tried executions : 2
lola: time used : 6.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 146 (type EXCL) for DLCround-PT-10b-ReachabilityCardinality-2024-11
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 153 (type EXCL) for 21 DLCround-PT-10b-ReachabilityCardinality-2024-07
lola: time limit : 1180 sec
lola: memory limit: 32 pages
lola: FINISHED task # 153 (type EXCL) for DLCround-PT-10b-ReachabilityCardinality-2024-07
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 140 (type EXCL) for 30 DLCround-PT-10b-ReachabilityCardinality-2024-10
lola: time limit : 1771 sec
lola: memory limit: 32 pages
lola: FINISHED task # 129 (type FNDP) for DLCround-PT-10b-ReachabilityCardinality-2024-05
lola: result : true
lola: fired transitions : 574
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 130 (type EQUN) for DLCround-PT-10b-ReachabilityCardinality-2024-05 (obsolete)
lola: CANCELED task # 132 (type SRCH) for DLCround-PT-10b-ReachabilityCardinality-2024-05 (obsolete)
lola: LAUNCH task # 136 (type FNDP) for 30 DLCround-PT-10b-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 137 (type EQUN) for 30 DLCround-PT-10b-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 139 (type SRCH) for 30 DLCround-PT-10b-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-137.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-10b-ReachabilityCardinality-2024-00: AG false tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-01: AG true tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-02: AG false tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-03: EF true findpath
DLCround-PT-10b-ReachabilityCardinality-2024-04: AG true tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-05: EF true findpath
DLCround-PT-10b-ReachabilityCardinality-2024-06: AG true tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-07: AG false tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-08: AG false tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-09: AG false tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-11: AG false tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-12: AG true tandem / insertion
DLCround-PT-10b-ReachabilityCardinality-2024-13: EF false state equation
DLCround-PT-10b-ReachabilityCardinality-2024-14: EF true tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-15: AG false tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-10b-ReachabilityCardinality-2024-10: EF 0 1 4 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
136 EF FNDP 0/1771 0/5 DLCround-PT-10b-ReachabilityCardinality-2024-10 11752 t fired, 1 attempts, .
137 EF STEQ 0/3542 0/5 DLCround-PT-10b-ReachabilityCardinality-2024-10 sara is running.
139 EF SRCH 0/3542 1/5 DLCround-PT-10b-ReachabilityCardinality-2024-10 11071 m, 2214 m/sec, 16414 t fired, .
140 EF EXCL 0/3542 1/32 DLCround-PT-10b-ReachabilityCardinality-2024-10 420 m, 84 m/sec, 512 t fired, .

Time elapsed: 58 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-130.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-10b-ReachabilityCardinality-2024-00: AG false tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-01: AG true tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-02: AG false tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-03: EF true findpath
DLCround-PT-10b-ReachabilityCardinality-2024-04: AG true tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-05: EF true findpath
DLCround-PT-10b-ReachabilityCardinality-2024-06: AG true tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-07: AG false tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-08: AG false tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-09: AG false tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-11: AG false tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-12: AG true tandem / insertion
DLCround-PT-10b-ReachabilityCardinality-2024-13: EF false state equation
DLCround-PT-10b-ReachabilityCardinality-2024-14: EF true tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-15: AG false tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-10b-ReachabilityCardinality-2024-10: EF 0 1 4 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
136 EF FNDP 5/1771 0/5 DLCround-PT-10b-ReachabilityCardinality-2024-10 165414 t fired, 1 attempts, .
137 EF STEQ 5/3542 0/5 DLCround-PT-10b-ReachabilityCardinality-2024-10 sara is running.
139 EF SRCH 5/3542 1/5 DLCround-PT-10b-ReachabilityCardinality-2024-10 160047 m, 29795 m/sec, 238598 t fired, .
140 EF EXCL 5/3542 1/32 DLCround-PT-10b-ReachabilityCardinality-2024-10 5525 m, 1021 m/sec, 7739 t fired, .

Time elapsed: 63 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16

lola: FINISHED task # 137 (type EQUN) for DLCround-PT-10b-ReachabilityCardinality-2024-10
lola: result : false
lola: CANCELED task # 136 (type FNDP) for DLCround-PT-10b-ReachabilityCardinality-2024-10 (obsolete)
lola: CANCELED task # 139 (type SRCH) for DLCround-PT-10b-ReachabilityCardinality-2024-10 (obsolete)
lola: CANCELED task # 140 (type EXCL) for DLCround-PT-10b-ReachabilityCardinality-2024-10 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-10b-ReachabilityCardinality-2024-00: AG false tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-01: AG true tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-02: AG false tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-03: EF true findpath
DLCround-PT-10b-ReachabilityCardinality-2024-04: AG true tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-05: EF true findpath
DLCround-PT-10b-ReachabilityCardinality-2024-06: AG true tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-07: AG false tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-08: AG false tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-09: AG false tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-10: EF false state equation
DLCround-PT-10b-ReachabilityCardinality-2024-11: AG false tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-12: AG true tandem / insertion
DLCround-PT-10b-ReachabilityCardinality-2024-13: EF false state equation
DLCround-PT-10b-ReachabilityCardinality-2024-14: EF true tandem / relaxed
DLCround-PT-10b-ReachabilityCardinality-2024-15: AG false tandem / insertion


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-10b"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="gold2023"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool gold2023"
echo " Input is DLCround-PT-10b, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r131-smll-171624288400149"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-10b.tgz
mv DLCround-PT-10b execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;