fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r131-smll-171624288400130
Last Updated
July 7, 2024

About the Execution of 2023-gold for DLCround-PT-08b

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1120.264 74523.00 107215.00 801.10 FFTTFTTTFTFFTTFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r131-smll-171624288400130.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool gold2023
Input is DLCround-PT-08b, examination is ReachabilityFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r131-smll-171624288400130
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.6M
-rw-r--r-- 1 mcc users 6.5K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 67K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.3K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 34K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Apr 22 14:38 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 22 14:38 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 19 07:16 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 19 18:10 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Apr 13 12:32 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 143K Apr 13 12:32 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.8K Apr 13 12:31 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 63K Apr 13 12:31 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:38 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:38 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 1.1M May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-08b-ReachabilityFireability-2024-00
FORMULA_NAME DLCround-PT-08b-ReachabilityFireability-2024-01
FORMULA_NAME DLCround-PT-08b-ReachabilityFireability-2024-02
FORMULA_NAME DLCround-PT-08b-ReachabilityFireability-2024-03
FORMULA_NAME DLCround-PT-08b-ReachabilityFireability-2024-04
FORMULA_NAME DLCround-PT-08b-ReachabilityFireability-2024-05
FORMULA_NAME DLCround-PT-08b-ReachabilityFireability-2024-06
FORMULA_NAME DLCround-PT-08b-ReachabilityFireability-2024-07
FORMULA_NAME DLCround-PT-08b-ReachabilityFireability-2024-08
FORMULA_NAME DLCround-PT-08b-ReachabilityFireability-2024-09
FORMULA_NAME DLCround-PT-08b-ReachabilityFireability-2024-10
FORMULA_NAME DLCround-PT-08b-ReachabilityFireability-2024-11
FORMULA_NAME DLCround-PT-08b-ReachabilityFireability-2024-12
FORMULA_NAME DLCround-PT-08b-ReachabilityFireability-2024-13
FORMULA_NAME DLCround-PT-08b-ReachabilityFireability-2024-14
FORMULA_NAME DLCround-PT-08b-ReachabilityFireability-2024-15

=== Now, execution of the tool begins

BK_START 1716395956224

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=gold2023
BK_EXAMINATION=ReachabilityFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCround-PT-08b
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2024-05-22 16:39:19] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityFireability, -timeout, 360, -rebuildPNML]
[2024-05-22 16:39:19] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-22 16:39:19] [INFO ] Load time of PNML (sax parser for PT used): 351 ms
[2024-05-22 16:39:19] [INFO ] Transformed 3088 places.
[2024-05-22 16:39:19] [INFO ] Transformed 4732 transitions.
[2024-05-22 16:39:19] [INFO ] Found NUPN structural information;
[2024-05-22 16:39:19] [INFO ] Parsed PT model containing 3088 places and 4732 transitions and 13004 arcs in 544 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityFireability.xml in 27 ms.
Working with output stream class java.io.PrintStream
Incomplete random walk after 10000 steps, including 2 resets, run finished after 780 ms. (steps per millisecond=12 ) properties (out of 16) seen :6
FORMULA DLCround-PT-08b-ReachabilityFireability-2024-15 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-08b-ReachabilityFireability-2024-13 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-08b-ReachabilityFireability-2024-11 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-08b-ReachabilityFireability-2024-05 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-08b-ReachabilityFireability-2024-04 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-08b-ReachabilityFireability-2024-01 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 61 ms. (steps per millisecond=163 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 44 ms. (steps per millisecond=227 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 111 ms. (steps per millisecond=90 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 56 ms. (steps per millisecond=178 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 86 ms. (steps per millisecond=116 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 69 ms. (steps per millisecond=144 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 45 ms. (steps per millisecond=222 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 47 ms. (steps per millisecond=212 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=416 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 10) seen :0
Running SMT prover for 10 properties.
// Phase 1: matrix 4732 rows 3088 cols
[2024-05-22 16:39:21] [INFO ] Computed 157 invariants in 65 ms
[2024-05-22 16:39:23] [INFO ] After 1896ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:10
[2024-05-22 16:39:25] [INFO ] [Nat]Absence check using 157 positive place invariants in 178 ms returned sat
[2024-05-22 16:39:31] [INFO ] After 5387ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :10
[2024-05-22 16:39:32] [INFO ] Deduced a trap composed of 138 places in 924 ms of which 11 ms to minimize.
[2024-05-22 16:39:32] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 1340 ms
[2024-05-22 16:39:36] [INFO ] Deduced a trap composed of 200 places in 686 ms of which 2 ms to minimize.
[2024-05-22 16:39:36] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 1132 ms
[2024-05-22 16:39:37] [INFO ] After 11790ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :10
Attempting to minimize the solution found.
Minimization took 2518 ms.
[2024-05-22 16:39:39] [INFO ] After 16474ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :10
FORMULA DLCround-PT-08b-ReachabilityFireability-2024-14 FALSE TECHNIQUES TOPOLOGICAL PARIKH_WALK
FORMULA DLCround-PT-08b-ReachabilityFireability-2024-06 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
FORMULA DLCround-PT-08b-ReachabilityFireability-2024-08 FALSE TECHNIQUES TOPOLOGICAL PARIKH_WALK
FORMULA DLCround-PT-08b-ReachabilityFireability-2024-09 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
FORMULA DLCround-PT-08b-ReachabilityFireability-2024-10 FALSE TECHNIQUES TOPOLOGICAL PARIKH_WALK
FORMULA DLCround-PT-08b-ReachabilityFireability-2024-12 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
Parikh walk visited 6 properties in 646 ms.
Support contains 118 out of 3088 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3088/3088 places, 4732/4732 transitions.
Graph (trivial) has 2678 edges and 3088 vertex of which 423 / 3088 are part of one of the 38 SCC in 27 ms
Free SCC test removed 385 places
Drop transitions removed 435 transitions
Reduce isomorphic transitions removed 435 transitions.
Drop transitions removed 1117 transitions
Trivial Post-agglo rules discarded 1117 transitions
Performed 1117 trivial Post agglomeration. Transition count delta: 1117
Iterating post reduction 0 with 1117 rules applied. Total rules applied 1118 place count 2703 transition count 3180
Reduce places removed 1117 places and 0 transitions.
Ensure Unique test removed 30 transitions
Reduce isomorphic transitions removed 30 transitions.
Drop transitions removed 29 transitions
Trivial Post-agglo rules discarded 29 transitions
Performed 29 trivial Post agglomeration. Transition count delta: 29
Iterating post reduction 1 with 1176 rules applied. Total rules applied 2294 place count 1586 transition count 3121
Reduce places removed 29 places and 0 transitions.
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 2 with 35 rules applied. Total rules applied 2329 place count 1557 transition count 3115
Reduce places removed 3 places and 0 transitions.
Performed 27 Post agglomeration using F-continuation condition.Transition count delta: 27
Iterating post reduction 3 with 30 rules applied. Total rules applied 2359 place count 1554 transition count 3088
Reduce places removed 27 places and 0 transitions.
Iterating post reduction 4 with 27 rules applied. Total rules applied 2386 place count 1527 transition count 3088
Performed 32 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 32 Pre rules applied. Total rules applied 2386 place count 1527 transition count 3056
Deduced a syphon composed of 32 places in 36 ms
Reduce places removed 32 places and 0 transitions.
Iterating global reduction 5 with 64 rules applied. Total rules applied 2450 place count 1495 transition count 3056
Discarding 378 places :
Symmetric choice reduction at 5 with 378 rule applications. Total rules 2828 place count 1117 transition count 2678
Iterating global reduction 5 with 378 rules applied. Total rules applied 3206 place count 1117 transition count 2678
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 5 with 6 rules applied. Total rules applied 3212 place count 1117 transition count 2672
Performed 150 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 6 with 150 Pre rules applied. Total rules applied 3212 place count 1117 transition count 2522
Deduced a syphon composed of 150 places in 85 ms
Reduce places removed 150 places and 0 transitions.
Iterating global reduction 6 with 300 rules applied. Total rules applied 3512 place count 967 transition count 2522
Discarding 34 places :
Symmetric choice reduction at 6 with 34 rule applications. Total rules 3546 place count 933 transition count 2159
Iterating global reduction 6 with 34 rules applied. Total rules applied 3580 place count 933 transition count 2159
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 6 with 9 rules applied. Total rules applied 3589 place count 933 transition count 2150
Performed 232 Post agglomeration using F-continuation condition with reduction of 2 identical transitions.
Deduced a syphon composed of 232 places in 1 ms
Reduce places removed 232 places and 0 transitions.
Iterating global reduction 7 with 464 rules applied. Total rules applied 4053 place count 701 transition count 1916
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 7 with 3 rules applied. Total rules applied 4056 place count 701 transition count 1913
Discarding 7 places :
Symmetric choice reduction at 8 with 7 rule applications. Total rules 4063 place count 694 transition count 1829
Iterating global reduction 8 with 7 rules applied. Total rules applied 4070 place count 694 transition count 1829
Performed 44 Post agglomeration using F-continuation condition.Transition count delta: -408
Deduced a syphon composed of 44 places in 1 ms
Reduce places removed 44 places and 0 transitions.
Iterating global reduction 8 with 88 rules applied. Total rules applied 4158 place count 650 transition count 2237
Drop transitions removed 26 transitions
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 28 transitions.
Iterating post reduction 8 with 28 rules applied. Total rules applied 4186 place count 650 transition count 2209
Discarding 9 places :
Symmetric choice reduction at 9 with 9 rule applications. Total rules 4195 place count 641 transition count 2001
Iterating global reduction 9 with 9 rules applied. Total rules applied 4204 place count 641 transition count 2001
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 9 with 4 rules applied. Total rules applied 4208 place count 641 transition count 1997
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -15
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 10 with 4 rules applied. Total rules applied 4212 place count 639 transition count 2012
Drop transitions removed 108 transitions
Redundant transition composition rules discarded 108 transitions
Iterating global reduction 10 with 108 rules applied. Total rules applied 4320 place count 639 transition count 1904
Discarding 4 places :
Symmetric choice reduction at 10 with 4 rule applications. Total rules 4324 place count 635 transition count 1852
Iterating global reduction 10 with 4 rules applied. Total rules applied 4328 place count 635 transition count 1852
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 10 with 1 rules applied. Total rules applied 4329 place count 635 transition count 1851
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: -49
Deduced a syphon composed of 5 places in 1 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 11 with 10 rules applied. Total rules applied 4339 place count 630 transition count 1900
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 11 with 1 rules applied. Total rules applied 4340 place count 630 transition count 1899
Drop transitions removed 7 transitions
Redundant transition composition rules discarded 7 transitions
Iterating global reduction 12 with 7 rules applied. Total rules applied 4347 place count 630 transition count 1892
Free-agglomeration rule applied 252 times with reduction of 87 identical transitions.
Iterating global reduction 12 with 252 rules applied. Total rules applied 4599 place count 630 transition count 1553
Reduce places removed 252 places and 0 transitions.
Drop transitions removed 229 transitions
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 236 transitions.
Iterating post reduction 12 with 488 rules applied. Total rules applied 5087 place count 378 transition count 1317
Discarding 6 places :
Symmetric choice reduction at 13 with 6 rule applications. Total rules 5093 place count 372 transition count 1292
Iterating global reduction 13 with 6 rules applied. Total rules applied 5099 place count 372 transition count 1292
Drop transitions removed 65 transitions
Redundant transition composition rules discarded 65 transitions
Iterating global reduction 13 with 65 rules applied. Total rules applied 5164 place count 372 transition count 1227
Free-agglomeration rule applied 2 times.
Iterating global reduction 13 with 2 rules applied. Total rules applied 5166 place count 372 transition count 1225
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 13 with 2 rules applied. Total rules applied 5168 place count 370 transition count 1225
Drop transitions removed 16 transitions
Redundant transition composition rules discarded 16 transitions
Iterating global reduction 14 with 16 rules applied. Total rules applied 5184 place count 370 transition count 1209
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 14 with 1 rules applied. Total rules applied 5185 place count 369 transition count 1209
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: -9
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 15 with 2 rules applied. Total rules applied 5187 place count 368 transition count 1218
Drop transitions removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 15 with 8 rules applied. Total rules applied 5195 place count 368 transition count 1210
Free-agglomeration rule (complex) applied 2 times.
Iterating global reduction 16 with 2 rules applied. Total rules applied 5197 place count 368 transition count 1245
Reduce places removed 2 places and 0 transitions.
Drop transitions removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Iterating post reduction 16 with 18 rules applied. Total rules applied 5215 place count 366 transition count 1229
Drop transitions removed 22 transitions
Redundant transition composition rules discarded 22 transitions
Iterating global reduction 17 with 22 rules applied. Total rules applied 5237 place count 366 transition count 1207
Partial Free-agglomeration rule applied 10 times.
Drop transitions removed 10 transitions
Iterating global reduction 17 with 10 rules applied. Total rules applied 5247 place count 366 transition count 1207
Drop transitions removed 3 transitions
Redundant transition composition rules discarded 3 transitions
Iterating global reduction 17 with 3 rules applied. Total rules applied 5250 place count 366 transition count 1204
Applied a total of 5250 rules in 2276 ms. Remains 366 /3088 variables (removed 2722) and now considering 1204/4732 (removed 3528) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 2277 ms. Remains : 366/3088 places, 1204/4732 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 213 ms. (steps per millisecond=46 ) properties (out of 4) seen :2
FORMULA DLCround-PT-08b-ReachabilityFireability-2024-03 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-08b-ReachabilityFireability-2024-00 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 34 ms. (steps per millisecond=294 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 59 ms. (steps per millisecond=169 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
[2024-05-22 16:39:43] [INFO ] Flow matrix only has 679 transitions (discarded 525 similar events)
// Phase 1: matrix 679 rows 366 cols
[2024-05-22 16:39:43] [INFO ] Computed 150 invariants in 5 ms
[2024-05-22 16:39:43] [INFO ] [Real]Absence check using 150 positive place invariants in 322 ms returned sat
[2024-05-22 16:39:43] [INFO ] After 631ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:2
[2024-05-22 16:39:44] [INFO ] [Nat]Absence check using 150 positive place invariants in 80 ms returned sat
[2024-05-22 16:39:44] [INFO ] After 524ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :2
[2024-05-22 16:39:44] [INFO ] State equation strengthened by 114 read => feed constraints.
[2024-05-22 16:39:44] [INFO ] After 156ms SMT Verify possible using 114 Read/Feed constraints in natural domain returned unsat :0 sat :2
[2024-05-22 16:39:44] [INFO ] After 321ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :2
Attempting to minimize the solution found.
Minimization took 122 ms.
[2024-05-22 16:39:45] [INFO ] After 1190ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :2
Parikh walk visited 0 properties in 9 ms.
Support contains 48 out of 366 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 366/366 places, 1204/1204 transitions.
Graph (trivial) has 148 edges and 366 vertex of which 17 / 366 are part of one of the 6 SCC in 0 ms
Free SCC test removed 11 places
Drop transitions removed 28 transitions
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 31 transitions.
Drop transitions removed 10 transitions
Trivial Post-agglo rules discarded 10 transitions
Performed 10 trivial Post agglomeration. Transition count delta: 10
Iterating post reduction 0 with 10 rules applied. Total rules applied 11 place count 355 transition count 1163
Reduce places removed 10 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 12 rules applied. Total rules applied 23 place count 345 transition count 1161
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 24 place count 344 transition count 1161
Performed 8 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 8 Pre rules applied. Total rules applied 24 place count 344 transition count 1153
Deduced a syphon composed of 8 places in 1 ms
Reduce places removed 8 places and 0 transitions.
Iterating global reduction 3 with 16 rules applied. Total rules applied 40 place count 336 transition count 1153
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 43 place count 333 transition count 1138
Iterating global reduction 3 with 3 rules applied. Total rules applied 46 place count 333 transition count 1138
Ensure Unique test removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Iterating post reduction 3 with 11 rules applied. Total rules applied 57 place count 333 transition count 1127
Performed 17 Post agglomeration using F-continuation condition.Transition count delta: 17
Deduced a syphon composed of 17 places in 0 ms
Reduce places removed 17 places and 0 transitions.
Iterating global reduction 4 with 34 rules applied. Total rules applied 91 place count 316 transition count 1110
Drop transitions removed 38 transitions
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 42 transitions.
Iterating post reduction 4 with 42 rules applied. Total rules applied 133 place count 316 transition count 1068
Discarding 4 places :
Symmetric choice reduction at 5 with 4 rule applications. Total rules 137 place count 312 transition count 1026
Iterating global reduction 5 with 4 rules applied. Total rules applied 141 place count 312 transition count 1026
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 5 with 3 rules applied. Total rules applied 144 place count 312 transition count 1023
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: -38
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 6 with 10 rules applied. Total rules applied 154 place count 307 transition count 1061
Drop transitions removed 17 transitions
Reduce isomorphic transitions removed 17 transitions.
Iterating post reduction 6 with 17 rules applied. Total rules applied 171 place count 307 transition count 1044
Discarding 1 places :
Symmetric choice reduction at 7 with 1 rule applications. Total rules 172 place count 306 transition count 1025
Iterating global reduction 7 with 1 rules applied. Total rules applied 173 place count 306 transition count 1025
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 7 with 1 rules applied. Total rules applied 174 place count 306 transition count 1024
Drop transitions removed 84 transitions
Redundant transition composition rules discarded 84 transitions
Iterating global reduction 8 with 84 rules applied. Total rules applied 258 place count 306 transition count 940
Discarding 4 places :
Symmetric choice reduction at 8 with 4 rule applications. Total rules 262 place count 302 transition count 896
Iterating global reduction 8 with 4 rules applied. Total rules applied 266 place count 302 transition count 896
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 8 with 3 rules applied. Total rules applied 269 place count 302 transition count 893
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -18
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 9 with 4 rules applied. Total rules applied 273 place count 300 transition count 911
Drop transitions removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 9 with 9 rules applied. Total rules applied 282 place count 300 transition count 902
Drop transitions removed 5 transitions
Redundant transition composition rules discarded 5 transitions
Iterating global reduction 10 with 5 rules applied. Total rules applied 287 place count 300 transition count 897
Free-agglomeration rule applied 47 times with reduction of 10 identical transitions.
Iterating global reduction 10 with 47 rules applied. Total rules applied 334 place count 300 transition count 840
Reduce places removed 47 places and 0 transitions.
Drop transitions removed 224 transitions
Ensure Unique test removed 12 transitions
Reduce isomorphic transitions removed 236 transitions.
Graph (complete) has 790 edges and 253 vertex of which 248 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.2 ms
Discarding 5 places :
Also discarding 0 output transitions
Iterating post reduction 10 with 284 rules applied. Total rules applied 618 place count 248 transition count 604
Discarding 43 places :
Symmetric choice reduction at 11 with 43 rule applications. Total rules 661 place count 205 transition count 507
Iterating global reduction 11 with 43 rules applied. Total rules applied 704 place count 205 transition count 507
Drop transitions removed 32 transitions
Redundant transition composition rules discarded 32 transitions
Iterating global reduction 11 with 32 rules applied. Total rules applied 736 place count 205 transition count 475
Partial Free-agglomeration rule applied 2 times.
Drop transitions removed 2 transitions
Iterating global reduction 11 with 2 rules applied. Total rules applied 738 place count 205 transition count 475
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 11 with 2 rules applied. Total rules applied 740 place count 205 transition count 473
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 11 with 4 rules applied. Total rules applied 744 place count 203 transition count 471
Applied a total of 744 rules in 297 ms. Remains 203 /366 variables (removed 163) and now considering 471/1204 (removed 733) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 297 ms. Remains : 203/366 places, 471/1204 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 98 ms. (steps per millisecond=102 ) properties (out of 2) seen :1
FORMULA DLCround-PT-08b-ReachabilityFireability-2024-02 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 62 ms. (steps per millisecond=161 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2024-05-22 16:39:45] [INFO ] Flow matrix only has 277 transitions (discarded 194 similar events)
// Phase 1: matrix 277 rows 203 cols
[2024-05-22 16:39:45] [INFO ] Computed 102 invariants in 5 ms
[2024-05-22 16:39:45] [INFO ] After 66ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2024-05-22 16:39:46] [INFO ] [Nat]Absence check using 102 positive place invariants in 281 ms returned sat
[2024-05-22 16:39:46] [INFO ] After 167ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2024-05-22 16:39:46] [INFO ] State equation strengthened by 87 read => feed constraints.
[2024-05-22 16:39:46] [INFO ] After 81ms SMT Verify possible using 87 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2024-05-22 16:39:46] [INFO ] After 152ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 65 ms.
[2024-05-22 16:39:46] [INFO ] After 866ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 1 ms.
Support contains 45 out of 203 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 203/203 places, 471/471 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 203 transition count 470
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 202 transition count 470
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 202 transition count 469
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 4 place count 201 transition count 465
Iterating global reduction 1 with 1 rules applied. Total rules applied 5 place count 201 transition count 465
Free-agglomeration rule applied 2 times.
Iterating global reduction 1 with 2 rules applied. Total rules applied 7 place count 201 transition count 463
Reduce places removed 2 places and 0 transitions.
Drop transitions removed 2 transitions
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 1 with 12 rules applied. Total rules applied 19 place count 199 transition count 453
Applied a total of 19 rules in 22 ms. Remains 199 /203 variables (removed 4) and now considering 453/471 (removed 18) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 22 ms. Remains : 199/203 places, 453/471 transitions.
Finished random walk after 6944 steps, including 2 resets, run visited all 1 properties in 45 ms. (steps per millisecond=154 )
FORMULA DLCround-PT-08b-ReachabilityFireability-2024-07 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 27535 ms.
starting LoLA
BK_INPUT DLCround-PT-08b
BK_EXAMINATION: ReachabilityFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityFireability

FORMULA DLCround-PT-08b-ReachabilityFireability-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-08b-ReachabilityFireability-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-08b-ReachabilityFireability-2024-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-08b-ReachabilityFireability-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-08b-ReachabilityFireability-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-08b-ReachabilityFireability-2024-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-08b-ReachabilityFireability-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-08b-ReachabilityFireability-2024-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-08b-ReachabilityFireability-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-08b-ReachabilityFireability-2024-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-08b-ReachabilityFireability-2024-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-08b-ReachabilityFireability-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-08b-ReachabilityFireability-2024-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-08b-ReachabilityFireability-2024-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-08b-ReachabilityFireability-2024-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-08b-ReachabilityFireability-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1716396030747

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityFireability.xml
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 69 (type EXCL) for 18 DLCround-PT-08b-ReachabilityFireability-2024-06
lola: time limit : 237 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 59 (type FNDP) for 33 DLCround-PT-08b-ReachabilityFireability-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type EQUN) for 33 DLCround-PT-08b-ReachabilityFireability-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type SRCH) for 33 DLCround-PT-08b-ReachabilityFireability-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 69 (type EXCL) for DLCround-PT-08b-ReachabilityFireability-2024-06
lola: result : true
lola: markings : 6
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 104 (type EXCL) for 21 DLCround-PT-08b-ReachabilityFireability-2024-07
lola: time limit : 273 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 62 (type SRCH) for DLCround-PT-08b-ReachabilityFireability-2024-11
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 59 (type FNDP) for DLCround-PT-08b-ReachabilityFireability-2024-11 (obsolete)
lola: CANCELED task # 60 (type EQUN) for DLCround-PT-08b-ReachabilityFireability-2024-11 (obsolete)
lola: LAUNCH task # 56 (type FNDP) for 45 DLCround-PT-08b-ReachabilityFireability-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type EQUN) for 45 DLCround-PT-08b-ReachabilityFireability-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 84 (type SRCH) for 45 DLCround-PT-08b-ReachabilityFireability-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 59 (type FNDP) for DLCround-PT-08b-ReachabilityFireability-2024-11
lola: result : true
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-60.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 84 (type SRCH) for DLCround-PT-08b-ReachabilityFireability-2024-15
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 56 (type FNDP) for DLCround-PT-08b-ReachabilityFireability-2024-15 (obsolete)
lola: CANCELED task # 57 (type EQUN) for DLCround-PT-08b-ReachabilityFireability-2024-15 (obsolete)
lola: LAUNCH task # 54 (type FNDP) for 15 DLCround-PT-08b-ReachabilityFireability-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 55 (type EQUN) for 15 DLCround-PT-08b-ReachabilityFireability-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages

lola: LAUNCH task # 109 (type SRCH) for 15 DLCround-PT-08b-ReachabilityFireability-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 109 (type SRCH) for DLCround-PT-08b-ReachabilityFireability-2024-05
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 54 (type FNDP) for DLCround-PT-08b-ReachabilityFireability-2024-05 (obsolete)
lola: CANCELED task # 55 (type EQUN) for DLCround-PT-08b-ReachabilityFireability-2024-05 (obsolete)
lola: LAUNCH task # 49 (type FNDP) for 0 DLCround-PT-08b-ReachabilityFireability-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type EQUN) for 0 DLCround-PT-08b-ReachabilityFireability-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 81 (type SRCH) for 0 DLCround-PT-08b-ReachabilityFireability-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 81 (type SRCH) for DLCround-PT-08b-ReachabilityFireability-2024-00
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 49 (type FNDP) for DLCround-PT-08b-ReachabilityFireability-2024-00 (obsolete)
lola: CANCELED task # 50 (type EQUN) for DLCround-PT-08b-ReachabilityFireability-2024-00 (obsolete)
lola: LAUNCH task # 76 (type FNDP) for 36 DLCround-PT-08b-ReachabilityFireability-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 78 (type EQUN) for 36 DLCround-PT-08b-ReachabilityFireability-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 89 (type SRCH) for 36 DLCround-PT-08b-ReachabilityFireability-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 49 (type FNDP) for DLCround-PT-08b-ReachabilityFireability-2024-00
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 76 (type FNDP) for DLCround-PT-08b-ReachabilityFireability-2024-12
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 78 (type EQUN) for DLCround-PT-08b-ReachabilityFireability-2024-12 (obsolete)
lola: CANCELED task # 89 (type SRCH) for DLCround-PT-08b-ReachabilityFireability-2024-12 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 52 (type FNDP) for 3 DLCround-PT-08b-ReachabilityFireability-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-57.sara.
sara: place or transition ordering is non-deterministic

lola: LAUNCH task # 53 (type EQUN) for 3 DLCround-PT-08b-ReachabilityFireability-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 87 (type SRCH) for 3 DLCround-PT-08b-ReachabilityFireability-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 60 (type EQUN) for DLCround-PT-08b-ReachabilityFireability-2024-11
lola: result : true
lola: FINISHED task # 56 (type FNDP) for DLCround-PT-08b-ReachabilityFireability-2024-15
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 87 (type SRCH) for DLCround-PT-08b-ReachabilityFireability-2024-01
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 52 (type FNDP) for DLCround-PT-08b-ReachabilityFireability-2024-01
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-53.sara.
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0

lola: FINISHED task # 54 (type FNDP) for DLCround-PT-08b-ReachabilityFireability-2024-05
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-78.sara.

lola: CANCELED task # 53 (type EQUN) for DLCround-PT-08b-ReachabilityFireability-2024-01 (obsolete)
lola: LAUNCH task # 97 (type FNDP) for 42 DLCround-PT-08b-ReachabilityFireability-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 98 (type EQUN) for 42 DLCround-PT-08b-ReachabilityFireability-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 107 (type SRCH) for 42 DLCround-PT-08b-ReachabilityFireability-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 107 (type SRCH) for DLCround-PT-08b-ReachabilityFireability-2024-14
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-55.sara.
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-50.sara.

sara: place or transition ordering is non-deterministic

lola: FINISHED task # 57 (type EQUN) for DLCround-PT-08b-ReachabilityFireability-2024-15
lola: result : true
lola: CANCELED task # 97 (type FNDP) for DLCround-PT-08b-ReachabilityFireability-2024-14 (obsolete)
lola: CANCELED task # 98 (type EQUN) for DLCround-PT-08b-ReachabilityFireability-2024-14 (obsolete)
lola: LAUNCH task # 120 (type FNDP) for 24 DLCround-PT-08b-ReachabilityFireability-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 122 (type EQUN) for 24 DLCround-PT-08b-ReachabilityFireability-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 124 (type SRCH) for 24 DLCround-PT-08b-ReachabilityFireability-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 97 (type FNDP) for DLCround-PT-08b-ReachabilityFireability-2024-14
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 53 (type EQUN) for DLCround-PT-08b-ReachabilityFireability-2024-01
lola: result : true
lola: FINISHED task # 120 (type FNDP) for DLCround-PT-08b-ReachabilityFireability-2024-08
lola: result : true
lola: fired transitions : 5
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 122 (type EQUN) for DLCround-PT-08b-ReachabilityFireability-2024-08 (obsolete)
lola: CANCELED task # 124 (type SRCH) for DLCround-PT-08b-ReachabilityFireability-2024-08 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-98.sara.
sara: place or transition ordering is non-deterministic

lola: LAUNCH task # 121 (type FNDP) for 39 DLCround-PT-08b-ReachabilityFireability-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 133 (type EQUN) for 39 DLCround-PT-08b-ReachabilityFireability-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 135 (type SRCH) for 39 DLCround-PT-08b-ReachabilityFireability-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 55 (type EQUN) for DLCround-PT-08b-ReachabilityFireability-2024-05
lola: result : true
lola: FINISHED task # 78 (type EQUN) for DLCround-PT-08b-ReachabilityFireability-2024-12
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 121 (type FNDP) for DLCround-PT-08b-ReachabilityFireability-2024-13
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 133 (type EQUN) for DLCround-PT-08b-ReachabilityFireability-2024-13 (obsolete)
lola: CANCELED task # 135 (type SRCH) for DLCround-PT-08b-ReachabilityFireability-2024-13 (obsolete)
lola: LAUNCH task # 145 (type FNDP) for 6 DLCround-PT-08b-ReachabilityFireability-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 146 (type EQUN) for 6 DLCround-PT-08b-ReachabilityFireability-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 148 (type SRCH) for 6 DLCround-PT-08b-ReachabilityFireability-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 98 (type EQUN) for DLCround-PT-08b-ReachabilityFireability-2024-14
lola: result : true
lola: FINISHED task # 50 (type EQUN) for DLCround-PT-08b-ReachabilityFireability-2024-00
lola: result : true
lola: FINISHED task # 145 (type FNDP) for DLCround-PT-08b-ReachabilityFireability-2024-02
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-146.sara.

lola: CANCELED task # 146 (type EQUN) for DLCround-PT-08b-ReachabilityFireability-2024-02 (obsolete)
lola: CANCELED task # 148 (type SRCH) for DLCround-PT-08b-ReachabilityFireability-2024-02 (obsolete)
lola: LAUNCH task # 72 (type FNDP) for 30 DLCround-PT-08b-ReachabilityFireability-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 73 (type EQUN) for 30 DLCround-PT-08b-ReachabilityFireability-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 91 (type SRCH) for 30 DLCround-PT-08b-ReachabilityFireability-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 72 (type FNDP) for DLCround-PT-08b-ReachabilityFireability-2024-10
lola: result : true
lola: fired transitions : 5
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 73 (type EQUN) for DLCround-PT-08b-ReachabilityFireability-2024-10 (obsolete)
lola: CANCELED task # 91 (type SRCH) for DLCround-PT-08b-ReachabilityFireability-2024-10 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-133.sara.
sara: place or transition ordering is non-deterministic
lola: LAUNCH task # 127 (type FNDP) for 9 DLCround-PT-08b-ReachabilityFireability-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 128 (type EQUN) for 9 DLCround-PT-08b-ReachabilityFireability-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 130 (type SRCH) for 9 DLCround-PT-08b-ReachabilityFireability-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages

lola: FINISHED task # 146 (type EQUN) for DLCround-PT-08b-ReachabilityFireability-2024-02
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 127 (type FNDP) for DLCround-PT-08b-ReachabilityFireability-2024-03
lola: result : true
lola: fired transitions : 12
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 128 (type EQUN) for DLCround-PT-08b-ReachabilityFireability-2024-03 (obsolete)
lola: CANCELED task # 130 (type SRCH) for DLCround-PT-08b-ReachabilityFireability-2024-03 (obsolete)
lola: LAUNCH task # 139 (type FNDP) for 12 DLCround-PT-08b-ReachabilityFireability-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 140 (type EQUN) for 12 DLCround-PT-08b-ReachabilityFireability-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-122.sara.
lola: LAUNCH task # 142 (type SRCH) for 12 DLCround-PT-08b-ReachabilityFireability-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-08b-ReachabilityFireability-2024-00: AG false tandem / insertion
DLCround-PT-08b-ReachabilityFireability-2024-01: AG false findpath
DLCround-PT-08b-ReachabilityFireability-2024-02: EF true findpath
DLCround-PT-08b-ReachabilityFireability-2024-03: EF true findpath
DLCround-PT-08b-ReachabilityFireability-2024-05: EF true tandem / insertion
DLCround-PT-08b-ReachabilityFireability-2024-06: EF true tandem / relaxed
DLCround-PT-08b-ReachabilityFireability-2024-08: AG false findpath
DLCround-PT-08b-ReachabilityFireability-2024-10: AG false findpath
DLCround-PT-08b-ReachabilityFireability-2024-11: AG false tandem / insertion
DLCround-PT-08b-ReachabilityFireability-2024-12: EF true findpath
DLCround-PT-08b-ReachabilityFireability-2024-13: EF true findpath
DLCround-PT-08b-ReachabilityFireability-2024-14: AG false tandem / insertion
DLCround-PT-08b-ReachabilityFireability-2024-15: EF true tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-08b-ReachabilityFireability-2024-04: AG 0 2 3 0 1 0 0 0
DLCround-PT-08b-ReachabilityFireability-2024-07: EF 0 4 1 0 1 0 0 0
DLCround-PT-08b-ReachabilityFireability-2024-09: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
104 EF EXCL 0/1186 1/32 DLCround-PT-08b-ReachabilityFireability-2024-07 325 m, 65 m/sec, 492 t fired, .
139 EF FNDP 0/889 0/5 DLCround-PT-08b-ReachabilityFireability-2024-04 --
140 EF STEQ 0/889 0/5 DLCround-PT-08b-ReachabilityFireability-2024-04 sara not yet started (preprocessing).
142 EF SRCH 0/889 0/5 DLCround-PT-08b-ReachabilityFireability-2024-04 --

Time elapsed: 42 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 133 (type EQUN) for DLCround-PT-08b-ReachabilityFireability-2024-13
lola: result : true
lola: FINISHED task # 139 (type FNDP) for DLCround-PT-08b-ReachabilityFireability-2024-04
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 142 (type SRCH) for DLCround-PT-08b-ReachabilityFireability-2024-04
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 140 (type EQUN) for DLCround-PT-08b-ReachabilityFireability-2024-04 (obsolete)sara: try reading problem file /home/mcc/execution/ReachabilityFireability-73.sara.

lola: LAUNCH task # 114 (type FNDP) for 27 DLCround-PT-08b-ReachabilityFireability-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 115 (type EQUN) for 27 DLCround-PT-08b-ReachabilityFireability-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 117 (type SRCH) for 27 DLCround-PT-08b-ReachabilityFireability-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-140.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 117 (type SRCH) for DLCround-PT-08b-ReachabilityFireability-2024-09
lola: result : true
lola: markings : 6
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 114 (type FNDP) for DLCround-PT-08b-ReachabilityFireability-2024-09 (obsolete)
lola: CANCELED task # 115 (type EQUN) for DLCround-PT-08b-ReachabilityFireability-2024-09 (obsolete)
lola: LAUNCH task # 100 (type FNDP) for 21 DLCround-PT-08b-ReachabilityFireability-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 101 (type EQUN) for 21 DLCround-PT-08b-ReachabilityFireability-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 103 (type SRCH) for 21 DLCround-PT-08b-ReachabilityFireability-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-115.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711

lola: FINISHED task # 100 (type FNDP) for DLCround-PT-08b-ReachabilityFireability-2024-07
lola: result : true
lola: fired transitions : 28
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
lola: CANCELED task # 101 (type EQUN) for DLCround-PT-08b-ReachabilityFireability-2024-07 (obsolete)
lola: CANCELED task # 103 (type SRCH) for DLCround-PT-08b-ReachabilityFireability-2024-07 (obsolete)
lola: CANCELED task # 104 (type EXCL) for DLCround-PT-08b-ReachabilityFireability-2024-07 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-08b-ReachabilityFireability-2024-00: AG false tandem / insertion
DLCround-PT-08b-ReachabilityFireability-2024-01: AG false findpath
DLCround-PT-08b-ReachabilityFireability-2024-02: EF true findpath
DLCround-PT-08b-ReachabilityFireability-2024-03: EF true findpath
DLCround-PT-08b-ReachabilityFireability-2024-04: AG false findpath
DLCround-PT-08b-ReachabilityFireability-2024-05: EF true tandem / insertion
DLCround-PT-08b-ReachabilityFireability-2024-06: EF true tandem / relaxed
DLCround-PT-08b-ReachabilityFireability-2024-07: EF true findpath
DLCround-PT-08b-ReachabilityFireability-2024-08: AG false findpath
DLCround-PT-08b-ReachabilityFireability-2024-09: EF true tandem / insertion
DLCround-PT-08b-ReachabilityFireability-2024-10: AG false findpath
DLCround-PT-08b-ReachabilityFireability-2024-11: AG false tandem / insertion
DLCround-PT-08b-ReachabilityFireability-2024-12: EF true findpath
DLCround-PT-08b-ReachabilityFireability-2024-13: EF true findpath
DLCround-PT-08b-ReachabilityFireability-2024-14: AG false tandem / insertion
DLCround-PT-08b-ReachabilityFireability-2024-15: EF true tandem / insertion


Time elapsed: 43 secs. Pages in use: 2

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-08b"
export BK_EXAMINATION="ReachabilityFireability"
export BK_TOOL="gold2023"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool gold2023"
echo " Input is DLCround-PT-08b, examination is ReachabilityFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r131-smll-171624288400130"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-08b.tgz
mv DLCround-PT-08b execution
cd execution
if [ "ReachabilityFireability" = "ReachabilityDeadlock" ] || [ "ReachabilityFireability" = "UpperBounds" ] || [ "ReachabilityFireability" = "QuasiLiveness" ] || [ "ReachabilityFireability" = "StableMarking" ] || [ "ReachabilityFireability" = "Liveness" ] || [ "ReachabilityFireability" = "OneSafe" ] || [ "ReachabilityFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityFireability" = "ReachabilityDeadlock" ] || [ "ReachabilityFireability" = "QuasiLiveness" ] || [ "ReachabilityFireability" = "StableMarking" ] || [ "ReachabilityFireability" = "Liveness" ] || [ "ReachabilityFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;