Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r131-smll-171624288400115.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool gold2023
Input is DLCround-PT-07a, examination is ReachabilityFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r131-smll-171624288400115
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 888K
-rw-r--r-- 1 mcc users 6.7K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 71K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Apr 22 14:38 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 22 14:38 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Apr 22 14:38 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 22 14:38 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Apr 13 14:50 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 124K Apr 13 14:50 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Apr 13 14:30 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 107K Apr 13 14:30 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:38 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:38 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 398K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-07a-ReachabilityFireability-2024-00
FORMULA_NAME DLCround-PT-07a-ReachabilityFireability-2024-01
FORMULA_NAME DLCround-PT-07a-ReachabilityFireability-2024-02
FORMULA_NAME DLCround-PT-07a-ReachabilityFireability-2024-03
FORMULA_NAME DLCround-PT-07a-ReachabilityFireability-2024-04
FORMULA_NAME DLCround-PT-07a-ReachabilityFireability-2024-05
FORMULA_NAME DLCround-PT-07a-ReachabilityFireability-2024-06
FORMULA_NAME DLCround-PT-07a-ReachabilityFireability-2024-07
FORMULA_NAME DLCround-PT-07a-ReachabilityFireability-2024-08
FORMULA_NAME DLCround-PT-07a-ReachabilityFireability-2024-09
FORMULA_NAME DLCround-PT-07a-ReachabilityFireability-2024-10
FORMULA_NAME DLCround-PT-07a-ReachabilityFireability-2024-11
FORMULA_NAME DLCround-PT-07a-ReachabilityFireability-2024-12
FORMULA_NAME DLCround-PT-07a-ReachabilityFireability-2024-13
FORMULA_NAME DLCround-PT-07a-ReachabilityFireability-2024-14
FORMULA_NAME DLCround-PT-07a-ReachabilityFireability-2024-15

=== Now, execution of the tool begins

BK_START 1716394185648

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=gold2023
BK_EXAMINATION=ReachabilityFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCround-PT-07a
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2024-05-22 16:09:48] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityFireability, -timeout, 360, -rebuildPNML]
[2024-05-22 16:09:48] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-22 16:09:48] [INFO ] Load time of PNML (sax parser for PT used): 208 ms
[2024-05-22 16:09:48] [INFO ] Transformed 229 places.
[2024-05-22 16:09:48] [INFO ] Transformed 1597 transitions.
[2024-05-22 16:09:48] [INFO ] Found NUPN structural information;
[2024-05-22 16:09:48] [INFO ] Parsed PT model containing 229 places and 1597 transitions and 6125 arcs in 323 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityFireability.xml in 26 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 3 formulas.
Ensure Unique test removed 160 transitions
Reduce redundant transitions removed 160 transitions.
FORMULA DLCround-PT-07a-ReachabilityFireability-2024-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-07a-ReachabilityFireability-2024-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-07a-ReachabilityFireability-2024-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 774 ms. (steps per millisecond=12 ) properties (out of 13) seen :8
FORMULA DLCround-PT-07a-ReachabilityFireability-2024-12 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-07a-ReachabilityFireability-2024-11 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-07a-ReachabilityFireability-2024-06 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-07a-ReachabilityFireability-2024-05 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-07a-ReachabilityFireability-2024-04 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-07a-ReachabilityFireability-2024-03 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-07a-ReachabilityFireability-2024-02 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-07a-ReachabilityFireability-2024-01 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 115 ms. (steps per millisecond=86 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 77 ms. (steps per millisecond=129 ) properties (out of 5) seen :1
FORMULA DLCround-PT-07a-ReachabilityFireability-2024-07 TRUE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 59 ms. (steps per millisecond=169 ) properties (out of 4) seen :1
FORMULA DLCround-PT-07a-ReachabilityFireability-2024-08 TRUE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 107 ms. (steps per millisecond=93 ) properties (out of 3) seen :1
FORMULA DLCround-PT-07a-ReachabilityFireability-2024-09 TRUE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 78 ms. (steps per millisecond=128 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
[2024-05-22 16:09:49] [INFO ] Flow matrix only has 170 transitions (discarded 1267 similar events)
// Phase 1: matrix 170 rows 229 cols
[2024-05-22 16:09:50] [INFO ] Computed 132 invariants in 23 ms
[2024-05-22 16:09:50] [INFO ] After 359ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:2
[2024-05-22 16:09:50] [INFO ] [Nat]Absence check using 132 positive place invariants in 56 ms returned sat
[2024-05-22 16:09:50] [INFO ] After 260ms SMT Verify possible using state equation in natural domain returned unsat :1 sat :1
[2024-05-22 16:09:51] [INFO ] State equation strengthened by 57 read => feed constraints.
[2024-05-22 16:09:51] [INFO ] After 114ms SMT Verify possible using 57 Read/Feed constraints in natural domain returned unsat :1 sat :1
[2024-05-22 16:09:51] [INFO ] After 248ms SMT Verify possible using trap constraints in natural domain returned unsat :1 sat :1
Attempting to minimize the solution found.
Minimization took 99 ms.
[2024-05-22 16:09:51] [INFO ] After 927ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :1
FORMULA DLCround-PT-07a-ReachabilityFireability-2024-10 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 2 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 11 ms.
Support contains 52 out of 229 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 229/229 places, 1437/1437 transitions.
Graph (trivial) has 92 edges and 229 vertex of which 12 / 229 are part of one of the 4 SCC in 6 ms
Free SCC test removed 8 places
Drop transitions removed 700 transitions
Reduce isomorphic transitions removed 700 transitions.
Graph (complete) has 856 edges and 221 vertex of which 205 are kept as prefixes of interest. Removing 16 places using SCC suffix rule.15 ms
Discarding 16 places :
Also discarding 20 output transitions
Drop transitions removed 20 transitions
Drop transitions removed 63 transitions
Reduce isomorphic transitions removed 63 transitions.
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 0 with 66 rules applied. Total rules applied 68 place count 205 transition count 651
Reduce places removed 3 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Iterating post reduction 1 with 6 rules applied. Total rules applied 74 place count 202 transition count 648
Reduce places removed 2 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 3 rules applied. Total rules applied 77 place count 200 transition count 647
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 77 place count 200 transition count 646
Deduced a syphon composed of 1 places in 14 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 79 place count 199 transition count 646
Discarding 43 places :
Symmetric choice reduction at 3 with 43 rule applications. Total rules 122 place count 156 transition count 575
Iterating global reduction 3 with 43 rules applied. Total rules applied 165 place count 156 transition count 575
Performed 8 Post agglomeration using F-continuation condition.Transition count delta: 8
Deduced a syphon composed of 8 places in 2 ms
Reduce places removed 8 places and 0 transitions.
Iterating global reduction 3 with 16 rules applied. Total rules applied 181 place count 148 transition count 567
Drop transitions removed 66 transitions
Reduce isomorphic transitions removed 66 transitions.
Graph (complete) has 549 edges and 148 vertex of which 147 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.3 ms
Discarding 1 places :
Also discarding 0 output transitions
Iterating post reduction 3 with 67 rules applied. Total rules applied 248 place count 147 transition count 501
Discarding 6 places :
Symmetric choice reduction at 4 with 6 rule applications. Total rules 254 place count 141 transition count 474
Iterating global reduction 4 with 6 rules applied. Total rules applied 260 place count 141 transition count 474
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 1 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 4 with 6 rules applied. Total rules applied 266 place count 138 transition count 471
Drop transitions removed 164 transitions
Redundant transition composition rules discarded 164 transitions
Iterating global reduction 4 with 164 rules applied. Total rules applied 430 place count 138 transition count 307
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 4 with 3 rules applied. Total rules applied 433 place count 135 transition count 307
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 3 Pre rules applied. Total rules applied 433 place count 135 transition count 304
Deduced a syphon composed of 3 places in 1 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 5 with 6 rules applied. Total rules applied 439 place count 132 transition count 304
Discarding 11 places :
Symmetric choice reduction at 5 with 11 rule applications. Total rules 450 place count 121 transition count 267
Iterating global reduction 5 with 11 rules applied. Total rules applied 461 place count 121 transition count 267
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 463 place count 120 transition count 266
Drop transitions removed 14 transitions
Redundant transition composition rules discarded 14 transitions
Iterating global reduction 5 with 14 rules applied. Total rules applied 477 place count 120 transition count 252
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 5 with 1 rules applied. Total rules applied 478 place count 119 transition count 252
Discarding 5 places :
Symmetric choice reduction at 6 with 5 rule applications. Total rules 483 place count 114 transition count 237
Iterating global reduction 6 with 5 rules applied. Total rules applied 488 place count 114 transition count 237
Free-agglomeration rule applied 2 times.
Iterating global reduction 6 with 2 rules applied. Total rules applied 490 place count 114 transition count 235
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 6 with 2 rules applied. Total rules applied 492 place count 112 transition count 235
Drop transitions removed 7 transitions
Redundant transition composition rules discarded 7 transitions
Iterating global reduction 7 with 7 rules applied. Total rules applied 499 place count 112 transition count 228
Partial Free-agglomeration rule applied 3 times.
Drop transitions removed 3 transitions
Iterating global reduction 7 with 3 rules applied. Total rules applied 502 place count 112 transition count 228
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 7 with 1 rules applied. Total rules applied 503 place count 112 transition count 227
Applied a total of 503 rules in 392 ms. Remains 112 /229 variables (removed 117) and now considering 227/1437 (removed 1210) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 392 ms. Remains : 112/229 places, 227/1437 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 74 ms. (steps per millisecond=135 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 88 ms. (steps per millisecond=113 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 891012 steps, run timeout after 3001 ms. (steps per millisecond=296 ) properties seen :{}
Probabilistic random walk after 891012 steps, saw 411993 distinct states, run finished after 3016 ms. (steps per millisecond=295 ) properties seen :0
Running SMT prover for 1 properties.
[2024-05-22 16:09:54] [INFO ] Flow matrix only has 68 transitions (discarded 159 similar events)
// Phase 1: matrix 68 rows 112 cols
[2024-05-22 16:09:54] [INFO ] Computed 74 invariants in 3 ms
[2024-05-22 16:09:55] [INFO ] After 51ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2024-05-22 16:09:55] [INFO ] [Nat]Absence check using 74 positive place invariants in 20 ms returned sat
[2024-05-22 16:09:55] [INFO ] After 78ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2024-05-22 16:09:55] [INFO ] State equation strengthened by 22 read => feed constraints.
[2024-05-22 16:09:55] [INFO ] After 34ms SMT Verify possible using 22 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2024-05-22 16:09:55] [INFO ] After 68ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 33 ms.
[2024-05-22 16:09:55] [INFO ] After 255ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 0 ms.
Support contains 52 out of 112 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 112/112 places, 227/227 transitions.
Applied a total of 0 rules in 8 ms. Remains 112 /112 variables (removed 0) and now considering 227/227 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 8 ms. Remains : 112/112 places, 227/227 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 112/112 places, 227/227 transitions.
Applied a total of 0 rules in 8 ms. Remains 112 /112 variables (removed 0) and now considering 227/227 (removed 0) transitions.
[2024-05-22 16:09:55] [INFO ] Flow matrix only has 68 transitions (discarded 159 similar events)
[2024-05-22 16:09:55] [INFO ] Invariant cache hit.
[2024-05-22 16:09:55] [INFO ] Implicit Places using invariants in 219 ms returned [48, 50, 51, 53, 55, 56, 57, 58, 60, 64, 65, 66, 67, 68, 69, 70, 71, 73, 74, 76, 79, 80, 82, 85, 86, 89, 90, 94, 95, 96, 98, 99, 101, 105, 106, 108, 111]
Discarding 37 places :
Ensure Unique test removed 90 transitions
Reduce isomorphic transitions removed 90 transitions.
Implicit Place search using SMT only with invariants took 225 ms to find 37 implicit places.
Starting structural reductions in REACHABILITY mode, iteration 1 : 75/112 places, 137/227 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 75 transition count 136
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 74 transition count 136
Drop transitions removed 70 transitions
Redundant transition composition rules discarded 70 transitions
Iterating global reduction 0 with 70 rules applied. Total rules applied 72 place count 74 transition count 66
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 74 place count 74 transition count 64
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 76 place count 72 transition count 64
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 77 place count 71 transition count 63
Iterating global reduction 2 with 1 rules applied. Total rules applied 78 place count 71 transition count 63
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 2 with 2 rules applied. Total rules applied 80 place count 71 transition count 61
Partial Free-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 81 place count 71 transition count 61
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 82 place count 71 transition count 60
Applied a total of 82 rules in 21 ms. Remains 71 /75 variables (removed 4) and now considering 60/137 (removed 77) transitions.
// Phase 1: matrix 60 rows 71 cols
[2024-05-22 16:09:55] [INFO ] Computed 37 invariants in 1 ms
[2024-05-22 16:09:55] [INFO ] Implicit Places using invariants in 41 ms returned []
[2024-05-22 16:09:55] [INFO ] Invariant cache hit.
[2024-05-22 16:09:55] [INFO ] Implicit Places using invariants and state equation in 111 ms returned []
Implicit Place search using SMT with State Equation took 156 ms to find 0 implicit places.
Starting structural reductions in REACHABILITY mode, iteration 2 : 71/112 places, 60/227 transitions.
Finished structural reductions in REACHABILITY mode , in 2 iterations and 410 ms. Remains : 71/112 places, 60/227 transitions.
Finished random walk after 8785 steps, including 2 resets, run visited all 1 properties in 34 ms. (steps per millisecond=258 )
FORMULA DLCround-PT-07a-ReachabilityFireability-2024-00 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 7513 ms.
starting LoLA
BK_INPUT DLCround-PT-07a
BK_EXAMINATION: ReachabilityFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityFireability

FORMULA DLCround-PT-07a-ReachabilityFireability-2024-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-07a-ReachabilityFireability-2024-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-07a-ReachabilityFireability-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-07a-ReachabilityFireability-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-07a-ReachabilityFireability-2024-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-07a-ReachabilityFireability-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-07a-ReachabilityFireability-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-07a-ReachabilityFireability-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-07a-ReachabilityFireability-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-07a-ReachabilityFireability-2024-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-07a-ReachabilityFireability-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-07a-ReachabilityFireability-2024-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-07a-ReachabilityFireability-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-07a-ReachabilityFireability-2024-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-07a-ReachabilityFireability-2024-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-07a-ReachabilityFireability-2024-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1716394200744

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityFireability.xml
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 53 (type EXCL) for 42 DLCround-PT-07a-ReachabilityFireability-2024-14
lola: time limit : 189 sec
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lola: LAUNCH task # 49 (type FNDP) for 42 DLCround-PT-07a-ReachabilityFireability-2024-14
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lola: LAUNCH task # 50 (type EQUN) for 42 DLCround-PT-07a-ReachabilityFireability-2024-14
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lola: LAUNCH task # 52 (type SRCH) for 42 DLCround-PT-07a-ReachabilityFireability-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 52 (type SRCH) for DLCround-PT-07a-ReachabilityFireability-2024-14
lola: result : true
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lola: CANCELED task # 49 (type FNDP) for DLCround-PT-07a-ReachabilityFireability-2024-14 (obsolete)
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lola: CANCELED task # 53 (type EXCL) for DLCround-PT-07a-ReachabilityFireability-2024-14 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 60 (type EXCL) for 9 DLCround-PT-07a-ReachabilityFireability-2024-03
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 55 (type FNDP) for 9 DLCround-PT-07a-ReachabilityFireability-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 56 (type EQUN) for 9 DLCround-PT-07a-ReachabilityFireability-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SRCH) for 9 DLCround-PT-07a-ReachabilityFireability-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 49 (type FNDP) for DLCround-PT-07a-ReachabilityFireability-2024-14
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-50.sara.
lola: FINISHED task # 60 (type EXCL) for DLCround-PT-07a-ReachabilityFireability-2024-03
lola: result : true
lola: markings : 3
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lola: CANCELED task # 55 (type FNDP) for DLCround-PT-07a-ReachabilityFireability-2024-03 (obsolete)
lola: CANCELED task # 56 (type EQUN) for DLCround-PT-07a-ReachabilityFireability-2024-03 (obsolete)
lola: CANCELED task # 59 (type SRCH) for DLCround-PT-07a-ReachabilityFireability-2024-03 (obsolete)
lola: LAUNCH task # 71 (type EXCL) for 21 DLCround-PT-07a-ReachabilityFireability-2024-07
lola: time limit : 326 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 61 (type FNDP) for 0 DLCround-PT-07a-ReachabilityFireability-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type EQUN) for 0 DLCround-PT-07a-ReachabilityFireability-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 64 (type SRCH) for 0 DLCround-PT-07a-ReachabilityFireability-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 71 (type EXCL) for DLCround-PT-07a-ReachabilityFireability-2024-07
lola: result : true
lola: markings : 9
lola: fired transitions : 17
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 65 (type EXCL) for 0 DLCround-PT-07a-ReachabilityFireability-2024-00
lola: time limit : 326 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 61 (type FNDP) for DLCround-PT-07a-ReachabilityFireability-2024-00
lola: result : true
lola: fired transitions : 56
lola: tried executions : 1
lola: time used : 0.000000
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lola: CANCELED task # 62 (type EQUN) for DLCround-PT-07a-ReachabilityFireability-2024-00 (obsolete)
lola: CANCELED task # 64 (type SRCH) for DLCround-PT-07a-ReachabilityFireability-2024-00 (obsolete)
lola: CANCELED task # 65 (type EXCL) for DLCround-PT-07a-ReachabilityFireability-2024-00 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 92 (type EXCL) for 18 DLCround-PT-07a-ReachabilityFireability-2024-06
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 79 (type FNDP) for 18 DLCround-PT-07a-ReachabilityFireability-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 85 (type EQUN) for 18 DLCround-PT-07a-ReachabilityFireability-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 91 (type SRCH) for 18 DLCround-PT-07a-ReachabilityFireability-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 55 (type FNDP) for DLCround-PT-07a-ReachabilityFireability-2024-03
lola: result : true
lola: fired transitions : 1
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lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 91 (type SRCH) for DLCround-PT-07a-ReachabilityFireability-2024-06
lola: result : true
lola: markings : 7
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 79 (type FNDP) for DLCround-PT-07a-ReachabilityFireability-2024-06 (obsolete)
lola: CANCELED task # 85 (type EQUN) for DLCround-PT-07a-ReachabilityFireability-2024-06 (obsolete)
lola: CANCELED task # 92 (type EXCL) for DLCround-PT-07a-ReachabilityFireability-2024-06 (obsolete)
lola: LAUNCH task # 90 (type EXCL) for 24 DLCround-PT-07a-ReachabilityFireability-2024-08
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 95 (type FNDP) for 30 DLCround-PT-07a-ReachabilityFireability-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 99 (type EQUN) for 30 DLCround-PT-07a-ReachabilityFireability-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 103 (type SRCH) for 30 DLCround-PT-07a-ReachabilityFireability-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 79 (type FNDP) for DLCround-PT-07a-ReachabilityFireability-2024-06
lola: result : true
lola: fired transitions : 5
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 90 (type EXCL) for DLCround-PT-07a-ReachabilityFireability-2024-08
lola: result : true
lola: markings : 5
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 97 (type EXCL) for 3 DLCround-PT-07a-ReachabilityFireability-2024-01
lola: time limit : 326 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.

sara: try reading problem file /home/mcc/execution/ReachabilityFireability-56.sara.
lola: FINISHED task # 50 (type EQUN) for DLCround-PT-07a-ReachabilityFireability-2024-14
lola: result : true
lola: FINISHED task # 103 (type SRCH) for DLCround-PT-07a-ReachabilityFireability-2024-10
lola: result : false
lola: markings : 3267
lola: fired transitions : 32079
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 95 (type FNDP) for DLCround-PT-07a-ReachabilityFireability-2024-10 (obsolete)
lola: CANCELED task # 99 (type EQUN) for DLCround-PT-07a-ReachabilityFireability-2024-10 (obsolete)
lola: LAUNCH task # 78 (type FNDP) for 15 DLCround-PT-07a-ReachabilityFireability-2024-05
lola: time limit : 32000000 sec
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lola: LAUNCH task # 83 (type EQUN) for 15 DLCround-PT-07a-ReachabilityFireability-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 93 (type SRCH) for 15 DLCround-PT-07a-ReachabilityFireability-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 93 (type SRCH) for DLCround-PT-07a-ReachabilityFireability-2024-05
lola: result : true
lola: markings : 6
lola: fired transitions : 5
lola: time used : 0.000000
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lola: CANCELED task # 78 (type FNDP) for DLCround-PT-07a-ReachabilityFireability-2024-05 (obsolete)
lola: CANCELED task # 83 (type EQUN) for DLCround-PT-07a-ReachabilityFireability-2024-05 (obsolete)
lola: LAUNCH task # 108 (type FNDP) for 36 DLCround-PT-07a-ReachabilityFireability-2024-12
lola: time limit : 32000000 sec
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lola: LAUNCH task # 110 (type EQUN) for 36 DLCround-PT-07a-ReachabilityFireability-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 115 (type SRCH) for 36 DLCround-PT-07a-ReachabilityFireability-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 97 (type EXCL) for DLCround-PT-07a-ReachabilityFireability-2024-01
lola: result : true
lola: markings : 14
lola: fired transitions : 38
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 116 (type EXCL) for 36 DLCround-PT-07a-ReachabilityFireability-2024-12
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 115 (type SRCH) for DLCround-PT-07a-ReachabilityFireability-2024-12
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 116 (type EXCL) for DLCround-PT-07a-ReachabilityFireability-2024-12
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 108 (type FNDP) for DLCround-PT-07a-ReachabilityFireability-2024-12 (obsolete)
lola: CANCELED task # 110 (type EQUN) for DLCround-PT-07a-ReachabilityFireability-2024-12 (obsolete)
lola: FINISHED task # 78 (type FNDP) for DLCround-PT-07a-ReachabilityFireability-2024-05
lola: result : true
lola: fired transitions : 4
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 108 (type FNDP) for DLCround-PT-07a-ReachabilityFireability-2024-12
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-83.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-110.sara.
sara: place or transition ordering is non-deterministic

lola: Created skeleton in 0.000000 secs.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 121 (type EXCL) for 33 DLCround-PT-07a-ReachabilityFireability-2024-11
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 122 (type SRCH) for 6 DLCround-PT-07a-ReachabilityFireability-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 125 (type SRCH) for 6 DLCround-PT-07a-ReachabilityFireability-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 114 (type FNDP) for 33 DLCround-PT-07a-ReachabilityFireability-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 110 (type EQUN) for DLCround-PT-07a-ReachabilityFireability-2024-12
lola: result : true
lola: FINISHED task # 121 (type EXCL) for DLCround-PT-07a-ReachabilityFireability-2024-11
lola: result : true
lola: markings : 7
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 114 (type FNDP) for DLCround-PT-07a-ReachabilityFireability-2024-11 (obsolete)
lola: LAUNCH task # 123 (type EXCL) for 6 DLCround-PT-07a-ReachabilityFireability-2024-02
lola: time limit : 1198 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 109 (type FNDP) for 6 DLCround-PT-07a-ReachabilityFireability-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages

lola: FINISHED task # 123 (type EXCL) for DLCround-PT-07a-ReachabilityFireability-2024-02
lola: result : true
lola: markings : 19
lola: fired transitions : 79
lola: time used : 0.000000
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lola: CANCELED task # 109 (type FNDP) for DLCround-PT-07a-ReachabilityFireability-2024-02 (obsolete)
lola: CANCELED task # 122 (type SRCH) for DLCround-PT-07a-ReachabilityFireability-2024-02 (obsolete)
lola: CANCELED task # 125 (type SRCH) for DLCround-PT-07a-ReachabilityFireability-2024-02 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 114 (type FNDP) for DLCround-PT-07a-ReachabilityFireability-2024-11
lola: result : true
lola: fired transitions : 4
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 83 (type EQUN) for DLCround-PT-07a-ReachabilityFireability-2024-05
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 138 (type EXCL) for 12 DLCround-PT-07a-ReachabilityFireability-2024-04
lola: time limit : 1198 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 130 (type FNDP) for 12 DLCround-PT-07a-ReachabilityFireability-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 135 (type EQUN) for 12 DLCround-PT-07a-ReachabilityFireability-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 137 (type SRCH) for 12 DLCround-PT-07a-ReachabilityFireability-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 137 (type SRCH) for DLCround-PT-07a-ReachabilityFireability-2024-04
lola: result : true
lola: markings : 10
lola: fired transitions : 9
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 130 (type FNDP) for DLCround-PT-07a-ReachabilityFireability-2024-04 (obsolete)
lola: CANCELED task # 135 (type EQUN) for DLCround-PT-07a-ReachabilityFireability-2024-04 (obsolete)
lola: CANCELED task # 138 (type EXCL) for DLCround-PT-07a-ReachabilityFireability-2024-04 (obsolete)
lola: LAUNCH task # 142 (type EXCL) for 27 DLCround-PT-07a-ReachabilityFireability-2024-09
lola: time limit : 1198 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 126 (type FNDP) for 45 DLCround-PT-07a-ReachabilityFireability-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 128 (type EQUN) for 45 DLCround-PT-07a-ReachabilityFireability-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 133 (type SRCH) for 45 DLCround-PT-07a-ReachabilityFireability-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 142 (type EXCL) for DLCround-PT-07a-ReachabilityFireability-2024-09
lola: result : true
lola: markings : 25
lola: fired transitions : 81
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 148 (type EXCL) for 39 DLCround-PT-07a-ReachabilityFireability-2024-13
lola: time limit : 1798 sec
lola: memory limit: 32 pages
lola: FINISHED task # 130 (type FNDP) for DLCround-PT-07a-ReachabilityFireability-2024-04
lola: result : true
lola: fired transitions : 8
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 148 (type EXCL) for DLCround-PT-07a-ReachabilityFireability-2024-13
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 134 (type EXCL) for 45 DLCround-PT-07a-ReachabilityFireability-2024-15
lola: time limit : 3596 sec
lola: memory limit: 32 pages
lola: FINISHED task # 126 (type FNDP) for DLCround-PT-07a-ReachabilityFireability-2024-15
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 128 (type EQUN) for DLCround-PT-07a-ReachabilityFireability-2024-15 (obsolete)
lola: CANCELED task # 133 (type SRCH) for DLCround-PT-07a-ReachabilityFireability-2024-15 (obsolete)
lola: CANCELED task # 134 (type EXCL) for DLCround-PT-07a-ReachabilityFireability-2024-15 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-07a-ReachabilityFireability-2024-00: AG false findpath
DLCround-PT-07a-ReachabilityFireability-2024-01: AG false tandem / relaxed
DLCround-PT-07a-ReachabilityFireability-2024-02: EF true tandem / relaxed
DLCround-PT-07a-ReachabilityFireability-2024-03: EF true tandem / relaxed
DLCround-PT-07a-ReachabilityFireability-2024-04: EF true tandem / insertion
DLCround-PT-07a-ReachabilityFireability-2024-05: EF true tandem / insertion
DLCround-PT-07a-ReachabilityFireability-2024-06: AG false tandem / insertion
DLCround-PT-07a-ReachabilityFireability-2024-07: EF true tandem / relaxed
DLCround-PT-07a-ReachabilityFireability-2024-08: EF true tandem / relaxed
DLCround-PT-07a-ReachabilityFireability-2024-09: EF true tandem / relaxed
DLCround-PT-07a-ReachabilityFireability-2024-10: AG true tandem / insertion
DLCround-PT-07a-ReachabilityFireability-2024-11: AG false tandem / relaxed
DLCround-PT-07a-ReachabilityFireability-2024-12: EF true tandem / insertion
DLCround-PT-07a-ReachabilityFireability-2024-13: EF true tandem / relaxed
DLCround-PT-07a-ReachabilityFireability-2024-14: AG false tandem / insertion
DLCround-PT-07a-ReachabilityFireability-2024-15: EF true findpath


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-07a"
export BK_EXAMINATION="ReachabilityFireability"
export BK_TOOL="gold2023"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool gold2023"
echo " Input is DLCround-PT-07a, examination is ReachabilityFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r131-smll-171624288400115"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-07a.tgz
mv DLCround-PT-07a execution
cd execution
if [ "ReachabilityFireability" = "ReachabilityDeadlock" ] || [ "ReachabilityFireability" = "UpperBounds" ] || [ "ReachabilityFireability" = "QuasiLiveness" ] || [ "ReachabilityFireability" = "StableMarking" ] || [ "ReachabilityFireability" = "Liveness" ] || [ "ReachabilityFireability" = "OneSafe" ] || [ "ReachabilityFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityFireability" = "ReachabilityDeadlock" ] || [ "ReachabilityFireability" = "QuasiLiveness" ] || [ "ReachabilityFireability" = "StableMarking" ] || [ "ReachabilityFireability" = "Liveness" ] || [ "ReachabilityFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;