fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r131-smll-171624288300104
Last Updated
July 7, 2024

About the Execution of 2023-gold for DLCround-PT-06a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
387.119 12260.00 22499.00 533.80 FFTFTTTTFTFFTFFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r131-smll-171624288300104.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool gold2023
Input is DLCround-PT-06a, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r131-smll-171624288300104
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 804K
-rw-r--r-- 1 mcc users 6.3K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 66K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.4K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 63K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Apr 22 14:38 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Apr 22 14:38 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Apr 22 14:38 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 22 14:38 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Apr 13 13:36 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 128K Apr 13 13:36 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.6K Apr 13 13:19 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 86K Apr 13 13:19 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:38 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:38 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 325K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-2024-00
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-2024-01
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-2024-02
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-2024-03
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-2024-04
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-2024-05
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-2024-06
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-2024-07
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-2024-08
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-2024-09
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-2024-10
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-2024-11
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-2024-12
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-2024-13
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-2024-14
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-2024-15

=== Now, execution of the tool begins

BK_START 1716393495658

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=gold2023
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCround-PT-06a
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2024-05-22 15:58:18] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2024-05-22 15:58:18] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-22 15:58:19] [INFO ] Load time of PNML (sax parser for PT used): 394 ms
[2024-05-22 15:58:19] [INFO ] Transformed 197 places.
[2024-05-22 15:58:19] [INFO ] Transformed 1313 transitions.
[2024-05-22 15:58:19] [INFO ] Found NUPN structural information;
[2024-05-22 15:58:19] [INFO ] Parsed PT model containing 197 places and 1313 transitions and 5002 arcs in 569 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 41 ms.
Working with output stream class java.io.PrintStream
Ensure Unique test removed 135 transitions
Reduce redundant transitions removed 135 transitions.
FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 812 ms. (steps per millisecond=12 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 70 ms. (steps per millisecond=142 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 43 ms. (steps per millisecond=232 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 52 ms. (steps per millisecond=192 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 42 ms. (steps per millisecond=238 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 117 ms. (steps per millisecond=85 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 79 ms. (steps per millisecond=126 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 41 ms. (steps per millisecond=243 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 8) seen :0
Interrupted probabilistic random walk after 125979 steps, run timeout after 3001 ms. (steps per millisecond=41 ) properties seen :{}
Probabilistic random walk after 125979 steps, saw 84872 distinct states, run finished after 3006 ms. (steps per millisecond=41 ) properties seen :0
Running SMT prover for 8 properties.
[2024-05-22 15:58:24] [INFO ] Flow matrix only has 154 transitions (discarded 1024 similar events)
// Phase 1: matrix 154 rows 197 cols
[2024-05-22 15:58:24] [INFO ] Computed 109 invariants in 16 ms
[2024-05-22 15:58:24] [INFO ] After 592ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:8
[2024-05-22 15:58:25] [INFO ] [Nat]Absence check using 109 positive place invariants in 62 ms returned sat
[2024-05-22 15:58:25] [INFO ] After 307ms SMT Verify possible using all constraints in natural domain returned unsat :8 sat :0
FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-15 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-12 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-09 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-08 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-07 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-06 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-05 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-02 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 8 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 6134 ms.
starting LoLA
BK_INPUT DLCround-PT-06a
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-06a-ReachabilityCardinality-2024-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1716393507918

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 50 (type SKEL/FNDP) for 15 DLCround-PT-06a-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 51 (type SKEL/EQUN) for 15 DLCround-PT-06a-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type SKEL/SRCH) for 15 DLCround-PT-06a-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type SKEL/SRCH) for 15 DLCround-PT-06a-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 54 (type SKEL/SRCH) for DLCround-PT-06a-ReachabilityCardinality-2024-05
lola: result : false
lola: markings : 268
lola: fired transitions : 1228
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 50 (type FNDP) for DLCround-PT-06a-ReachabilityCardinality-2024-05 (obsolete)
lola: CANCELED task # 51 (type EQUN) for DLCround-PT-06a-ReachabilityCardinality-2024-05 (obsolete)
lola: CANCELED task # 53 (type SRCH) for DLCround-PT-06a-ReachabilityCardinality-2024-05 (obsolete)
lola: LAUNCH task # 57 (type SKEL/FNDP) for 9 DLCround-PT-06a-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SKEL/EQUN) for 9 DLCround-PT-06a-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type SKEL/SRCH) for 9 DLCround-PT-06a-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type SKEL/SRCH) for 9 DLCround-PT-06a-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-51.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-58.sara.
lola: FINISHED task # 60 (type SKEL/SRCH) for DLCround-PT-06a-ReachabilityCardinality-2024-03
lola: result : false
lola: markings : 11
lola: fired transitions : 52
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 57 (type FNDP) for DLCround-PT-06a-ReachabilityCardinality-2024-03 (obsolete)
lola: CANCELED task # 58 (type EQUN) for DLCround-PT-06a-ReachabilityCardinality-2024-03 (obsolete)
lola: CANCELED task # 61 (type SRCH) for DLCround-PT-06a-ReachabilityCardinality-2024-03 (obsolete)
lola: FINISHED task # 58 (type SKEL/EQUN) for DLCround-PT-06a-ReachabilityCardinality-2024-03
lola: result : unknown
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 4 (type CNST) for 3 DLCround-PT-06a-ReachabilityCardinality-2024-01
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 19 (type CNST) for 18 DLCround-PT-06a-ReachabilityCardinality-2024-06
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 25 (type CNST) for 24 DLCround-PT-06a-ReachabilityCardinality-2024-08
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 37 (type CNST) for 36 DLCround-PT-06a-ReachabilityCardinality-2024-12
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 46 (type CNST) for 45 DLCround-PT-06a-ReachabilityCardinality-2024-15
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 4 (type CNST) for DLCround-PT-06a-ReachabilityCardinality-2024-01
lola: result : false
lola: FINISHED task # 25 (type CNST) for DLCround-PT-06a-ReachabilityCardinality-2024-08
lola: result : false
lola: FINISHED task # 37 (type CNST) for DLCround-PT-06a-ReachabilityCardinality-2024-12
lola: result : true
lola: FINISHED task # 19 (type CNST) for DLCround-PT-06a-ReachabilityCardinality-2024-06
lola: result : true
lola: FINISHED task # 46 (type CNST) for DLCround-PT-06a-ReachabilityCardinality-2024-15
lola: result : true
lola: Created skeleton in 0.000000 secs.
sara: place or transition ordering is non-deterministic
lola: Created skeleton in 0.000000 secs.

lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 51 (type SKEL/EQUN) for DLCround-PT-06a-ReachabilityCardinality-2024-05
lola: result : false
lola: planning for DLCround-PT-06a-ReachabilityCardinality-2024-03 stopped (result already fixed).
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 67 (type EXCL) for 0 DLCround-PT-06a-ReachabilityCardinality-2024-00
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 63 (type FNDP) for 0 DLCround-PT-06a-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 64 (type EQUN) for 0 DLCround-PT-06a-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type SRCH) for 0 DLCround-PT-06a-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 67 (type EXCL) for DLCround-PT-06a-ReachabilityCardinality-2024-00
lola: result : false
lola: markings : 8
lola: fired transitions : 30
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 63 (type FNDP) for DLCround-PT-06a-ReachabilityCardinality-2024-00 (obsolete)
lola: CANCELED task # 64 (type EQUN) for DLCround-PT-06a-ReachabilityCardinality-2024-00 (obsolete)
lola: CANCELED task # 66 (type SRCH) for DLCround-PT-06a-ReachabilityCardinality-2024-00 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 74 (type EXCL) for 12 DLCround-PT-06a-ReachabilityCardinality-2024-04
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 70 (type FNDP) for 12 DLCround-PT-06a-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 71 (type EQUN) for 12 DLCround-PT-06a-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 73 (type SRCH) for 12 DLCround-PT-06a-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-64.sara.
lola: FINISHED task # 74 (type EXCL) for DLCround-PT-06a-ReachabilityCardinality-2024-04
lola: result : false
lola: markings : 37
lola: fired transitions : 432
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 70 (type FNDP) for DLCround-PT-06a-ReachabilityCardinality-2024-04 (obsolete)
lola: CANCELED task # 71 (type EQUN) for DLCround-PT-06a-ReachabilityCardinality-2024-04 (obsolete)
lola: CANCELED task # 73 (type SRCH) for DLCround-PT-06a-ReachabilityCardinality-2024-04 (obsolete)
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 85 (type EXCL) for 39 DLCround-PT-06a-ReachabilityCardinality-2024-13
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 76 (type FNDP) for 39 DLCround-PT-06a-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-71.sara.
lola: LAUNCH task # 77 (type EQUN) for 39 DLCround-PT-06a-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: planning for DLCround-PT-06a-ReachabilityCardinality-2024-05 stopped (result already fixed).
lola: LAUNCH task # 84 (type SRCH) for 39 DLCround-PT-06a-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 85 (type EXCL) for DLCround-PT-06a-ReachabilityCardinality-2024-13
lola: result : false
lola: markings : 94
lola: fired transitions : 724
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 76 (type FNDP) for DLCround-PT-06a-ReachabilityCardinality-2024-13 (obsolete)
lola: CANCELED task # 77 (type EQUN) for DLCround-PT-06a-ReachabilityCardinality-2024-13 (obsolete)
lola: CANCELED task # 84 (type SRCH) for DLCround-PT-06a-ReachabilityCardinality-2024-13 (obsolete)
lola: LAUNCH task # 93 (type EXCL) for 21 DLCround-PT-06a-ReachabilityCardinality-2024-07
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 78 (type FNDP) for 30 DLCround-PT-06a-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 79 (type EQUN) for 30 DLCround-PT-06a-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 81 (type SRCH) for 30 DLCround-PT-06a-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: place or transition ordering is non-deterministic

lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 93 (type EXCL) for DLCround-PT-06a-ReachabilityCardinality-2024-07
lola: result : false
lola: markings : 3
lola: fired transitions : 12
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-77.sara.
lola: LAUNCH task # 82 (type EXCL) for 30 DLCround-PT-06a-ReachabilityCardinality-2024-10
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 81 (type SRCH) for DLCround-PT-06a-ReachabilityCardinality-2024-10
lola: result : false
lola: markings : 8
lola: fired transitions : 47
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 78 (type FNDP) for DLCround-PT-06a-ReachabilityCardinality-2024-10 (obsolete)
lola: CANCELED task # 79 (type EQUN) for DLCround-PT-06a-ReachabilityCardinality-2024-10 (obsolete)
lola: CANCELED task # 82 (type EXCL) for DLCround-PT-06a-ReachabilityCardinality-2024-10 (obsolete)
lola: FINISHED task # 78 (type FNDP) for DLCround-PT-06a-ReachabilityCardinality-2024-10
lola: result : unknown
lola: fired transitions : 2747
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 108 (type EXCL) for 33 DLCround-PT-06a-ReachabilityCardinality-2024-11
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 97 (type FNDP) for 33 DLCround-PT-06a-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 101 (type EQUN) for 33 DLCround-PT-06a-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 107 (type SRCH) for 33 DLCround-PT-06a-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 108 (type EXCL) for DLCround-PT-06a-ReachabilityCardinality-2024-11
lola: result : false
lola: markings : 11
lola: fired transitions : 39
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 79 (type EQUN) for DLCround-PT-06a-ReachabilityCardinality-2024-10
lola: result : unknown
lola: CANCELED task # 97 (type FNDP) for DLCround-PT-06a-ReachabilityCardinality-2024-11 (obsolete)
lola: CANCELED task # 101 (type EQUN) for DLCround-PT-06a-ReachabilityCardinality-2024-11 (obsolete)
lola: CANCELED task # 107 (type SRCH) for DLCround-PT-06a-ReachabilityCardinality-2024-11 (obsolete)
lola: LAUNCH task # 112 (type EXCL) for 42 DLCround-PT-06a-ReachabilityCardinality-2024-14
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 100 (type FNDP) for 6 DLCround-PT-06a-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 102 (type EQUN) for 6 DLCround-PT-06a-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 105 (type SRCH) for 6 DLCround-PT-06a-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-101.sara.
lola: FINISHED task # 64 (type EQUN) for DLCround-PT-06a-ReachabilityCardinality-2024-00
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 102 (type EQUN) for DLCround-PT-06a-ReachabilityCardinality-2024-02
lola: result : false
lola: CANCELED task # 100 (type FNDP) for DLCround-PT-06a-ReachabilityCardinality-2024-02 (obsolete)
lola: CANCELED task # 105 (type SRCH) for DLCround-PT-06a-ReachabilityCardinality-2024-02 (obsolete)
lola: LAUNCH task # 115 (type FNDP) for 27 DLCround-PT-06a-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 116 (type EQUN) for 27 DLCround-PT-06a-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 118 (type SRCH) for 27 DLCround-PT-06a-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 112 (type EXCL) for DLCround-PT-06a-ReachabilityCardinality-2024-14
lola: result : false
lola: markings : 9
lola: fired transitions : 77
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 119 (type EXCL) for 27 DLCround-PT-06a-ReachabilityCardinality-2024-09
lola: time limit : 3599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 119 (type EXCL) for DLCround-PT-06a-ReachabilityCardinality-2024-09
lola: result : false
lola: markings : 7
lola: fired transitions : 21
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 115 (type FNDP) for DLCround-PT-06a-ReachabilityCardinality-2024-09 (obsolete)
lola: CANCELED task # 116 (type EQUN) for DLCround-PT-06a-ReachabilityCardinality-2024-09 (obsolete)
lola: CANCELED task # 118 (type SRCH) for DLCround-PT-06a-ReachabilityCardinality-2024-09 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-06a-ReachabilityCardinality-2024-00: EF false tandem / relaxed
DLCround-PT-06a-ReachabilityCardinality-2024-01: INITIAL false preprocessing
DLCround-PT-06a-ReachabilityCardinality-2024-02: AG true state equation
DLCround-PT-06a-ReachabilityCardinality-2024-03: EF false skeleton: tandem / insertion
DLCround-PT-06a-ReachabilityCardinality-2024-04: AG true tandem / relaxed
DLCround-PT-06a-ReachabilityCardinality-2024-05: AG true skeleton: tandem / relaxed
DLCround-PT-06a-ReachabilityCardinality-2024-06: INITIAL true preprocessing
DLCround-PT-06a-ReachabilityCardinality-2024-07: AG true tandem / relaxed
DLCround-PT-06a-ReachabilityCardinality-2024-08: INITIAL false preprocessing
DLCround-PT-06a-ReachabilityCardinality-2024-09: AG true tandem / relaxed
DLCround-PT-06a-ReachabilityCardinality-2024-10: EF false tandem / insertion
DLCround-PT-06a-ReachabilityCardinality-2024-11: EF false tandem / relaxed
DLCround-PT-06a-ReachabilityCardinality-2024-12: INITIAL true preprocessing
DLCround-PT-06a-ReachabilityCardinality-2024-13: EF false tandem / relaxed
DLCround-PT-06a-ReachabilityCardinality-2024-14: EF false tandem / relaxed
DLCround-PT-06a-ReachabilityCardinality-2024-15: INITIAL true preprocessing


Time elapsed: 1 secs. Pages in use: 2
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-06a"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="gold2023"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool gold2023"
echo " Input is DLCround-PT-06a, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r131-smll-171624288300104"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-06a.tgz
mv DLCround-PT-06a execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;