Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r131-smll-171624288300079.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool gold2023
Input is DLCround-PT-03b, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r131-smll-171624288300079
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 936K
-rw-r--r-- 1 mcc users 7.1K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 82K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.0K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 45K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:37 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 22 14:37 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Apr 22 14:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Apr 22 14:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Apr 13 12:26 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 144K Apr 13 12:26 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Apr 13 12:25 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 93K Apr 13 12:25 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:37 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:37 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 432K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-03b-ReachabilityCardinality-2024-00
FORMULA_NAME DLCround-PT-03b-ReachabilityCardinality-2024-01
FORMULA_NAME DLCround-PT-03b-ReachabilityCardinality-2024-02
FORMULA_NAME DLCround-PT-03b-ReachabilityCardinality-2024-03
FORMULA_NAME DLCround-PT-03b-ReachabilityCardinality-2024-04
FORMULA_NAME DLCround-PT-03b-ReachabilityCardinality-2024-05
FORMULA_NAME DLCround-PT-03b-ReachabilityCardinality-2024-06
FORMULA_NAME DLCround-PT-03b-ReachabilityCardinality-2024-07
FORMULA_NAME DLCround-PT-03b-ReachabilityCardinality-2024-08
FORMULA_NAME DLCround-PT-03b-ReachabilityCardinality-2024-09
FORMULA_NAME DLCround-PT-03b-ReachabilityCardinality-2024-10
FORMULA_NAME DLCround-PT-03b-ReachabilityCardinality-2024-11
FORMULA_NAME DLCround-PT-03b-ReachabilityCardinality-2024-12
FORMULA_NAME DLCround-PT-03b-ReachabilityCardinality-2024-13
FORMULA_NAME DLCround-PT-03b-ReachabilityCardinality-2024-14
FORMULA_NAME DLCround-PT-03b-ReachabilityCardinality-2024-15

=== Now, execution of the tool begins

BK_START 1716390503723

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=gold2023
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCround-PT-03b
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2024-05-22 15:08:26] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2024-05-22 15:08:26] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-22 15:08:26] [INFO ] Load time of PNML (sax parser for PT used): 237 ms
[2024-05-22 15:08:26] [INFO ] Transformed 1383 places.
[2024-05-22 15:08:26] [INFO ] Transformed 1887 transitions.
[2024-05-22 15:08:26] [INFO ] Found NUPN structural information;
[2024-05-22 15:08:26] [INFO ] Parsed PT model containing 1383 places and 1887 transitions and 4809 arcs in 357 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 32 ms.
Working with output stream class java.io.PrintStream
FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 681 ms. (steps per millisecond=14 ) properties (out of 12) seen :7
FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-15 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-13 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-08 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-06 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-05 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-02 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-00 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 98 ms. (steps per millisecond=102 ) properties (out of 5) seen :1
FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-10 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 45 ms. (steps per millisecond=222 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 74 ms. (steps per millisecond=135 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 54 ms. (steps per millisecond=185 ) properties (out of 4) seen :0
Running SMT prover for 4 properties.
// Phase 1: matrix 1887 rows 1383 cols
[2024-05-22 15:08:27] [INFO ] Computed 52 invariants in 39 ms
[2024-05-22 15:08:28] [INFO ] After 932ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2024-05-22 15:08:29] [INFO ] [Nat]Absence check using 52 positive place invariants in 51 ms returned sat
[2024-05-22 15:08:30] [INFO ] After 1350ms SMT Verify possible using state equation in natural domain returned unsat :1 sat :3
[2024-05-22 15:08:31] [INFO ] Deduced a trap composed of 89 places in 564 ms of which 9 ms to minimize.
[2024-05-22 15:08:32] [INFO ] Deduced a trap composed of 97 places in 426 ms of which 2 ms to minimize.
[2024-05-22 15:08:32] [INFO ] Trap strengthening (SAT) tested/added 3/2 trap constraints in 1394 ms
[2024-05-22 15:08:32] [INFO ] After 3279ms SMT Verify possible using trap constraints in natural domain returned unsat :1 sat :3
Attempting to minimize the solution found.
Minimization took 418 ms.
[2024-05-22 15:08:33] [INFO ] After 4401ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :3
FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-14 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 4 Parikh solutions to 3 different solutions.
Parikh walk visited 0 properties in 47 ms.
Support contains 87 out of 1383 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1383/1383 places, 1887/1887 transitions.
Graph (trivial) has 1174 edges and 1383 vertex of which 137 / 1383 are part of one of the 13 SCC in 9 ms
Free SCC test removed 124 places
Drop transitions removed 141 transitions
Reduce isomorphic transitions removed 141 transitions.
Drop transitions removed 538 transitions
Trivial Post-agglo rules discarded 538 transitions
Performed 538 trivial Post agglomeration. Transition count delta: 538
Iterating post reduction 0 with 538 rules applied. Total rules applied 539 place count 1259 transition count 1208
Reduce places removed 538 places and 0 transitions.
Ensure Unique test removed 18 transitions
Reduce isomorphic transitions removed 18 transitions.
Drop transitions removed 13 transitions
Trivial Post-agglo rules discarded 13 transitions
Performed 13 trivial Post agglomeration. Transition count delta: 13
Iterating post reduction 1 with 569 rules applied. Total rules applied 1108 place count 721 transition count 1177
Reduce places removed 13 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 2 with 15 rules applied. Total rules applied 1123 place count 708 transition count 1175
Reduce places removed 1 places and 0 transitions.
Performed 36 Post agglomeration using F-continuation condition.Transition count delta: 36
Iterating post reduction 3 with 37 rules applied. Total rules applied 1160 place count 707 transition count 1139
Reduce places removed 36 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 4 with 37 rules applied. Total rules applied 1197 place count 671 transition count 1138
Performed 28 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 28 Pre rules applied. Total rules applied 1197 place count 671 transition count 1110
Deduced a syphon composed of 28 places in 7 ms
Reduce places removed 28 places and 0 transitions.
Iterating global reduction 5 with 56 rules applied. Total rules applied 1253 place count 643 transition count 1110
Discarding 119 places :
Symmetric choice reduction at 5 with 119 rule applications. Total rules 1372 place count 524 transition count 991
Iterating global reduction 5 with 119 rules applied. Total rules applied 1491 place count 524 transition count 991
Performed 35 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 35 Pre rules applied. Total rules applied 1491 place count 524 transition count 956
Deduced a syphon composed of 35 places in 5 ms
Reduce places removed 35 places and 0 transitions.
Iterating global reduction 5 with 70 rules applied. Total rules applied 1561 place count 489 transition count 956
Discarding 12 places :
Symmetric choice reduction at 5 with 12 rule applications. Total rules 1573 place count 477 transition count 878
Iterating global reduction 5 with 12 rules applied. Total rules applied 1585 place count 477 transition count 878
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 5 with 4 rules applied. Total rules applied 1589 place count 477 transition count 874
Performed 104 Post agglomeration using F-continuation condition with reduction of 1 identical transitions.
Deduced a syphon composed of 104 places in 1 ms
Reduce places removed 104 places and 0 transitions.
Iterating global reduction 6 with 208 rules applied. Total rules applied 1797 place count 373 transition count 769
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 6 with 2 rules applied. Total rules applied 1799 place count 373 transition count 767
Discarding 3 places :
Symmetric choice reduction at 7 with 3 rule applications. Total rules 1802 place count 370 transition count 746
Iterating global reduction 7 with 3 rules applied. Total rules applied 1805 place count 370 transition count 746
Performed 40 Post agglomeration using F-continuation condition with reduction of 4 identical transitions.
Deduced a syphon composed of 40 places in 1 ms
Reduce places removed 40 places and 0 transitions.
Iterating global reduction 7 with 80 rules applied. Total rules applied 1885 place count 330 transition count 946
Drop transitions removed 24 transitions
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 25 transitions.
Iterating post reduction 7 with 25 rules applied. Total rules applied 1910 place count 330 transition count 921
Discarding 4 places :
Symmetric choice reduction at 8 with 4 rule applications. Total rules 1914 place count 326 transition count 877
Iterating global reduction 8 with 4 rules applied. Total rules applied 1918 place count 326 transition count 877
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 8 with 4 rules applied. Total rules applied 1922 place count 326 transition count 873
Drop transitions removed 42 transitions
Redundant transition composition rules discarded 42 transitions
Iterating global reduction 9 with 42 rules applied. Total rules applied 1964 place count 326 transition count 831
Discarding 3 places :
Symmetric choice reduction at 9 with 3 rule applications. Total rules 1967 place count 323 transition count 809
Iterating global reduction 9 with 3 rules applied. Total rules applied 1970 place count 323 transition count 809
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 9 with 2 rules applied. Total rules applied 1972 place count 323 transition count 807
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: -10
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 10 with 2 rules applied. Total rules applied 1974 place count 322 transition count 817
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 10 with 1 rules applied. Total rules applied 1975 place count 322 transition count 816
Drop transitions removed 8 transitions
Redundant transition composition rules discarded 8 transitions
Iterating global reduction 11 with 8 rules applied. Total rules applied 1983 place count 322 transition count 808
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -19
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 11 with 4 rules applied. Total rules applied 1987 place count 320 transition count 827
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 11 with 2 rules applied. Total rules applied 1989 place count 320 transition count 825
Drop transitions removed 5 transitions
Redundant transition composition rules discarded 5 transitions
Iterating global reduction 12 with 5 rules applied. Total rules applied 1994 place count 320 transition count 820
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: -10
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 12 with 2 rules applied. Total rules applied 1996 place count 319 transition count 830
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 12 with 1 rules applied. Total rules applied 1997 place count 319 transition count 829
Drop transitions removed 5 transitions
Redundant transition composition rules discarded 5 transitions
Iterating global reduction 13 with 5 rules applied. Total rules applied 2002 place count 319 transition count 824
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: -12
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 13 with 2 rules applied. Total rules applied 2004 place count 318 transition count 836
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 13 with 2 rules applied. Total rules applied 2006 place count 318 transition count 834
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 14 with 2 rules applied. Total rules applied 2008 place count 318 transition count 832
Free-agglomeration rule applied 71 times with reduction of 20 identical transitions.
Iterating global reduction 14 with 71 rules applied. Total rules applied 2079 place count 318 transition count 741
Reduce places removed 71 places and 0 transitions.
Drop transitions removed 63 transitions
Ensure Unique test removed 10 transitions
Reduce isomorphic transitions removed 73 transitions.
Iterating post reduction 14 with 144 rules applied. Total rules applied 2223 place count 247 transition count 668
Drop transitions removed 50 transitions
Redundant transition composition rules discarded 50 transitions
Iterating global reduction 15 with 50 rules applied. Total rules applied 2273 place count 247 transition count 618
Discarding 3 places :
Symmetric choice reduction at 15 with 3 rule applications. Total rules 2276 place count 244 transition count 611
Iterating global reduction 15 with 3 rules applied. Total rules applied 2279 place count 244 transition count 611
Free-agglomeration rule applied 1 times.
Iterating global reduction 15 with 1 rules applied. Total rules applied 2280 place count 244 transition count 610
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 15 with 1 rules applied. Total rules applied 2281 place count 243 transition count 610
Partial Free-agglomeration rule applied 5 times.
Drop transitions removed 5 transitions
Iterating global reduction 16 with 5 rules applied. Total rules applied 2286 place count 243 transition count 610
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 16 with 2 rules applied. Total rules applied 2288 place count 243 transition count 608
Discarding 1 places :
Symmetric choice reduction at 16 with 1 rule applications. Total rules 2289 place count 242 transition count 607
Iterating global reduction 16 with 1 rules applied. Total rules applied 2290 place count 242 transition count 607
Partial Free-agglomeration rule applied 2 times.
Drop transitions removed 2 transitions
Iterating global reduction 16 with 2 rules applied. Total rules applied 2292 place count 242 transition count 607
Applied a total of 2292 rules in 600 ms. Remains 242 /1383 variables (removed 1141) and now considering 607/1887 (removed 1280) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 601 ms. Remains : 242/1383 places, 607/1887 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 116 ms. (steps per millisecond=86 ) properties (out of 3) seen :2
FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-04 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-01 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Finished Best-First random walk after 3011 steps, including 0 resets, run visited all 1 properties in 7 ms. (steps per millisecond=430 )
FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-12 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 7770 ms.
starting LoLA
BK_INPUT DLCround-PT-03b
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03b-ReachabilityCardinality-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1716390573612

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 52 (type EXCL) for 6 DLCround-PT-03b-ReachabilityCardinality-2024-02
lola: time limit : 149 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 48 (type FNDP) for 6 DLCround-PT-03b-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 49 (type EQUN) for 6 DLCround-PT-03b-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type SRCH) for 6 DLCround-PT-03b-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 48 (type FNDP) for DLCround-PT-03b-ReachabilityCardinality-2024-02
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 49 (type EQUN) for DLCround-PT-03b-ReachabilityCardinality-2024-02 (obsolete)
lola: CANCELED task # 51 (type SRCH) for DLCround-PT-03b-ReachabilityCardinality-2024-02 (obsolete)
lola: CANCELED task # 52 (type EXCL) for DLCround-PT-03b-ReachabilityCardinality-2024-02 (obsolete)
lola: Created skeleton in 0.000000 secs.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-49.sara.
lola: Created skeleton in 0.000000 secs.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 49 (type EQUN) for DLCround-PT-03b-ReachabilityCardinality-2024-02
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 68 (type EXCL) for 30 DLCround-PT-03b-ReachabilityCardinality-2024-10
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 64 (type FNDP) for 30 DLCround-PT-03b-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 65 (type EQUN) for 30 DLCround-PT-03b-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type SRCH) for 30 DLCround-PT-03b-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 64 (type FNDP) for DLCround-PT-03b-ReachabilityCardinality-2024-10
lola: result : true
lola: fired transitions : 6
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 65 (type EQUN) for DLCround-PT-03b-ReachabilityCardinality-2024-10 (obsolete)
lola: CANCELED task # 67 (type SRCH) for DLCround-PT-03b-ReachabilityCardinality-2024-10 (obsolete)
lola: CANCELED task # 68 (type EXCL) for DLCround-PT-03b-ReachabilityCardinality-2024-10 (obsolete)
lola: LAUNCH task # 103 (type EXCL) for 39 DLCround-PT-03b-ReachabilityCardinality-2024-13
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 54 (type FNDP) for 3 DLCround-PT-03b-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 55 (type EQUN) for 3 DLCround-PT-03b-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 70 (type SRCH) for 3 DLCround-PT-03b-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 67 (type SRCH) for DLCround-PT-03b-ReachabilityCardinality-2024-10
lola: result : true
lola: markings : 8
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 70 (type SRCH) for DLCround-PT-03b-ReachabilityCardinality-2024-01
lola: result : true
lola: markings : 25
lola: fired transitions : 26
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 54 (type FNDP) for DLCround-PT-03b-ReachabilityCardinality-2024-01 (obsolete)
lola: CANCELED task # 55 (type EQUN) for DLCround-PT-03b-ReachabilityCardinality-2024-01 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 105 (type FNDP) for 21 DLCround-PT-03b-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 109 (type EQUN) for 21 DLCround-PT-03b-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 111 (type SRCH) for 21 DLCround-PT-03b-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-65.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 54 (type FNDP) for DLCround-PT-03b-ReachabilityCardinality-2024-01
lola: result : true
lola: fired transitions : 29
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 103 (type EXCL) for DLCround-PT-03b-ReachabilityCardinality-2024-13
lola: result : true
lola: markings : 186
lola: fired transitions : 248
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 143 (type EXCL) for 18 DLCround-PT-03b-ReachabilityCardinality-2024-06
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
sara: place or transition ordering is non-deterministic
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-109.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 65 (type EQUN) for DLCround-PT-03b-ReachabilityCardinality-2024-10
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-03b-ReachabilityCardinality-2024-01: EF true tandem / insertion
DLCround-PT-03b-ReachabilityCardinality-2024-02: EF true findpath
DLCround-PT-03b-ReachabilityCardinality-2024-10: AG false findpath
DLCround-PT-03b-ReachabilityCardinality-2024-13: EF true tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-03b-ReachabilityCardinality-2024-00: EF 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-03: EF 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-04: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-05: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-06: EF 0 4 1 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-07: EF 0 2 3 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-08: EF 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-11: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-12: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-14: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-15: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
105 EF FNDP 4/221 0/5 DLCround-PT-03b-ReachabilityCardinality-2024-07 342647 t fired, 2951 attempts, .
109 EF STEQ 4/221 0/5 DLCround-PT-03b-ReachabilityCardinality-2024-07 sara is running.
111 EF SRCH 4/221 1/5 DLCround-PT-03b-ReachabilityCardinality-2024-07 137179 m, 27435 m/sec, 172275 t fired, .
143 EF EXCL 4/299 1/32 DLCround-PT-03b-ReachabilityCardinality-2024-06 31030 m, 6206 m/sec, 49324 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-03b-ReachabilityCardinality-2024-01: EF true tandem / insertion
DLCround-PT-03b-ReachabilityCardinality-2024-02: EF true findpath
DLCround-PT-03b-ReachabilityCardinality-2024-10: AG false findpath
DLCround-PT-03b-ReachabilityCardinality-2024-13: EF true tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-03b-ReachabilityCardinality-2024-00: EF 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-03: EF 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-04: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-05: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-06: EF 0 4 1 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-07: EF 0 2 3 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-08: EF 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-11: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-12: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-14: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-15: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
105 EF FNDP 9/220 0/5 DLCround-PT-03b-ReachabilityCardinality-2024-07 804030 t fired, 6125 attempts, .
109 EF STEQ 9/220 0/5 DLCround-PT-03b-ReachabilityCardinality-2024-07 sara is running.
111 EF SRCH 9/220 2/5 DLCround-PT-03b-ReachabilityCardinality-2024-07 341722 m, 40908 m/sec, 429715 t fired, .
143 EF EXCL 9/299 1/32 DLCround-PT-03b-ReachabilityCardinality-2024-06 80783 m, 9950 m/sec, 128697 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-03b-ReachabilityCardinality-2024-01: EF true tandem / insertion
DLCround-PT-03b-ReachabilityCardinality-2024-02: EF true findpath
DLCround-PT-03b-ReachabilityCardinality-2024-10: AG false findpath
DLCround-PT-03b-ReachabilityCardinality-2024-13: EF true tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-03b-ReachabilityCardinality-2024-00: EF 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-03: EF 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-04: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-05: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-06: EF 0 4 1 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-07: EF 0 2 3 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-08: EF 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-11: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-12: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-14: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-15: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
105 EF FNDP 14/215 0/5 DLCround-PT-03b-ReachabilityCardinality-2024-07 1211413 t fired, 8271 attempts, .
109 EF STEQ 14/215 0/5 DLCround-PT-03b-ReachabilityCardinality-2024-07 sara is running.
111 EF SRCH 14/215 3/5 DLCround-PT-03b-ReachabilityCardinality-2024-07 549925 m, 41640 m/sec, 691652 t fired, .
143 EF EXCL 14/299 1/32 DLCround-PT-03b-ReachabilityCardinality-2024-06 133448 m, 10533 m/sec, 212860 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-03b-ReachabilityCardinality-2024-01: EF true tandem / insertion
DLCround-PT-03b-ReachabilityCardinality-2024-02: EF true findpath
DLCround-PT-03b-ReachabilityCardinality-2024-10: AG false findpath
DLCround-PT-03b-ReachabilityCardinality-2024-13: EF true tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-03b-ReachabilityCardinality-2024-00: EF 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-03: EF 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-04: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-05: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-06: EF 0 4 1 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-07: EF 0 2 3 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-08: EF 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-11: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-12: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-14: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-15: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
105 EF FNDP 19/210 0/5 DLCround-PT-03b-ReachabilityCardinality-2024-07 1590409 t fired, 10014 attempts, .
109 EF STEQ 19/210 0/5 DLCround-PT-03b-ReachabilityCardinality-2024-07 sara is running.
111 EF SRCH 19/210 4/5 DLCround-PT-03b-ReachabilityCardinality-2024-07 768993 m, 43813 m/sec, 966850 t fired, .
143 EF EXCL 19/299 1/32 DLCround-PT-03b-ReachabilityCardinality-2024-06 182254 m, 9761 m/sec, 289997 t fired, .

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sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-55.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-03b-ReachabilityCardinality-2024-01: EF true tandem / insertion
DLCround-PT-03b-ReachabilityCardinality-2024-02: EF true findpath
DLCround-PT-03b-ReachabilityCardinality-2024-10: AG false findpath
DLCround-PT-03b-ReachabilityCardinality-2024-13: EF true tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-03b-ReachabilityCardinality-2024-00: EF 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-03: EF 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-04: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-05: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-06: EF 0 4 1 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-07: EF 0 2 3 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-08: EF 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-11: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-12: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-14: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-15: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
105 EF FNDP 24/205 0/5 DLCround-PT-03b-ReachabilityCardinality-2024-07 1966127 t fired, 11630 attempts, .
109 EF STEQ 24/205 0/5 DLCround-PT-03b-ReachabilityCardinality-2024-07 sara is running.
111 EF SRCH 24/205 4/5 DLCround-PT-03b-ReachabilityCardinality-2024-07 979738 m, 42149 m/sec, 1231580 t fired, .
143 EF EXCL 24/299 1/32 DLCround-PT-03b-ReachabilityCardinality-2024-06 230815 m, 9712 m/sec, 367409 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-03b-ReachabilityCardinality-2024-01: EF true tandem / insertion
DLCround-PT-03b-ReachabilityCardinality-2024-02: EF true findpath
DLCround-PT-03b-ReachabilityCardinality-2024-10: AG false findpath
DLCround-PT-03b-ReachabilityCardinality-2024-13: EF true tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-03b-ReachabilityCardinality-2024-00: EF 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-03: EF 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-04: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-05: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-06: EF 0 4 1 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-07: EF 0 2 3 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-08: EF 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-11: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-12: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-14: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-15: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
105 EF FNDP 29/200 0/5 DLCround-PT-03b-ReachabilityCardinality-2024-07 2273949 t fired, 12978 attempts, .
109 EF STEQ 29/200 0/5 DLCround-PT-03b-ReachabilityCardinality-2024-07 sara is running.
111 EF SRCH 29/200 5/5 DLCround-PT-03b-ReachabilityCardinality-2024-07 1196783 m, 43409 m/sec, 1505086 t fired, .
143 EF EXCL 29/299 2/32 DLCround-PT-03b-ReachabilityCardinality-2024-06 280209 m, 9878 m/sec, 446698 t fired, .

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lola: CANCELED task # 111 (type SRCH) for DLCround-PT-03b-ReachabilityCardinality-2024-07 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-03b-ReachabilityCardinality-2024-01: EF true tandem / insertion
DLCround-PT-03b-ReachabilityCardinality-2024-02: EF true findpath
DLCround-PT-03b-ReachabilityCardinality-2024-10: AG false findpath
DLCround-PT-03b-ReachabilityCardinality-2024-13: EF true tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-03b-ReachabilityCardinality-2024-00: EF 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-03: EF 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-04: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-05: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-06: EF 0 4 1 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-07: EF 0 2 2 0 1 0 1 0
DLCround-PT-03b-ReachabilityCardinality-2024-08: EF 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-11: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-12: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-14: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-15: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
105 EF FNDP 34/195 0/5 DLCround-PT-03b-ReachabilityCardinality-2024-07 2625255 t fired, 14625 attempts, .
109 EF STEQ 34/195 0/5 DLCround-PT-03b-ReachabilityCardinality-2024-07 sara is running.
143 EF EXCL 34/299 2/32 DLCround-PT-03b-ReachabilityCardinality-2024-06 335390 m, 11036 m/sec, 535512 t fired, .

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lola: LAUNCH task # 72 (type FNDP) for 0 DLCround-PT-03b-ReachabilityCardinality-2024-00
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lola: FINISHED task # 72 (type FNDP) for DLCround-PT-03b-ReachabilityCardinality-2024-00
lola: result : true
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lola: tried executions : 1
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lola: LAUNCH task # 85 (type FNDP) for 42 DLCround-PT-03b-ReachabilityCardinality-2024-14
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-03b-ReachabilityCardinality-2024-00: EF true findpath
DLCround-PT-03b-ReachabilityCardinality-2024-01: EF true tandem / insertion
DLCround-PT-03b-ReachabilityCardinality-2024-02: EF true findpath
DLCround-PT-03b-ReachabilityCardinality-2024-10: AG false findpath
DLCround-PT-03b-ReachabilityCardinality-2024-13: EF true tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-03b-ReachabilityCardinality-2024-03: EF 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-04: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-05: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-06: EF 0 4 1 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-07: EF 0 2 2 0 1 0 1 0
DLCround-PT-03b-ReachabilityCardinality-2024-08: EF 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-09: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-11: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-12: AG 0 5 0 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-14: AG 0 4 1 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-15: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
85 EF FNDP 5/237 0/5 DLCround-PT-03b-ReachabilityCardinality-2024-14 599328 t fired, 1 attempts, .
105 EF FNDP 39/222 0/5 DLCround-PT-03b-ReachabilityCardinality-2024-07 2935214 t fired, 16461 attempts, .
109 EF STEQ 39/222 0/5 DLCround-PT-03b-ReachabilityCardinality-2024-07 sara is running.
143 EF EXCL 39/326 2/32 DLCround-PT-03b-ReachabilityCardinality-2024-06 384247 m, 9771 m/sec, 613405 t fired, .

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lola: FINISHED task # 109 (type EQUN) for DLCround-PT-03b-ReachabilityCardinality-2024-07
lola: result : false
lola: CANCELED task # 105 (type FNDP) for DLCround-PT-03b-ReachabilityCardinality-2024-07 (obsolete)
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lola: fired transitions : 3019943
lola: tried executions : 16973
lola: time used : 41.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-131.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 131 (type EQUN) for DLCround-PT-03b-ReachabilityCardinality-2024-09
lola: result : false
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 128 (type FNDP) for DLCround-PT-03b-ReachabilityCardinality-2024-09
lola: result : unknown
lola: fired transitions : 170781
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lola: memory pages used : 0
lola: FINISHED task # 82 (type FNDP) for DLCround-PT-03b-ReachabilityCardinality-2024-05
lola: result : true
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lola: LAUNCH task # 59 (type EQUN) for 36 DLCround-PT-03b-ReachabilityCardinality-2024-12
lola: time limit : 32000000 sec
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 58 (type FNDP) for DLCround-PT-03b-ReachabilityCardinality-2024-12
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lola: CANCELED task # 59 (type EQUN) for DLCround-PT-03b-ReachabilityCardinality-2024-12 (obsolete)
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lola: FINISHED task # 106 (type FNDP) for DLCround-PT-03b-ReachabilityCardinality-2024-15
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 118 (type EQUN) for DLCround-PT-03b-ReachabilityCardinality-2024-15 (obsolete)
lola: LAUNCH task # 77 (type FNDP) for 9 DLCround-PT-03b-ReachabilityCardinality-2024-03
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lola: LAUNCH task # 107 (type EQUN) for 9 DLCround-PT-03b-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-59.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-94.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-107.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-118.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic


lola: FINISHED task # 107 (type EQUN) for DLCround-PT-03b-ReachabilityCardinality-2024-03
lola: result : false
lola: CANCELED task # 77 (type FNDP) for DLCround-PT-03b-ReachabilityCardinality-2024-03 (obsolete)
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lola: LAUNCH task # 78 (type EQUN) for 12 DLCround-PT-03b-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 77 (type FNDP) for DLCround-PT-03b-ReachabilityCardinality-2024-03
lola: result : unknown
lola: fired transitions : 25899
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 118 (type EQUN) for DLCround-PT-03b-ReachabilityCardinality-2024-15
lola: result : true
lola: FINISHED task # 62 (type FNDP) for DLCround-PT-03b-ReachabilityCardinality-2024-04
lola: result : true
lola: fired transitions : 5
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 78 (type EQUN) for DLCround-PT-03b-ReachabilityCardinality-2024-04 (obsolete)
lola: LAUNCH task # 90 (type FNDP) for 24 DLCround-PT-03b-ReachabilityCardinality-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 116 (type EQUN) for 24 DLCround-PT-03b-ReachabilityCardinality-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 90 (type FNDP) for DLCround-PT-03b-ReachabilityCardinality-2024-08
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 116 (type EQUN) for DLCround-PT-03b-ReachabilityCardinality-2024-08 (obsolete)
lola: LAUNCH task # 130 (type FNDP) for 33 DLCround-PT-03b-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 135 (type EQUN) for 33 DLCround-PT-03b-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-78.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-116.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-135.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 116 (type EQUN) for DLCround-PT-03b-ReachabilityCardinality-2024-08
lola: result : true
sara: place or transition ordering is non-deterministic


lola: FINISHED task # 78 (type EQUN) for DLCround-PT-03b-ReachabilityCardinality-2024-04
lola: result : true
lola: FINISHED task # 135 (type EQUN) for DLCround-PT-03b-ReachabilityCardinality-2024-11
lola: result : false
lola: CANCELED task # 130 (type FNDP) for DLCround-PT-03b-ReachabilityCardinality-2024-11 (obsolete)
lola: LAUNCH task # 86 (type EQUN) for 42 DLCround-PT-03b-ReachabilityCardinality-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 88 (type SRCH) for 42 DLCround-PT-03b-ReachabilityCardinality-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 130 (type FNDP) for DLCround-PT-03b-ReachabilityCardinality-2024-11
lola: result : unknown
lola: fired transitions : 62215
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-86.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 59 (type EQUN) for DLCround-PT-03b-ReachabilityCardinality-2024-12
lola: result : true

lola: FINISHED task # 94 (type EQUN) for DLCround-PT-03b-ReachabilityCardinality-2024-05
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-03b-ReachabilityCardinality-2024-00: EF true findpath
DLCround-PT-03b-ReachabilityCardinality-2024-01: EF true tandem / insertion
DLCround-PT-03b-ReachabilityCardinality-2024-02: EF true findpath
DLCround-PT-03b-ReachabilityCardinality-2024-03: EF false state equation
DLCround-PT-03b-ReachabilityCardinality-2024-04: AG false findpath
DLCround-PT-03b-ReachabilityCardinality-2024-05: AG false findpath
DLCround-PT-03b-ReachabilityCardinality-2024-07: EF false state equation
DLCround-PT-03b-ReachabilityCardinality-2024-08: EF true findpath
DLCround-PT-03b-ReachabilityCardinality-2024-09: AG true state equation
DLCround-PT-03b-ReachabilityCardinality-2024-10: AG false findpath
DLCround-PT-03b-ReachabilityCardinality-2024-11: AG true state equation
DLCround-PT-03b-ReachabilityCardinality-2024-12: AG false findpath
DLCround-PT-03b-ReachabilityCardinality-2024-13: EF true tandem / relaxed
DLCround-PT-03b-ReachabilityCardinality-2024-15: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-03b-ReachabilityCardinality-2024-06: EF 0 4 1 0 1 0 0 0
DLCround-PT-03b-ReachabilityCardinality-2024-14: AG 0 2 3 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
85 EF FNDP 10/1768 0/5 DLCround-PT-03b-ReachabilityCardinality-2024-14 1046144 t fired, 2 attempts, .
86 EF STEQ 1/1181 0/5 DLCround-PT-03b-ReachabilityCardinality-2024-14 sara is running.
88 EF SRCH 1/1181 1/5 DLCround-PT-03b-ReachabilityCardinality-2024-14 86624 m, 17324 m/sec, 104543 t fired, .
143 EF EXCL 44/1795 2/32 DLCround-PT-03b-ReachabilityCardinality-2024-06 425837 m, 8318 m/sec, 679993 t fired, .

Time elapsed: 53 secs. Pages in use: 7
# running tasks: 4 of 4 Visible: 16

lola: FINISHED task # 86 (type EQUN) for DLCround-PT-03b-ReachabilityCardinality-2024-14
lola: result : false
lola: CANCELED task # 85 (type FNDP) for DLCround-PT-03b-ReachabilityCardinality-2024-14 (obsolete)
lola: CANCELED task # 88 (type SRCH) for DLCround-PT-03b-ReachabilityCardinality-2024-14 (obsolete)
lola: LAUNCH task # 139 (type FNDP) for 18 DLCround-PT-03b-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 140 (type EQUN) for 18 DLCround-PT-03b-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 142 (type SRCH) for 18 DLCround-PT-03b-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 85 (type FNDP) for DLCround-PT-03b-ReachabilityCardinality-2024-14
lola: result : unknown
lola: fired transitions : 1433895
lola: tried executions : 3
lola: time used : 15.000000
lola: memory pages used : 0
lola: FINISHED task # 139 (type FNDP) for DLCround-PT-03b-ReachabilityCardinality-2024-06
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 140 (type EQUN) for DLCround-PT-03b-ReachabilityCardinality-2024-06 (obsolete)
lola: CANCELED task # 142 (type SRCH) for DLCround-PT-03b-ReachabilityCardinality-2024-06 (obsolete)
lola: CANCELED task # 143 (type EXCL) for DLCround-PT-03b-ReachabilityCardinality-2024-06 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-03b-ReachabilityCardinality-2024-00: EF true findpath
DLCround-PT-03b-ReachabilityCardinality-2024-01: EF true tandem / insertion
DLCround-PT-03b-ReachabilityCardinality-2024-02: EF true findpath
DLCround-PT-03b-ReachabilityCardinality-2024-03: EF false state equation
DLCround-PT-03b-ReachabilityCardinality-2024-04: AG false findpath
DLCround-PT-03b-ReachabilityCardinality-2024-05: AG false findpath
DLCround-PT-03b-ReachabilityCardinality-2024-06: EF true findpath
DLCround-PT-03b-ReachabilityCardinality-2024-07: EF false state equation
DLCround-PT-03b-ReachabilityCardinality-2024-08: EF true findpath
DLCround-PT-03b-ReachabilityCardinality-2024-09: AG true state equation
DLCround-PT-03b-ReachabilityCardinality-2024-10: AG false findpath
DLCround-PT-03b-ReachabilityCardinality-2024-11: AG true state equation
DLCround-PT-03b-ReachabilityCardinality-2024-12: AG false findpath
DLCround-PT-03b-ReachabilityCardinality-2024-13: EF true tandem / relaxed
DLCround-PT-03b-ReachabilityCardinality-2024-14: AG true state equation
DLCround-PT-03b-ReachabilityCardinality-2024-15: AG false findpath


Time elapsed: 58 secs. Pages in use: 7

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-03b"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="gold2023"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool gold2023"
echo " Input is DLCround-PT-03b, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r131-smll-171624288300079"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-03b.tgz
mv DLCround-PT-03b execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;