About the Execution of 2023-gold for DLCflexbar-PT-8a
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 3957.207 | 574906.00 | 755153.00 | 2147.90 | TFTFTTFTFTFFFFFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r131-smll-171624288300064.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool gold2023
Input is DLCflexbar-PT-8a, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r131-smll-171624288300064
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 9.2M
-rw-r--r-- 1 mcc users 7.9K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 86K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 48K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Apr 22 14:37 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Apr 22 14:37 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Apr 22 14:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Apr 22 14:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Apr 14 12:51 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 157K Apr 14 12:51 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Apr 14 01:51 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 91K Apr 14 01:51 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:37 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 22 14:37 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 8.7M May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-2024-00
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-2024-01
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-2024-02
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-2024-03
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-2024-04
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-2024-05
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-2024-06
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-2024-07
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-2024-08
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-2024-09
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-2024-10
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-2024-11
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-2024-12
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-2024-13
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-2024-14
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-2024-15
=== Now, execution of the tool begins
BK_START 1716381592001
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=gold2023
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCflexbar-PT-8a
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2024-05-22 12:39:55] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2024-05-22 12:39:55] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-22 12:39:56] [INFO ] Load time of PNML (sax parser for PT used): 1536 ms
[2024-05-22 12:39:56] [INFO ] Transformed 3971 places.
[2024-05-22 12:39:57] [INFO ] Transformed 32571 transitions.
[2024-05-22 12:39:57] [INFO ] Found NUPN structural information;
[2024-05-22 12:39:57] [INFO ] Parsed PT model containing 3971 places and 32571 transitions and 129321 arcs in 1850 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 56 ms.
Working with output stream class java.io.PrintStream
Ensure Unique test removed 3480 transitions
Reduce redundant transitions removed 3480 transitions.
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 1828 ms. (steps per millisecond=5 ) properties (out of 14) seen :4
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-13 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-10 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-02 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-01 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 627 ms. (steps per millisecond=15 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 835 ms. (steps per millisecond=11 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 614 ms. (steps per millisecond=16 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 629 ms. (steps per millisecond=15 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 584 ms. (steps per millisecond=17 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 615 ms. (steps per millisecond=16 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 827 ms. (steps per millisecond=12 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 901 ms. (steps per millisecond=11 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 581 ms. (steps per millisecond=17 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 615 ms. (steps per millisecond=16 ) properties (out of 10) seen :0
Running SMT prover for 10 properties.
[2024-05-22 12:40:06] [INFO ] Flow matrix only has 1562 transitions (discarded 27529 similar events)
// Phase 1: matrix 1562 rows 3971 cols
[2024-05-22 12:40:06] [INFO ] Computed 3040 invariants in 49 ms
[2024-05-22 12:40:09] [INFO ] After 2418ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:10
[2024-05-22 12:40:13] [INFO ] [Nat]Absence check using 3040 positive place invariants in 2353 ms returned sat
[2024-05-22 12:40:17] [INFO ] After 3236ms SMT Verify possible using state equation in natural domain returned unsat :9 sat :1
[2024-05-22 12:40:17] [INFO ] State equation strengthened by 341 read => feed constraints.
[2024-05-22 12:40:18] [INFO ] After 583ms SMT Verify possible using 341 Read/Feed constraints in natural domain returned unsat :9 sat :1
[2024-05-22 12:40:19] [INFO ] After 1414ms SMT Verify possible using trap constraints in natural domain returned unsat :9 sat :1
Attempting to minimize the solution found.
Minimization took 411 ms.
[2024-05-22 12:40:19] [INFO ] After 10021ms SMT Verify possible using all constraints in natural domain returned unsat :9 sat :1
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-12 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-11 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-09 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-08 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-07 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-06 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-04 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-03 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-00 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 10 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 320 ms.
Support contains 14 out of 3971 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3971/3971 places, 29091/29091 transitions.
Graph (trivial) has 1391 edges and 3971 vertex of which 314 / 3971 are part of one of the 147 SCC in 34 ms
Free SCC test removed 167 places
Drop transitions removed 17934 transitions
Reduce isomorphic transitions removed 17934 transitions.
Graph (complete) has 14526 edges and 3804 vertex of which 108 are kept as prefixes of interest. Removing 3696 places using SCC suffix rule.44 ms
Discarding 3696 places :
Also discarding 10726 output transitions
Drop transitions removed 10726 transitions
Drop transitions removed 268 transitions
Reduce isomorphic transitions removed 268 transitions.
Drop transitions removed 9 transitions
Trivial Post-agglo rules discarded 9 transitions
Performed 9 trivial Post agglomeration. Transition count delta: 9
Iterating post reduction 0 with 277 rules applied. Total rules applied 279 place count 108 transition count 154
Reduce places removed 9 places and 0 transitions.
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 14 rules applied. Total rules applied 293 place count 99 transition count 149
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 294 place count 98 transition count 149
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 2 Pre rules applied. Total rules applied 294 place count 98 transition count 147
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 298 place count 96 transition count 147
Discarding 61 places :
Symmetric choice reduction at 3 with 61 rule applications. Total rules 359 place count 35 transition count 32
Iterating global reduction 3 with 61 rules applied. Total rules applied 420 place count 35 transition count 32
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 3 with 3 rules applied. Total rules applied 423 place count 35 transition count 29
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 4 with 12 rules applied. Total rules applied 435 place count 29 transition count 23
Drop transitions removed 4 transitions
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 6 transitions.
Graph (complete) has 39 edges and 29 vertex of which 28 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.1 ms
Discarding 1 places :
Also discarding 0 output transitions
Iterating post reduction 4 with 7 rules applied. Total rules applied 442 place count 28 transition count 17
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 5 with 2 rules applied. Total rules applied 444 place count 28 transition count 15
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 5 with 2 rules applied. Total rules applied 446 place count 26 transition count 15
Applied a total of 446 rules in 403 ms. Remains 26 /3971 variables (removed 3945) and now considering 15/29091 (removed 29076) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 404 ms. Remains : 26/3971 places, 15/29091 transitions.
Finished random walk after 54 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=27 )
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-14 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 25155 ms.
starting LoLA
BK_INPUT DLCflexbar-PT-8a
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-2024-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1716382166907
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 50 (type SKEL/FNDP) for 12 DLCflexbar-PT-8a-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type SKEL/EQUN) for 12 DLCflexbar-PT-8a-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 53 (type SKEL/SRCH) for 12 DLCflexbar-PT-8a-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type SKEL/SRCH) for 12 DLCflexbar-PT-8a-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 53 (type SKEL/SRCH) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-04
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
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sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-51.sara.
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
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lola: rewrite Frontend/Parser/formula_rewrite.k:787
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 69 (type SKEL/SRCH) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-10
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lola: CANCELED task # 70 (type SRCH) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-10 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-59.sara.
sara: place or transition ordering is non-deterministic
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 74 (type SKEL/FNDP) for 15 DLCflexbar-PT-8a-ReachabilityCardinality-2024-05
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lola: FINISHED task # 59 (type SKEL/EQUN) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-01
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-67.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 67 (type SKEL/EQUN) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-10
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lola: CANCELED task # 78 (type SRCH) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-05 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-75.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
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lola: time limit : 32000000 sec
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
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lola: CANCELED task # 85 (type SRCH) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-03 (obsolete)
lola: FINISHED task # 81 (type SKEL/FNDP) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-03
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sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-82.sara.
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 89 (type SKEL/FNDP) for 45 DLCflexbar-PT-8a-ReachabilityCardinality-2024-15
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lola: LAUNCH task # 92 (type SKEL/SRCH) for 45 DLCflexbar-PT-8a-ReachabilityCardinality-2024-15
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lola: LAUNCH task # 93 (type SKEL/SRCH) for 45 DLCflexbar-PT-8a-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 92 (type SKEL/SRCH) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-15
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lola: CANCELED task # 89 (type FNDP) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-15 (obsolete)
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lola: CANCELED task # 93 (type SRCH) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-15 (obsolete)
lola: FINISHED task # 89 (type SKEL/FNDP) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-15
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sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-90.sara.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 97 (type SKEL/FNDP) for 27 DLCflexbar-PT-8a-ReachabilityCardinality-2024-09
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lola: LAUNCH task # 101 (type SKEL/SRCH) for 27 DLCflexbar-PT-8a-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 90 (type SKEL/EQUN) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-15
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lola: FINISHED task # 100 (type SKEL/SRCH) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-09
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lola: rewrite Frontend/Parser/formula_rewrite.k:787
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
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sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-98.sara.
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sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-106.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
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sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-121.sara.
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 131 (type EXCL) for 30 DLCflexbar-PT-8a-ReachabilityCardinality-2024-10
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lola: LAUNCH task # 130 (type SRCH) for 30 DLCflexbar-PT-8a-ReachabilityCardinality-2024-10
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 130 (type SRCH) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-10
lola: result : true
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lola: CANCELED task # 131 (type EXCL) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-10 (obsolete)
lola: FINISHED task # 127 (type FNDP) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-10
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sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-128.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 128 (type EQUN) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-10
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
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lola: FINISHED task # 134 (type FNDP) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-01
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 106 (type SKEL/EQUN) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-14
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-135.sara.
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
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lola: memory limit: 5 pages
lola: LAUNCH task # 144 (type SRCH) for 39 DLCflexbar-PT-8a-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 141 (type FNDP) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-13
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 142 (type EQUN) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-13 (obsolete)
lola: CANCELED task # 144 (type SRCH) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-13 (obsolete)
lola: CANCELED task # 145 (type EXCL) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-13 (obsolete)
lola: FINISHED task # 144 (type SRCH) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-13
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-142.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 142 (type EQUN) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-13
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCflexbar-PT-8a-ReachabilityCardinality-2024-00: INITIAL true preprocessing
DLCflexbar-PT-8a-ReachabilityCardinality-2024-01: AG false findpath
DLCflexbar-PT-8a-ReachabilityCardinality-2024-03: EF false skeleton: tandem / insertion
DLCflexbar-PT-8a-ReachabilityCardinality-2024-04: AG true skeleton: tandem / insertion
DLCflexbar-PT-8a-ReachabilityCardinality-2024-05: AG true skeleton: tandem / insertion
DLCflexbar-PT-8a-ReachabilityCardinality-2024-06: INITIAL false preprocessing
DLCflexbar-PT-8a-ReachabilityCardinality-2024-07: INITIAL true preprocessing
DLCflexbar-PT-8a-ReachabilityCardinality-2024-08: INITIAL false preprocessing
DLCflexbar-PT-8a-ReachabilityCardinality-2024-09: AG true skeleton: tandem / insertion
DLCflexbar-PT-8a-ReachabilityCardinality-2024-10: AG false tandem / insertion
DLCflexbar-PT-8a-ReachabilityCardinality-2024-11: EF false skeleton: tandem / insertion
DLCflexbar-PT-8a-ReachabilityCardinality-2024-12: INITIAL false preprocessing
DLCflexbar-PT-8a-ReachabilityCardinality-2024-13: AG false findpath
DLCflexbar-PT-8a-ReachabilityCardinality-2024-15: AG true skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCflexbar-PT-8a-ReachabilityCardinality-2024-02: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-8a-ReachabilityCardinality-2024-14: AG 0 0 0 0 3 0 0 2
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 544 secs. Pages in use: 3
# running tasks: 0 of 4 Visible: 16
lola: planning for DLCflexbar-PT-8a-ReachabilityCardinality-2024-15 stopped (result already fixed).
lola: planning for DLCflexbar-PT-8a-ReachabilityCardinality-2024-11 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 152 (type EXCL) for 42 DLCflexbar-PT-8a-ReachabilityCardinality-2024-14
lola: time limit : 1528 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 148 (type FNDP) for 42 DLCflexbar-PT-8a-ReachabilityCardinality-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 149 (type EQUN) for 42 DLCflexbar-PT-8a-ReachabilityCardinality-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 151 (type SRCH) for 42 DLCflexbar-PT-8a-ReachabilityCardinality-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 152 (type EXCL) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-14
lola: result : true
lola: markings : 6
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 148 (type FNDP) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-14 (obsolete)
lola: CANCELED task # 149 (type EQUN) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-14 (obsolete)
lola: CANCELED task # 151 (type SRCH) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-14 (obsolete)
lola: FINISHED task # 148 (type FNDP) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-14
lola: result : true
lola: fired transitions : 4
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-149.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 149 (type EQUN) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-14
lola: result : true
lola: planning for DLCflexbar-PT-8a-ReachabilityCardinality-2024-09 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 158 (type EXCL) for 6 DLCflexbar-PT-8a-ReachabilityCardinality-2024-02
lola: time limit : 3055 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 154 (type FNDP) for 6 DLCflexbar-PT-8a-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 155 (type EQUN) for 6 DLCflexbar-PT-8a-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 157 (type SRCH) for 6 DLCflexbar-PT-8a-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 154 (type FNDP) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-02
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 155 (type EQUN) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-02 (obsolete)
lola: CANCELED task # 157 (type SRCH) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-02 (obsolete)
lola: CANCELED task # 158 (type EXCL) for DLCflexbar-PT-8a-ReachabilityCardinality-2024-02 (obsolete)
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCflexbar-PT-8a-ReachabilityCardinality-2024-00: INITIAL true preprocessing
DLCflexbar-PT-8a-ReachabilityCardinality-2024-01: AG false findpath
DLCflexbar-PT-8a-ReachabilityCardinality-2024-02: EF true findpath
DLCflexbar-PT-8a-ReachabilityCardinality-2024-03: EF false skeleton: tandem / insertion
DLCflexbar-PT-8a-ReachabilityCardinality-2024-04: AG true skeleton: tandem / insertion
DLCflexbar-PT-8a-ReachabilityCardinality-2024-05: AG true skeleton: tandem / insertion
DLCflexbar-PT-8a-ReachabilityCardinality-2024-06: INITIAL false preprocessing
DLCflexbar-PT-8a-ReachabilityCardinality-2024-07: INITIAL true preprocessing
DLCflexbar-PT-8a-ReachabilityCardinality-2024-08: INITIAL false preprocessing
DLCflexbar-PT-8a-ReachabilityCardinality-2024-09: AG true skeleton: tandem / insertion
DLCflexbar-PT-8a-ReachabilityCardinality-2024-10: AG false tandem / insertion
DLCflexbar-PT-8a-ReachabilityCardinality-2024-11: EF false skeleton: tandem / insertion
DLCflexbar-PT-8a-ReachabilityCardinality-2024-12: INITIAL false preprocessing
DLCflexbar-PT-8a-ReachabilityCardinality-2024-13: AG false findpath
DLCflexbar-PT-8a-ReachabilityCardinality-2024-14: AG false tandem / relaxed
DLCflexbar-PT-8a-ReachabilityCardinality-2024-15: AG true skeleton: tandem / insertion
Time elapsed: 545 secs. Pages in use: 3
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCflexbar-PT-8a"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="gold2023"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool gold2023"
echo " Input is DLCflexbar-PT-8a, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r131-smll-171624288300064"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DLCflexbar-PT-8a.tgz
mv DLCflexbar-PT-8a execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;