Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r131-smll-171624288200034.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool gold2023
Input is DLCflexbar-PT-5a, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r131-smll-171624288200034
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 3.2M
-rw-r--r-- 1 mcc users 5.9K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 62K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Apr 22 14:37 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Apr 22 14:37 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Apr 22 14:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K Apr 22 14:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Apr 12 17:57 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 105K Apr 12 17:57 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Apr 12 16:42 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 94K Apr 12 16:42 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:37 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:37 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 2.8M May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCflexbar-PT-5a-ReachabilityCardinality-2024-00
FORMULA_NAME DLCflexbar-PT-5a-ReachabilityCardinality-2024-01
FORMULA_NAME DLCflexbar-PT-5a-ReachabilityCardinality-2024-02
FORMULA_NAME DLCflexbar-PT-5a-ReachabilityCardinality-2024-03
FORMULA_NAME DLCflexbar-PT-5a-ReachabilityCardinality-2024-04
FORMULA_NAME DLCflexbar-PT-5a-ReachabilityCardinality-2024-05
FORMULA_NAME DLCflexbar-PT-5a-ReachabilityCardinality-2024-06
FORMULA_NAME DLCflexbar-PT-5a-ReachabilityCardinality-2024-07
FORMULA_NAME DLCflexbar-PT-5a-ReachabilityCardinality-2024-08
FORMULA_NAME DLCflexbar-PT-5a-ReachabilityCardinality-2024-09
FORMULA_NAME DLCflexbar-PT-5a-ReachabilityCardinality-2024-10
FORMULA_NAME DLCflexbar-PT-5a-ReachabilityCardinality-2024-11
FORMULA_NAME DLCflexbar-PT-5a-ReachabilityCardinality-2024-12
FORMULA_NAME DLCflexbar-PT-5a-ReachabilityCardinality-2024-13
FORMULA_NAME DLCflexbar-PT-5a-ReachabilityCardinality-2024-14
FORMULA_NAME DLCflexbar-PT-5a-ReachabilityCardinality-2024-15

=== Now, execution of the tool begins

BK_START 1716364852345

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=gold2023
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCflexbar-PT-5a
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2024-05-22 08:00:55] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2024-05-22 08:00:55] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-22 08:00:56] [INFO ] Load time of PNML (sax parser for PT used): 781 ms
[2024-05-22 08:00:56] [INFO ] Transformed 1415 places.
[2024-05-22 08:00:56] [INFO ] Transformed 10593 transitions.
[2024-05-22 08:00:56] [INFO ] Found NUPN structural information;
[2024-05-22 08:00:56] [INFO ] Parsed PT model containing 1415 places and 10593 transitions and 41484 arcs in 1002 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 22 ms.
Working with output stream class java.io.PrintStream
Ensure Unique test removed 1179 transitions
Reduce redundant transitions removed 1179 transitions.
FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-06 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 891 ms. (steps per millisecond=11 ) properties (out of 13) seen :4
FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-15 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-11 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-05 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-01 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 195 ms. (steps per millisecond=51 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 278 ms. (steps per millisecond=35 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 279 ms. (steps per millisecond=35 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 230 ms. (steps per millisecond=43 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 192 ms. (steps per millisecond=52 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 199 ms. (steps per millisecond=50 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 213 ms. (steps per millisecond=46 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 190 ms. (steps per millisecond=52 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 179 ms. (steps per millisecond=55 ) properties (out of 9) seen :0
Running SMT prover for 9 properties.
[2024-05-22 08:01:00] [INFO ] Flow matrix only has 734 transitions (discarded 8680 similar events)
// Phase 1: matrix 734 rows 1415 cols
[2024-05-22 08:01:00] [INFO ] Computed 979 invariants in 25 ms
[2024-05-22 08:01:01] [INFO ] After 1298ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:9
[2024-05-22 08:01:03] [INFO ] [Nat]Absence check using 979 positive place invariants in 498 ms returned sat
[2024-05-22 08:01:03] [INFO ] After 1373ms SMT Verify possible using all constraints in natural domain returned unsat :9 sat :0
FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-14 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-13 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-12 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-09 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-08 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-07 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-04 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-02 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-00 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 9 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
All properties solved without resorting to model-checking.
Total runtime 7225 ms.
starting LoLA
BK_INPUT DLCflexbar-PT-5a
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-5a-ReachabilityCardinality-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1716364914304

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 49 (type SKEL/FNDP) for 18 DLCflexbar-PT-5a-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type SKEL/EQUN) for 18 DLCflexbar-PT-5a-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 52 (type SKEL/SRCH) for 18 DLCflexbar-PT-5a-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type SKEL/SRCH) for 18 DLCflexbar-PT-5a-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 52 (type SKEL/SRCH) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-06
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 49 (type FNDP) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-06 (obsolete)
lola: CANCELED task # 50 (type EQUN) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-06 (obsolete)
lola: CANCELED task # 53 (type SRCH) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-06 (obsolete)
lola: Created skeleton in 0.000000 secs.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-50.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Rule S: 0 transitions removed,0 places removed
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: place or transition ordering is non-deterministic
lola: LAUNCH task # 56 (type SKEL/FNDP) for 6 DLCflexbar-PT-5a-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type SKEL/EQUN) for 6 DLCflexbar-PT-5a-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SKEL/SRCH) for 6 DLCflexbar-PT-5a-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type SKEL/SRCH) for 6 DLCflexbar-PT-5a-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages

lola: FINISHED task # 59 (type SKEL/SRCH) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-02
lola: result : false
lola: markings : 7
lola: fired transitions : 26
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 56 (type FNDP) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-02 (obsolete)
lola: CANCELED task # 57 (type EQUN) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-02 (obsolete)
lola: CANCELED task # 60 (type SRCH) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-02 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 50 (type SKEL/EQUN) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-06
lola: result : false
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-57.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 57 (type SKEL/EQUN) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-02
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 64 (type SKEL/FNDP) for 9 DLCflexbar-PT-5a-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 65 (type SKEL/EQUN) for 9 DLCflexbar-PT-5a-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type SKEL/SRCH) for 9 DLCflexbar-PT-5a-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 68 (type SKEL/SRCH) for 9 DLCflexbar-PT-5a-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 67 (type SKEL/SRCH) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-03
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 64 (type FNDP) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-03 (obsolete)
lola: CANCELED task # 65 (type EQUN) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-03 (obsolete)
lola: CANCELED task # 68 (type SRCH) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-03 (obsolete)
lola: planning for DLCflexbar-PT-5a-ReachabilityCardinality-2024-02 stopped (result already fixed).
lola: planning for DLCflexbar-PT-5a-ReachabilityCardinality-2024-06 stopped (result already fixed).
lola: FINISHED task # 64 (type SKEL/FNDP) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-03
lola: result : unknown
lola: fired transitions : 843
lola: tried executions : 423
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-65.sara.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 72 (type SKEL/FNDP) for 33 DLCflexbar-PT-5a-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 73 (type SKEL/EQUN) for 33 DLCflexbar-PT-5a-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 75 (type SKEL/SRCH) for 33 DLCflexbar-PT-5a-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 76 (type SKEL/SRCH) for 33 DLCflexbar-PT-5a-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 76 (type SKEL/SRCH) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-11
lola: result : true
lola: markings : 27
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sara: place or transition ordering is non-deterministic

lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 65 (type SKEL/EQUN) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-03
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sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-73.sara.
sara: place or transition ordering is non-deterministic

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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
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lola: rewrite Frontend/Parser/formula_rewrite.k:787
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lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 84 (type SKEL/SRCH) for 30 DLCflexbar-PT-5a-ReachabilityCardinality-2024-10
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sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-81.sara.
sara: place or transition ordering is non-deterministic

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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
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lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
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lola: Created skeleton in 0.000000 secs.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-89.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-96.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 96 (type SKEL/EQUN) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-13
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 106 (type SKEL/SRCH) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-15
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lola: FINISHED task # 112 (type SRCH) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-11
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lola: FINISHED task # 113 (type EXCL) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-11
lola: result : true
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lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 109 (type FNDP) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-11
lola: result : true
lola: tried executions : 1
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lola: FINISHED task # 102 (type SKEL/FNDP) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-15
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sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-110.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 110 (type EQUN) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-11
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-103.sara.
lola: planning for DLCflexbar-PT-5a-ReachabilityCardinality-2024-10 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 116 (type SKEL/FNDP) for 15 DLCflexbar-PT-5a-ReachabilityCardinality-2024-05
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lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 120 (type SKEL/SRCH) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-05
lola: result : true
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lola: CANCELED task # 116 (type FNDP) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-05 (obsolete)
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lola: CANCELED task # 119 (type SRCH) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-05 (obsolete)

lola: FINISHED task # 116 (type SKEL/FNDP) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-05
lola: result : true
lola: fired transitions : 3
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lola: FINISHED task # 103 (type SKEL/EQUN) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-15
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-117.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCflexbar-PT-5a-ReachabilityCardinality-2024-00: INITIAL false preprocessing
DLCflexbar-PT-5a-ReachabilityCardinality-2024-02: EF false skeleton: tandem / insertion
DLCflexbar-PT-5a-ReachabilityCardinality-2024-03: AG true skeleton: tandem / insertion
DLCflexbar-PT-5a-ReachabilityCardinality-2024-04: AG true skeleton: tandem / relaxed
DLCflexbar-PT-5a-ReachabilityCardinality-2024-06: EF false skeleton: tandem / insertion
DLCflexbar-PT-5a-ReachabilityCardinality-2024-07: INITIAL true preprocessing
DLCflexbar-PT-5a-ReachabilityCardinality-2024-08: INITIAL true preprocessing
DLCflexbar-PT-5a-ReachabilityCardinality-2024-09: INITIAL false preprocessing
DLCflexbar-PT-5a-ReachabilityCardinality-2024-10: AG true skeleton: tandem / insertion
DLCflexbar-PT-5a-ReachabilityCardinality-2024-11: AG false tandem / insertion
DLCflexbar-PT-5a-ReachabilityCardinality-2024-13: EF false skeleton: tandem / insertion
DLCflexbar-PT-5a-ReachabilityCardinality-2024-14: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCflexbar-PT-5a-ReachabilityCardinality-2024-01: AG 0 0 0 0 1 0 0 0
DLCflexbar-PT-5a-ReachabilityCardinality-2024-05: EF 0 0 0 0 2 0 0 3
DLCflexbar-PT-5a-ReachabilityCardinality-2024-12: AG 0 0 0 0 1 0 0 0
DLCflexbar-PT-5a-ReachabilityCardinality-2024-15: EF 0 0 0 0 3 0 0 2

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: FINISHED task # 89 (type SKEL/EQUN) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-04
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
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lola: FINISHED task # 127 (type EXCL) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-12
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lola: CANCELED task # 126 (type SRCH) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-12 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-124.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
lola: planning for DLCflexbar-PT-5a-ReachabilityCardinality-2024-04 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
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lola: FINISHED task # 133 (type EXCL) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-05
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lola: FINISHED task # 129 (type FNDP) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-05
lola: result : true
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lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-130.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 130 (type EQUN) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-05
lola: result : true
lola: planning for DLCflexbar-PT-5a-ReachabilityCardinality-2024-03 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 139 (type EXCL) for 45 DLCflexbar-PT-5a-ReachabilityCardinality-2024-15
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lola: LAUNCH task # 138 (type SRCH) for 45 DLCflexbar-PT-5a-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 139 (type EXCL) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-15
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lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 135 (type FNDP) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-15 (obsolete)
lola: CANCELED task # 136 (type EQUN) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-15 (obsolete)
lola: CANCELED task # 138 (type SRCH) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-15 (obsolete)
lola: FINISHED task # 135 (type FNDP) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-15
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 138 (type SRCH) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-15
lola: result : true
lola: markings : 5
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-136.sara.
lola: planning for DLCflexbar-PT-5a-ReachabilityCardinality-2024-13 stopped (result already fixed).
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 136 (type EQUN) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-15
lola: result : true


lola: FINISHED task # 124 (type EQUN) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-12
lola: result : false
lola: FINISHED task # 117 (type SKEL/EQUN) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-05
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 146 (type EXCL) for 3 DLCflexbar-PT-5a-ReachabilityCardinality-2024-01
lola: time limit : 3550 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 142 (type FNDP) for 3 DLCflexbar-PT-5a-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 143 (type EQUN) for 3 DLCflexbar-PT-5a-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 145 (type SRCH) for 3 DLCflexbar-PT-5a-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 146 (type EXCL) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-01
lola: result : true
lola: markings : 22
lola: fired transitions : 25
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 145 (type SRCH) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-01
lola: result : true
lola: markings : 6
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 142 (type FNDP) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-01
lola: result : true
lola: fired transitions : 4
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 143 (type EQUN) for DLCflexbar-PT-5a-ReachabilityCardinality-2024-01 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCflexbar-PT-5a-ReachabilityCardinality-2024-00: INITIAL false preprocessing
DLCflexbar-PT-5a-ReachabilityCardinality-2024-01: AG false findpath
DLCflexbar-PT-5a-ReachabilityCardinality-2024-02: EF false skeleton: tandem / insertion
DLCflexbar-PT-5a-ReachabilityCardinality-2024-03: AG true skeleton: tandem / insertion
DLCflexbar-PT-5a-ReachabilityCardinality-2024-04: AG true skeleton: tandem / relaxed
DLCflexbar-PT-5a-ReachabilityCardinality-2024-05: EF true tandem / relaxed
DLCflexbar-PT-5a-ReachabilityCardinality-2024-06: EF false skeleton: tandem / insertion
DLCflexbar-PT-5a-ReachabilityCardinality-2024-07: INITIAL true preprocessing
DLCflexbar-PT-5a-ReachabilityCardinality-2024-08: INITIAL true preprocessing
DLCflexbar-PT-5a-ReachabilityCardinality-2024-09: INITIAL false preprocessing
DLCflexbar-PT-5a-ReachabilityCardinality-2024-10: AG true skeleton: tandem / insertion
DLCflexbar-PT-5a-ReachabilityCardinality-2024-11: AG false tandem / insertion
DLCflexbar-PT-5a-ReachabilityCardinality-2024-12: AG true tandem / relaxed
DLCflexbar-PT-5a-ReachabilityCardinality-2024-13: EF false skeleton: tandem / insertion
DLCflexbar-PT-5a-ReachabilityCardinality-2024-14: INITIAL false preprocessing
DLCflexbar-PT-5a-ReachabilityCardinality-2024-15: EF true tandem / relaxed


Time elapsed: 50 secs. Pages in use: 3

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCflexbar-PT-5a"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="gold2023"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool gold2023"
echo " Input is DLCflexbar-PT-5a, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r131-smll-171624288200034"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCflexbar-PT-5a.tgz
mv DLCflexbar-PT-5a execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;