About the Execution of LoLA for DLCshifumi-PT-6a
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16208.544 | 508561.00 | 574187.00 | 3091.40 | FFTFFT?T?TFF??F? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r115-smll-171624276900355.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is DLCshifumi-PT-6a, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r115-smll-171624276900355
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 7.3M
-rw-r--r-- 1 mcc users 6.9K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 74K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.6K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Apr 22 14:38 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K Apr 22 14:38 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Apr 22 14:38 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 22 14:38 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Apr 14 13:31 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 118K Apr 14 13:31 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.9K Apr 14 01:33 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 54K Apr 14 01:33 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:38 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 22 14:38 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 6.9M May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCshifumi-PT-6a-LTLCardinality-00
FORMULA_NAME DLCshifumi-PT-6a-LTLCardinality-01
FORMULA_NAME DLCshifumi-PT-6a-LTLCardinality-02
FORMULA_NAME DLCshifumi-PT-6a-LTLCardinality-03
FORMULA_NAME DLCshifumi-PT-6a-LTLCardinality-04
FORMULA_NAME DLCshifumi-PT-6a-LTLCardinality-05
FORMULA_NAME DLCshifumi-PT-6a-LTLCardinality-06
FORMULA_NAME DLCshifumi-PT-6a-LTLCardinality-07
FORMULA_NAME DLCshifumi-PT-6a-LTLCardinality-08
FORMULA_NAME DLCshifumi-PT-6a-LTLCardinality-09
FORMULA_NAME DLCshifumi-PT-6a-LTLCardinality-10
FORMULA_NAME DLCshifumi-PT-6a-LTLCardinality-11
FORMULA_NAME DLCshifumi-PT-6a-LTLCardinality-12
FORMULA_NAME DLCshifumi-PT-6a-LTLCardinality-13
FORMULA_NAME DLCshifumi-PT-6a-LTLCardinality-14
FORMULA_NAME DLCshifumi-PT-6a-LTLCardinality-15
=== Now, execution of the tool begins
BK_START 1717147865104
FORMULA DLCshifumi-PT-6a-LTLCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-6a-LTLCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-6a-LTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-6a-LTLCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-6a-LTLCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-6a-LTLCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-6a-LTLCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-6a-LTLCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-6a-LTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-6a-LTLCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-6a-LTLCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717148373665
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLCardinality.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 52 (type SKEL/SRCH) for 9 DLCshifumi-PT-6a-LTLCardinality-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 52 (type SKEL/SRCH) for DLCshifumi-PT-6a-LTLCardinality-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 3
[[35mlola[0m][I] fired transitions : 3
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 53 (type SKEL/SRCH) for 6 DLCshifumi-PT-6a-LTLCardinality-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 53 (type SKEL/SRCH) for DLCshifumi-PT-6a-LTLCardinality-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 8
[[35mlola[0m][I] fired transitions : 11
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-00: INITIAL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-01: INITIAL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-04: INITIAL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-05: INITIAL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-07: INITIAL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-09: INITIAL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-10: AG 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-11: INITIAL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-13: F 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-14: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 27 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] planning for DLCshifumi-PT-6a-LTLCardinality-02 stopped (result already fixed).
[[35mlola[0m][I] planning for DLCshifumi-PT-6a-LTLCardinality-03 stopped (result already fixed).
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 54 (type SKEL/SRCH) for 42 DLCshifumi-PT-6a-LTLCardinality-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 54 (type SKEL/SRCH) for DLCshifumi-PT-6a-LTLCardinality-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 4 (type CNST) for 3 DLCshifumi-PT-6a-LTLCardinality-01
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 13 (type CNST) for 12 DLCshifumi-PT-6a-LTLCardinality-04
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 34 (type CNST) for 33 DLCshifumi-PT-6a-LTLCardinality-11
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 22 (type CNST) for 21 DLCshifumi-PT-6a-LTLCardinality-07
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 1 (type CNST) for 0 DLCshifumi-PT-6a-LTLCardinality-00
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 13 (type CNST) for DLCshifumi-PT-6a-LTLCardinality-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 22 (type CNST) for DLCshifumi-PT-6a-LTLCardinality-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 16 (type CNST) for 15 DLCshifumi-PT-6a-LTLCardinality-05
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 45 (type CNST) for 42 DLCshifumi-PT-6a-LTLCardinality-14
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 1 (type CNST) for DLCshifumi-PT-6a-LTLCardinality-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 45 (type CNST) for DLCshifumi-PT-6a-LTLCardinality-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 16 (type CNST) for DLCshifumi-PT-6a-LTLCardinality-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 28 (type CNST) for 27 DLCshifumi-PT-6a-LTLCardinality-09
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 28 (type CNST) for DLCshifumi-PT-6a-LTLCardinality-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 4 (type CNST) for DLCshifumi-PT-6a-LTLCardinality-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 34 (type CNST) for DLCshifumi-PT-6a-LTLCardinality-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 57 (type SKEL/FNDP) for 30 DLCshifumi-PT-6a-LTLCardinality-10
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 58 (type SKEL/EQUN) for 30 DLCshifumi-PT-6a-LTLCardinality-10
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 59 (type SKEL/SRCH) for 30 DLCshifumi-PT-6a-LTLCardinality-10
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 59 (type SKEL/SRCH) for DLCshifumi-PT-6a-LTLCardinality-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 57 (type FNDP) for DLCshifumi-PT-6a-LTLCardinality-10 (obsolete)
[[35mlola[0m][W] CANCELED task # 58 (type EQUN) for DLCshifumi-PT-6a-LTLCardinality-10 (obsolete)
[[35mlola[0m][I] FINISHED task # 57 (type SKEL/FNDP) for DLCshifumi-PT-6a-LTLCardinality-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 58 (type SKEL/EQUN) for DLCshifumi-PT-6a-LTLCardinality-10
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-10: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-13: F 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 32 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-10: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-13: F 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 37 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[*** LOG ERROR #0001 ***] [2024-05-31 09:31:46] [status_logger] string pointer is null
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-10: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-13: F 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 42 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 63 (type EXCL) for 30 DLCshifumi-PT-6a-LTLCardinality-10
[[35mlola[0m][I] time limit : 592 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 61 (type FNDP) for 30 DLCshifumi-PT-6a-LTLCardinality-10
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 62 (type EQUN) for 30 DLCshifumi-PT-6a-LTLCardinality-10
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 63 (type EXCL) for DLCshifumi-PT-6a-LTLCardinality-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 61 (type FNDP) for DLCshifumi-PT-6a-LTLCardinality-10 (obsolete)
[[35mlola[0m][W] CANCELED task # 62 (type EQUN) for DLCshifumi-PT-6a-LTLCardinality-10 (obsolete)
[[35mlola[0m][I] FINISHED task # 62 (type EQUN) for DLCshifumi-PT-6a-LTLCardinality-10
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 61 (type FNDP) for DLCshifumi-PT-6a-LTLCardinality-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-13: F 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 47 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 65 (type EXCL) for 39 DLCshifumi-PT-6a-LTLCardinality-13
[[35mlola[0m][I] time limit : 710 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 68 (type EQUN) for 39 DLCshifumi-PT-6a-LTLCardinality-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 65 (type EXCL) for DLCshifumi-PT-6a-LTLCardinality-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 68 (type EQUN) for DLCshifumi-PT-6a-LTLCardinality-13 (obsolete)
[[35mlola[0m][I] LAUNCH task # 25 (type EXCL) for 24 DLCshifumi-PT-6a-LTLCardinality-08
[[35mlola[0m][I] time limit : 887 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 68 (type EQUN) for DLCshifumi-PT-6a-LTLCardinality-13
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 2/887 1/2000 DLCshifumi-PT-6a-LTLCardinality-08 1478 m, 295 m/sec, 299770 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 52 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 7/887 1/2000 DLCshifumi-PT-6a-LTLCardinality-08 6102 m, 924 m/sec, 1658239 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 57 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 12/887 1/2000 DLCshifumi-PT-6a-LTLCardinality-08 11493 m, 1078 m/sec, 2997967 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 62 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 17/887 1/2000 DLCshifumi-PT-6a-LTLCardinality-08 17635 m, 1228 m/sec, 4282539 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 67 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 22/887 1/2000 DLCshifumi-PT-6a-LTLCardinality-08 22438 m, 960 m/sec, 5697848 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 72 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 27/887 1/2000 DLCshifumi-PT-6a-LTLCardinality-08 27844 m, 1081 m/sec, 7022891 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 77 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 32/887 1/2000 DLCshifumi-PT-6a-LTLCardinality-08 34802 m, 1391 m/sec, 8351085 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 82 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 37/887 1/2000 DLCshifumi-PT-6a-LTLCardinality-08 39619 m, 963 m/sec, 9770485 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 87 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 42/887 1/2000 DLCshifumi-PT-6a-LTLCardinality-08 45024 m, 1081 m/sec, 11094372 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 92 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 47/887 1/2000 DLCshifumi-PT-6a-LTLCardinality-08 51208 m, 1236 m/sec, 12386638 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 97 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 52/887 1/2000 DLCshifumi-PT-6a-LTLCardinality-08 56104 m, 979 m/sec, 13845016 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 102 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 57/887 1/2000 DLCshifumi-PT-6a-LTLCardinality-08 61391 m, 1057 m/sec, 15121183 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 107 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 62/887 1/2000 DLCshifumi-PT-6a-LTLCardinality-08 69091 m, 1540 m/sec, 16481739 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 112 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 67/887 1/2000 DLCshifumi-PT-6a-LTLCardinality-08 73889 m, 959 m/sec, 17897311 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 117 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 72/887 1/2000 DLCshifumi-PT-6a-LTLCardinality-08 79321 m, 1086 m/sec, 19225939 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 122 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 77/887 1/2000 DLCshifumi-PT-6a-LTLCardinality-08 85449 m, 1225 m/sec, 20506739 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 127 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 82/887 1/2000 DLCshifumi-PT-6a-LTLCardinality-08 90238 m, 957 m/sec, 21931275 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 132 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 87/887 1/2000 DLCshifumi-PT-6a-LTLCardinality-08 95574 m, 1067 m/sec, 23226911 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 137 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 92/887 1/2000 DLCshifumi-PT-6a-LTLCardinality-08 102424 m, 1370 m/sec, 24534123 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 142 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 97/887 1/2000 DLCshifumi-PT-6a-LTLCardinality-08 107111 m, 937 m/sec, 25910017 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 147 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 102/887 1/2000 DLCshifumi-PT-6a-LTLCardinality-08 112473 m, 1072 m/sec, 27240399 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 152 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 107/887 1/2000 DLCshifumi-PT-6a-LTLCardinality-08 118577 m, 1220 m/sec, 28516270 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 157 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 112/887 1/2000 DLCshifumi-PT-6a-LTLCardinality-08 123223 m, 929 m/sec, 29879918 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 162 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 117/887 2/2000 DLCshifumi-PT-6a-LTLCardinality-08 128587 m, 1072 m/sec, 31213241 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 167 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 122/887 2/2000 DLCshifumi-PT-6a-LTLCardinality-08 136962 m, 1675 m/sec, 32589192 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 172 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 127/887 2/2000 DLCshifumi-PT-6a-LTLCardinality-08 141622 m, 932 m/sec, 33827931 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 177 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 132/887 2/2000 DLCshifumi-PT-6a-LTLCardinality-08 147226 m, 1120 m/sec, 35296954 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 182 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 137/887 2/2000 DLCshifumi-PT-6a-LTLCardinality-08 153281 m, 1211 m/sec, 36605723 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 187 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 142/887 2/2000 DLCshifumi-PT-6a-LTLCardinality-08 157888 m, 921 m/sec, 37869559 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 192 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 147/887 2/2000 DLCshifumi-PT-6a-LTLCardinality-08 163497 m, 1121 m/sec, 39328556 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 197 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 152/887 2/2000 DLCshifumi-PT-6a-LTLCardinality-08 170280 m, 1356 m/sec, 40639405 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 202 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 157/887 2/2000 DLCshifumi-PT-6a-LTLCardinality-08 174939 m, 931 m/sec, 41877440 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 207 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 162/887 2/2000 DLCshifumi-PT-6a-LTLCardinality-08 180503 m, 1112 m/sec, 43332855 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 212 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 167/887 2/2000 DLCshifumi-PT-6a-LTLCardinality-08 186538 m, 1207 m/sec, 44642433 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 217 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 172/887 2/2000 DLCshifumi-PT-6a-LTLCardinality-08 191132 m, 918 m/sec, 45880705 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 222 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 177/887 2/2000 DLCshifumi-PT-6a-LTLCardinality-08 196665 m, 1106 m/sec, 47318859 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 227 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 182/887 2/2000 DLCshifumi-PT-6a-LTLCardinality-08 204275 m, 1522 m/sec, 48697165 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 232 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 187/887 2/2000 DLCshifumi-PT-6a-LTLCardinality-08 208777 m, 900 m/sec, 49896087 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 237 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 192/887 2/2000 DLCshifumi-PT-6a-LTLCardinality-08 214186 m, 1081 m/sec, 51284155 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 242 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 197/887 2/2000 DLCshifumi-PT-6a-LTLCardinality-08 220464 m, 1255 m/sec, 52687870 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 247 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 202/887 2/2000 DLCshifumi-PT-6a-LTLCardinality-08 224942 m, 895 m/sec, 53880987 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 252 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 207/887 2/2000 DLCshifumi-PT-6a-LTLCardinality-08 230313 m, 1074 m/sec, 55253359 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 257 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 212/887 2/2000 DLCshifumi-PT-6a-LTLCardinality-08 237164 m, 1370 m/sec, 56654367 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 262 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 217/887 2/2000 DLCshifumi-PT-6a-LTLCardinality-08 241794 m, 926 m/sec, 57882047 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 267 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 222/887 2/2000 DLCshifumi-PT-6a-LTLCardinality-08 247156 m, 1072 m/sec, 59203989 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 272 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 227/887 2/2000 DLCshifumi-PT-6a-LTLCardinality-08 253089 m, 1186 m/sec, 60632079 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 277 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 232/887 3/2000 DLCshifumi-PT-6a-LTLCardinality-08 257922 m, 966 m/sec, 61857520 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 282 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 237/887 3/2000 DLCshifumi-PT-6a-LTLCardinality-08 263260 m, 1067 m/sec, 63166090 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 287 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 242/887 3/2000 DLCshifumi-PT-6a-LTLCardinality-08 268739 m, 1095 m/sec, 64585017 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 292 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 247/887 3/2000 DLCshifumi-PT-6a-LTLCardinality-08 277130 m, 1678 m/sec, 65850822 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 297 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 252/887 3/2000 DLCshifumi-PT-6a-LTLCardinality-08 281980 m, 970 m/sec, 67288876 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 302 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 257/887 3/2000 DLCshifumi-PT-6a-LTLCardinality-08 287292 m, 1062 m/sec, 68579358 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 307 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 262/887 3/2000 DLCshifumi-PT-6a-LTLCardinality-08 293383 m, 1218 m/sec, 69854306 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 312 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 267/887 3/2000 DLCshifumi-PT-6a-LTLCardinality-08 298197 m, 962 m/sec, 71289479 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 317 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 272/887 3/2000 DLCshifumi-PT-6a-LTLCardinality-08 303450 m, 1050 m/sec, 72562531 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 322 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 277/887 3/2000 DLCshifumi-PT-6a-LTLCardinality-08 310292 m, 1368 m/sec, 73868125 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 327 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 282/887 3/2000 DLCshifumi-PT-6a-LTLCardinality-08 314975 m, 936 m/sec, 75249881 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 332 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 287/887 3/2000 DLCshifumi-PT-6a-LTLCardinality-08 320356 m, 1076 m/sec, 76578241 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 337 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 292/887 3/2000 DLCshifumi-PT-6a-LTLCardinality-08 326488 m, 1226 m/sec, 77857750 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 342 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 297/887 3/2000 DLCshifumi-PT-6a-LTLCardinality-08 330897 m, 881 m/sec, 79149182 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 347 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 302/887 3/2000 DLCshifumi-PT-6a-LTLCardinality-08 336140 m, 1048 m/sec, 80470238 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 352 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 307/887 3/2000 DLCshifumi-PT-6a-LTLCardinality-08 343436 m, 1459 m/sec, 81742739 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 357 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 312/887 3/2000 DLCshifumi-PT-6a-LTLCardinality-08 347661 m, 845 m/sec, 82883233 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 362 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 317/887 3/2000 DLCshifumi-PT-6a-LTLCardinality-08 352772 m, 1022 m/sec, 84099730 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 367 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 322/887 3/2000 DLCshifumi-PT-6a-LTLCardinality-08 357313 m, 908 m/sec, 85454379 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 372 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 327/887 3/2000 DLCshifumi-PT-6a-LTLCardinality-08 363078 m, 1153 m/sec, 86705318 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 377 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 332/887 3/2000 DLCshifumi-PT-6a-LTLCardinality-08 368123 m, 1009 m/sec, 87888579 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 382 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 337/887 3/2000 DLCshifumi-PT-6a-LTLCardinality-08 372462 m, 867 m/sec, 89112502 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 387 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 342/887 3/2000 DLCshifumi-PT-6a-LTLCardinality-08 379107 m, 1329 m/sec, 90429740 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 392 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 347/887 4/2000 DLCshifumi-PT-6a-LTLCardinality-08 384396 m, 1057 m/sec, 91758405 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 397 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 352/887 4/2000 DLCshifumi-PT-6a-LTLCardinality-08 388711 m, 863 m/sec, 92919202 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 402 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 357/887 4/2000 DLCshifumi-PT-6a-LTLCardinality-08 394728 m, 1203 m/sec, 94212526 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 407 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 362/887 4/2000 DLCshifumi-PT-6a-LTLCardinality-08 399403 m, 935 m/sec, 95616156 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 412 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 367/887 4/2000 DLCshifumi-PT-6a-LTLCardinality-08 404500 m, 1019 m/sec, 96819838 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 417 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 372/887 4/2000 DLCshifumi-PT-6a-LTLCardinality-08 412795 m, 1659 m/sec, 98176531 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 422 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 377/887 4/2000 DLCshifumi-PT-6a-LTLCardinality-08 417289 m, 898 m/sec, 99430128 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 427 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 382/887 4/2000 DLCshifumi-PT-6a-LTLCardinality-08 422798 m, 1101 m/sec, 100847397 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 432 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 387/887 4/2000 DLCshifumi-PT-6a-LTLCardinality-08 428728 m, 1186 m/sec, 102113106 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 437 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 392/887 4/2000 DLCshifumi-PT-6a-LTLCardinality-08 433231 m, 900 m/sec, 103314567 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 442 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 397/887 4/2000 DLCshifumi-PT-6a-LTLCardinality-08 438594 m, 1072 m/sec, 104717645 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 447 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 402/887 4/2000 DLCshifumi-PT-6a-LTLCardinality-08 445438 m, 1368 m/sec, 106075850 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 452 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 407/887 4/2000 DLCshifumi-PT-6a-LTLCardinality-08 449842 m, 880 m/sec, 107254092 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 457 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 412/887 4/2000 DLCshifumi-PT-6a-LTLCardinality-08 455132 m, 1058 m/sec, 108570133 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 462 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 417/887 4/2000 DLCshifumi-PT-6a-LTLCardinality-08 461357 m, 1245 m/sec, 109982942 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 467 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 422/887 4/2000 DLCshifumi-PT-6a-LTLCardinality-08 465828 m, 894 m/sec, 111200082 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 472 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 427/887 4/2000 DLCshifumi-PT-6a-LTLCardinality-08 471175 m, 1069 m/sec, 112523924 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 477 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 432/887 4/2000 DLCshifumi-PT-6a-LTLCardinality-08 477023 m, 1169 m/sec, 113942922 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 482 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 437/887 4/2000 DLCshifumi-PT-6a-LTLCardinality-08 483481 m, 1291 m/sec, 115244263 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 487 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 442/887 4/2000 DLCshifumi-PT-6a-LTLCardinality-08 488747 m, 1053 m/sec, 116472490 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 492 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 447/887 4/2000 DLCshifumi-PT-6a-LTLCardinality-08 490857 m, 422 m/sec, 117149435 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 497 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-02: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-09: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-10: AG false state space[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-6a-LTLCardinality-13: F true state space / EG[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-6a-LTLCardinality-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-6a-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 LTL EXCL 452/887 4/2000 DLCshifumi-PT-6a-LTLCardinality-08 491511 m, 130 m/sec, 117289956 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 502 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 442 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCshifumi-PT-6a"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is DLCshifumi-PT-6a, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r115-smll-171624276900355"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DLCshifumi-PT-6a.tgz
mv DLCshifumi-PT-6a execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;