About the Execution of LoLA for DLCshifumi-PT-4b
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
16208.247 | 850682.00 | 1386302.00 | 2606.40 | ??????T?T???T?F? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r115-smll-171624276800330.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is DLCshifumi-PT-4b, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r115-smll-171624276800330
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 5.6M
-rw-r--r-- 1 mcc users 7.2K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 77K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Apr 22 14:38 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 22 14:38 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Apr 22 14:38 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 22 14:38 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Apr 13 05:59 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 148K Apr 13 05:59 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Apr 13 05:59 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 95K Apr 13 05:59 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:38 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 22 14:38 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 5.1M May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-2024-00
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-2024-01
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-2024-02
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-2024-03
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-2024-04
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-2024-05
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-2024-06
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-2024-07
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-2024-08
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-2024-09
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-2024-10
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-2024-11
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-2023-12
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-2023-13
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-2023-14
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-2023-15
=== Now, execution of the tool begins
BK_START 1717134013892
FORMULA DLCshifumi-PT-4b-CTLFireability-2023-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-4b-CTLFireability-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-4b-CTLFireability-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-4b-CTLFireability-2023-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717134864574
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-06: EF 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-08: DISJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-12: EGEF 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-14: AG 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 296 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-06: EF 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-08: DISJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-12: EGEF 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-14: AG 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 301 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-06: EF 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-08: DISJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-12: EGEF 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-14: AG 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 306 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-06: EF 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-08: DISJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-12: EGEF 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-14: AG 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 311 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-06: EF 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-08: DISJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-12: EGEF 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-14: AG 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 316 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-06: EF 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-08: DISJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-12: EGEF 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-14: AG 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 321 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-06: EF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-08: DISJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-12: EGEF 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-14: AG 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 326 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-06: EF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-08: DISJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-12: EGEF 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-14: AG 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 331 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-06: EF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-08: DISJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-12: EGEF 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-14: AG 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 336 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-06: EF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-08: DISJ 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-12: EGEF 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-14: AG 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 341 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-06: EF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-08: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-12: EGEF 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-14: AG 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 346 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-06: EF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-08: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-12: EGEF 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-14: AG 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 351 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-06: EF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-08: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-12: EGEF 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-14: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 356 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-06: EF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-08: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-12: EGEF 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-14: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 361 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-06: EF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-08: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-12: EGEF 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-14: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 366 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-06: EF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-08: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-12: EGEF 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-14: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 371 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-06: EF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-08: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-12: EGEF 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-14: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 376 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-06: EF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-08: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-12: EGEF 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-14: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 381 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-06: EF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-08: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-12: EGEF 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-14: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 386 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-06: EF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-08: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-12: EGEF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-14: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 391 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-06: EF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-08: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-12: EGEF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-14: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 396 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-06: EF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-08: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-12: EGEF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-14: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 401 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-06: EF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-08: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-12: EGEF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-14: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 406 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 41 (type EXCL) for 40 DLCshifumi-PT-4b-CTLFireability-2023-12
[[35mlola[0m][I] time limit : 199 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 54 (type FNDP) for 18 DLCshifumi-PT-4b-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 55 (type EQUN) for 18 DLCshifumi-PT-4b-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 41 (type EXCL) for DLCshifumi-PT-4b-CTLFireability-2023-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 4
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 56 (type EXCL) for 18 DLCshifumi-PT-4b-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 212 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 54 (type FNDP) for DLCshifumi-PT-4b-CTLFireability-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 55 (type EQUN) for DLCshifumi-PT-4b-CTLFireability-2024-06 (obsolete)
[[35mlola[0m][W] CANCELED task # 56 (type EXCL) for DLCshifumi-PT-4b-CTLFireability-2024-06 (obsolete)
[[35mlola[0m][I] LAUNCH task # 53 (type EXCL) for 24 DLCshifumi-PT-4b-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 227 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 58 (type FNDP) for 24 DLCshifumi-PT-4b-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 59 (type EQUN) for 24 DLCshifumi-PT-4b-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-08: DISJ 0 1 3 0 2 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-14: AG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 53 LTL EXCL 0/227 0/2000 DLCshifumi-PT-4b-CTLFireability-2024-08 --
[[35mlola[0m][.] 58 EF FNDP 0/3188 0/5 DLCshifumi-PT-4b-CTLFireability-2024-08 --
[[35mlola[0m][.] 59 EF STEQ 0/3188 0/5 DLCshifumi-PT-4b-CTLFireability-2024-08 --
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 412 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 61 (type FNDP) for 46 DLCshifumi-PT-4b-CTLFireability-2023-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 53 (type EXCL) for DLCshifumi-PT-4b-CTLFireability-2024-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 615
[[35mlola[0m][I] fired transitions : 615
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 58 (type FNDP) for DLCshifumi-PT-4b-CTLFireability-2024-08 (obsolete)
[[35mlola[0m][W] CANCELED task # 59 (type EQUN) for DLCshifumi-PT-4b-CTLFireability-2024-08 (obsolete)
[[35mlola[0m][I] LAUNCH task # 63 (type EXCL) for 46 DLCshifumi-PT-4b-CTLFireability-2023-14
[[35mlola[0m][I] time limit : 245 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 62 (type EQUN) for 46 DLCshifumi-PT-4b-CTLFireability-2023-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 61 (type FNDP) for DLCshifumi-PT-4b-CTLFireability-2023-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 62 (type EQUN) for DLCshifumi-PT-4b-CTLFireability-2023-14 (obsolete)
[[35mlola[0m][W] CANCELED task # 63 (type EXCL) for DLCshifumi-PT-4b-CTLFireability-2023-14 (obsolete)
[[35mlola[0m][I] LAUNCH task # 16 (type EXCL) for 15 DLCshifumi-PT-4b-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 265 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 58 (type FNDP) for DLCshifumi-PT-4b-CTLFireability-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 55 (type EQUN) for DLCshifumi-PT-4b-CTLFireability-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 5/265 1/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 10525 m, 2105 m/sec, 132767 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 417 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 59 (type EQUN) for DLCshifumi-PT-4b-CTLFireability-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 62 (type EQUN) for DLCshifumi-PT-4b-CTLFireability-2023-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 10/265 1/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 25530 m, 3001 m/sec, 309051 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 422 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 15/265 1/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 42865 m, 3467 m/sec, 508407 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 427 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 20/265 1/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 61242 m, 3675 m/sec, 707862 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 432 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 25/265 1/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 79227 m, 3597 m/sec, 912020 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 437 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 30/265 2/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 96393 m, 3433 m/sec, 1110708 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 442 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 35/265 2/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 113270 m, 3375 m/sec, 1299458 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 447 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 40/265 2/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 130848 m, 3515 m/sec, 1495446 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 452 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 45/265 2/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 145045 m, 2839 m/sec, 1647616 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 457 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 50/265 2/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 154839 m, 1958 m/sec, 1764198 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 462 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 55/265 2/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 163235 m, 1679 m/sec, 1862095 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 467 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 60/265 2/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 173092 m, 1971 m/sec, 1972919 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 472 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 65/265 2/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 184909 m, 2363 m/sec, 2102431 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 477 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 70/265 3/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 197391 m, 2496 m/sec, 2247591 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 482 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 75/265 3/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 209251 m, 2372 m/sec, 2369343 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 487 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 80/265 3/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 222438 m, 2637 m/sec, 2508792 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 492 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 85/265 3/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 235720 m, 2656 m/sec, 2657392 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 497 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 90/265 3/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 249069 m, 2669 m/sec, 2799696 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 502 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 95/265 3/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 262531 m, 2692 m/sec, 2938669 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 507 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 100/265 3/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 275754 m, 2644 m/sec, 3072921 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 512 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 105/265 4/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 289867 m, 2822 m/sec, 3227528 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 517 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 1 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 110/265 4/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 302575 m, 2541 m/sec, 3362579 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 522 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 1 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 115/265 4/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 327530 m, 4991 m/sec, 3618376 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 527 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 120/265 4/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 373518 m, 9197 m/sec, 4079452 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 532 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 125/265 5/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 418838 m, 9064 m/sec, 4549735 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 537 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 130/265 5/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 464637 m, 9159 m/sec, 5015524 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 542 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 135/265 6/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 510951 m, 9262 m/sec, 5471868 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 547 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 140/265 6/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 555173 m, 8844 m/sec, 5949450 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 552 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 145/265 7/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 601384 m, 9242 m/sec, 6409019 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 557 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 150/265 7/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 647398 m, 9202 m/sec, 6869187 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 562 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 155/265 8/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 693118 m, 9144 m/sec, 7329266 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 567 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 160/265 8/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 738901 m, 9156 m/sec, 7789219 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 572 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 165/265 9/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 784490 m, 9117 m/sec, 8249030 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 577 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 170/265 9/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 830984 m, 9298 m/sec, 8704148 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 582 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 175/265 9/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 876195 m, 9042 m/sec, 9167344 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 587 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 180/265 10/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 918866 m, 8534 m/sec, 9655417 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 592 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 185/265 10/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 960573 m, 8341 m/sec, 10112736 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 597 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 190/265 11/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 1005287 m, 8942 m/sec, 10582651 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 602 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 195/265 11/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 1050668 m, 9076 m/sec, 11045591 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 607 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 200/265 11/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 1096066 m, 9079 m/sec, 11508853 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 612 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 205/265 12/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 1140936 m, 8974 m/sec, 11973943 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 617 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 210/265 12/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 1187034 m, 9219 m/sec, 12426532 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 622 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 215/265 12/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 1232701 m, 9133 m/sec, 12887652 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 627 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 220/265 13/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 1277267 m, 8913 m/sec, 13353608 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 632 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 225/265 13/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 1321483 m, 8843 m/sec, 13824609 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 637 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 230/265 14/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 1367956 m, 9294 m/sec, 14279924 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 642 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 235/265 14/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 1413590 m, 9126 m/sec, 14735306 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 647 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 240/265 14/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 1460039 m, 9289 m/sec, 15188308 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 652 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 245/265 15/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 1505385 m, 9069 m/sec, 15645303 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 657 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 250/265 15/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 1549845 m, 8892 m/sec, 16115911 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 662 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 255/265 16/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 1592819 m, 8594 m/sec, 16601558 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 667 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 260/265 16/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 1636814 m, 8799 m/sec, 17076519 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 672 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 265/265 16/2000 DLCshifumi-PT-4b-CTLFireability-2024-05 1681268 m, 8890 m/sec, 17541853 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 677 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 16 (type EXCL) for DLCshifumi-PT-4b-CTLFireability-2024-05 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 682 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 44 (type EXCL) for 43 DLCshifumi-PT-4b-CTLFireability-2023-13
[[35mlola[0m][I] time limit : 265 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 16 (type EXCL) for 15 DLCshifumi-PT-4b-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 2918 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 5/2918 1/5 DLCshifumi-PT-4b-CTLFireability-2024-05 38084 m, -328636 m/sec, 451696 t fired, .
[[35mlola[0m][.] 44 CTL EXCL 5/265 4/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 67451 m, 13490 m/sec, 72262 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 687 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 10/2918 1/5 DLCshifumi-PT-4b-CTLFireability-2024-05 81438 m, 8670 m/sec, 935195 t fired, .
[[35mlola[0m][.] 44 CTL EXCL 10/243 7/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 139067 m, 14323 m/sec, 148897 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 692 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 15/2918 2/5 DLCshifumi-PT-4b-CTLFireability-2024-05 124302 m, 8572 m/sec, 1422520 t fired, .
[[35mlola[0m][.] 44 CTL EXCL 15/243 11/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 211658 m, 14518 m/sec, 226823 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 697 secs. Pages in use: 30
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 20/2918 2/5 DLCshifumi-PT-4b-CTLFireability-2024-05 167560 m, 8651 m/sec, 1908665 t fired, .
[[35mlola[0m][.] 44 CTL EXCL 20/243 15/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 283343 m, 14337 m/sec, 303862 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 702 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 25/2918 3/5 DLCshifumi-PT-4b-CTLFireability-2024-05 211978 m, 8883 m/sec, 2399570 t fired, .
[[35mlola[0m][.] 44 CTL EXCL 25/243 19/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 354428 m, 14217 m/sec, 380399 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 707 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 30/2918 3/5 DLCshifumi-PT-4b-CTLFireability-2024-05 255847 m, 8773 m/sec, 2870177 t fired, .
[[35mlola[0m][.] 44 CTL EXCL 30/243 23/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 425627 m, 14239 m/sec, 456952 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 712 secs. Pages in use: 43
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 35/2918 4/5 DLCshifumi-PT-4b-CTLFireability-2024-05 299940 m, 8818 m/sec, 3337369 t fired, .
[[35mlola[0m][.] 44 CTL EXCL 35/243 27/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 497043 m, 14283 m/sec, 534012 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 717 secs. Pages in use: 48
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 40/2918 4/5 DLCshifumi-PT-4b-CTLFireability-2024-05 345054 m, 9022 m/sec, 3797106 t fired, .
[[35mlola[0m][.] 44 CTL EXCL 40/243 30/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 568697 m, 14330 m/sec, 611040 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 722 secs. Pages in use: 51
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 45/2918 5/5 DLCshifumi-PT-4b-CTLFireability-2024-05 390338 m, 9056 m/sec, 4253355 t fired, .
[[35mlola[0m][.] 44 CTL EXCL 45/243 34/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 640158 m, 14292 m/sec, 687828 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 727 secs. Pages in use: 56
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 50/2918 5/5 DLCshifumi-PT-4b-CTLFireability-2024-05 434692 m, 8870 m/sec, 4713353 t fired, .
[[35mlola[0m][.] 44 CTL EXCL 50/243 38/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 711492 m, 14266 m/sec, 764489 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 732 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 16 (type EXCL) for DLCshifumi-PT-4b-CTLFireability-2024-05 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 55/243 42/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 782747 m, 14251 m/sec, 841425 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 737 secs. Pages in use: 64
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 60/265 46/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 854516 m, 14353 m/sec, 918553 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 742 secs. Pages in use: 64
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 65/265 50/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 925805 m, 14257 m/sec, 995840 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 747 secs. Pages in use: 67
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 70/265 54/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 996930 m, 14225 m/sec, 1072383 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 752 secs. Pages in use: 71
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 75/265 57/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 1067994 m, 14212 m/sec, 1148755 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 757 secs. Pages in use: 74
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 80/265 60/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 1138267 m, 14054 m/sec, 1224115 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 762 secs. Pages in use: 77
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 85/265 63/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 1208772 m, 14101 m/sec, 1300192 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 767 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 90/265 66/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 1278455 m, 13936 m/sec, 1375441 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 772 secs. Pages in use: 83
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 95/265 70/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 1348556 m, 14020 m/sec, 1451095 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 777 secs. Pages in use: 87
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 100/265 73/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 1418976 m, 14084 m/sec, 1527181 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 782 secs. Pages in use: 90
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 105/265 76/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 1489205 m, 14045 m/sec, 1602827 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 787 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 110/265 80/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 1559908 m, 14140 m/sec, 1678703 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 792 secs. Pages in use: 97
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 115/265 84/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 1629821 m, 13982 m/sec, 1754058 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 797 secs. Pages in use: 101
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 120/265 87/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 1700094 m, 14054 m/sec, 1829703 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 802 secs. Pages in use: 104
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 125/265 91/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 1770318 m, 14044 m/sec, 1905465 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 807 secs. Pages in use: 108
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 130/265 94/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 1840908 m, 14118 m/sec, 1981181 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 812 secs. Pages in use: 111
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 135/265 96/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 1910596 m, 13937 m/sec, 2056303 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 817 secs. Pages in use: 113
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 140/265 98/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 1980186 m, 13918 m/sec, 2131169 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 822 secs. Pages in use: 115
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 145/265 101/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 2048998 m, 13762 m/sec, 2205437 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 827 secs. Pages in use: 118
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2024-08: DISJ true LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCshifumi-PT-4b-CTLFireability-2023-12: EGEF true CTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCshifumi-PT-4b-CTLFireability-2023-14: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCshifumi-PT-4b-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 159/265 103/2000 DLCshifumi-PT-4b-CTLFireability-2023-13 2085645 m, 7329 m/sec, 2244674 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 843 secs. Pages in use: 120
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 406 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCshifumi-PT-4b"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is DLCshifumi-PT-4b, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r115-smll-171624276800330"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DLCshifumi-PT-4b.tgz
mv DLCshifumi-PT-4b execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;