fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r115-smll-171624276800322
Last Updated
July 7, 2024

About the Execution of LoLA for DLCshifumi-PT-4a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16207.756 536328.00 549141.00 2383.60 ????TT?????T???? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r115-smll-171624276800322.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is DLCshifumi-PT-4a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r115-smll-171624276800322
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.4M
-rw-r--r-- 1 mcc users 7.7K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 86K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 45K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Apr 22 14:38 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Apr 22 14:38 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Apr 22 14:38 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 22 14:38 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.9K Apr 13 09:21 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 91K Apr 13 09:21 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.9K Apr 13 08:38 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 77K Apr 13 08:38 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:38 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:38 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 1.9M May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2024-00
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2024-01
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2024-02
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2024-03
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2024-04
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2024-05
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2024-06
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2024-07
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2024-08
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2024-09
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2024-10
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2024-11
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2023-12
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2023-13
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2023-14
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717133023503

FORMULA DLCshifumi-PT-4a-CTLFireability-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-4a-CTLFireability-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-4a-CTLFireability-2024-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1717133559831

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from CTLFireability.xml
[lola][I] Rule S: 0 transitions removed,0 places removed
[lola][I] LAUNCH task # 61 (type SKEL/FNDP) for 12 DLCshifumi-PT-4a-CTLFireability-2024-04
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 62 (type SKEL/EQUN) for 12 DLCshifumi-PT-4a-CTLFireability-2024-04
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 63 (type SKEL/SRCH) for 12 DLCshifumi-PT-4a-CTLFireability-2024-04
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 63 (type SKEL/SRCH) for DLCshifumi-PT-4a-CTLFireability-2024-04
[lola][I] result : true
[lola][I] markings : 5
[lola][I] fired transitions : 4
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][W] CANCELED task # 61 (type FNDP) for DLCshifumi-PT-4a-CTLFireability-2024-04 (obsolete)
[lola][W] CANCELED task # 62 (type EQUN) for DLCshifumi-PT-4a-CTLFireability-2024-04 (obsolete)
[lola][I] FINISHED task # 61 (type SKEL/FNDP) for DLCshifumi-PT-4a-CTLFireability-2024-04
[lola][I] result : unknown
[lola][I] tried executions : 2
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][I] FINISHED task # 62 (type SKEL/EQUN) for DLCshifumi-PT-4a-CTLFireability-2024-04
[lola][I] result : false
[lola][I] LAUNCH task # 65 (type SKEL/FNDP) for 19 DLCshifumi-PT-4a-CTLFireability-2024-05
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 66 (type SKEL/EQUN) for 19 DLCshifumi-PT-4a-CTLFireability-2024-05
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 67 (type SKEL/SRCH) for 19 DLCshifumi-PT-4a-CTLFireability-2024-05
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 65 (type SKEL/FNDP) for DLCshifumi-PT-4a-CTLFireability-2024-05
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][W] CANCELED task # 66 (type EQUN) for DLCshifumi-PT-4a-CTLFireability-2024-05 (obsolete)
[lola][W] CANCELED task # 67 (type SRCH) for DLCshifumi-PT-4a-CTLFireability-2024-05 (obsolete)
[lola][I] FINISHED task # 66 (type SKEL/EQUN) for DLCshifumi-PT-4a-CTLFireability-2024-05
[lola][I] result : false
[lola][I] NOTDEADLOCKFREE
[lola][I] LAUNCH task # 70 (type EXCL) for 19 DLCshifumi-PT-4a-CTLFireability-2024-05
[lola][I] time limit : 143 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 68 (type FNDP) for 19 DLCshifumi-PT-4a-CTLFireability-2024-05
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 69 (type EQUN) for 19 DLCshifumi-PT-4a-CTLFireability-2024-05
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 68 (type FNDP) for DLCshifumi-PT-4a-CTLFireability-2024-05
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][W] CANCELED task # 69 (type EQUN) for DLCshifumi-PT-4a-CTLFireability-2024-05 (obsolete)
[lola][W] CANCELED task # 70 (type EXCL) for DLCshifumi-PT-4a-CTLFireability-2024-05 (obsolete)
[lola][I] FINISHED task # 69 (type EQUN) for DLCshifumi-PT-4a-CTLFireability-2024-05
[lola][I] result : true
[lola][I] LAUNCH task # 73 (type EXCL) for 12 DLCshifumi-PT-4a-CTLFireability-2024-04
[lola][I] time limit : 211 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 71 (type FNDP) for 12 DLCshifumi-PT-4a-CTLFireability-2024-04
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 72 (type EQUN) for 12 DLCshifumi-PT-4a-CTLFireability-2024-04
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 73 (type EXCL) for DLCshifumi-PT-4a-CTLFireability-2024-04
[lola][I] result : true
[lola][I] markings : 3
[lola][I] fired transitions : 2
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][W] CANCELED task # 71 (type FNDP) for DLCshifumi-PT-4a-CTLFireability-2024-04 (obsolete)
[lola][W] CANCELED task # 72 (type EQUN) for DLCshifumi-PT-4a-CTLFireability-2024-04 (obsolete)
[lola][I] FINISHED task # 71 (type FNDP) for DLCshifumi-PT-4a-CTLFireability-2024-04
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[*** LOG ERROR #0001 ***] [2024-05-31 05:23:48] [status_logger] string pointer is null
[lola][I] FINISHED task # 72 (type EQUN) for DLCshifumi-PT-4a-CTLFireability-2024-04
[lola][I] result : true
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 0 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ 0 0 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.]
[lola][.] Time elapsed: 7 secs. Pages in use: 1
[lola][.] # running tasks: 0 of 4. Visible: 16
[lola][I] LAUNCH task # 44 (type EXCL) for 41 DLCshifumi-PT-4a-CTLFireability-2024-11
[lola][I] time limit : 239 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 44 (type EXCL) for DLCshifumi-PT-4a-CTLFireability-2024-11
[lola][I] result : true
[lola][I] markings : 2
[lola][I] fired transitions : 4
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 27 (type EXCL) for 26 DLCshifumi-PT-4a-CTLFireability-2024-06
[lola][I] time limit : 276 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 78 (type EQUN) for 6 DLCshifumi-PT-4a-CTLFireability-2024-02
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 78 (type EQUN) for DLCshifumi-PT-4a-CTLFireability-2024-02
[lola][I] result : true
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 3/276 1/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 47627 m, 9525 m/sec, 1247867 t fired, .
[lola][.]
[lola][.] Time elapsed: 12 secs. Pages in use: 1
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 8/276 1/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 136340 m, 17742 m/sec, 3675523 t fired, .
[lola][.]
[lola][.] Time elapsed: 17 secs. Pages in use: 1
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 13/276 2/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 223729 m, 17477 m/sec, 6005629 t fired, .
[lola][.]
[lola][.] Time elapsed: 22 secs. Pages in use: 2
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 18/276 2/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 311185 m, 17491 m/sec, 8418941 t fired, .
[lola][.]
[lola][.] Time elapsed: 27 secs. Pages in use: 2
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 23/276 3/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 398283 m, 17419 m/sec, 10852044 t fired, .
[lola][.]
[lola][.] Time elapsed: 32 secs. Pages in use: 3
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 28/276 3/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 487620 m, 17867 m/sec, 13240799 t fired, .
[lola][.]
[lola][.] Time elapsed: 37 secs. Pages in use: 3
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 33/276 4/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 569867 m, 16449 m/sec, 15558303 t fired, .
[lola][.]
[lola][.] Time elapsed: 42 secs. Pages in use: 4
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 38/276 4/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 655129 m, 17052 m/sec, 17877455 t fired, .
[lola][.]
[lola][.] Time elapsed: 47 secs. Pages in use: 4
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 43/276 5/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 742519 m, 17478 m/sec, 20243611 t fired, .
[lola][.]
[lola][.] Time elapsed: 52 secs. Pages in use: 5
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 48/276 5/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 825552 m, 16606 m/sec, 22567215 t fired, .
[lola][.]
[lola][.] Time elapsed: 57 secs. Pages in use: 5
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 53/276 5/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 909351 m, 16759 m/sec, 24903413 t fired, .
[lola][.]
[lola][.] Time elapsed: 62 secs. Pages in use: 5
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 58/276 6/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 997669 m, 17663 m/sec, 27265703 t fired, .
[lola][.]
[lola][.] Time elapsed: 67 secs. Pages in use: 6
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 63/276 6/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 1079168 m, 16299 m/sec, 29602203 t fired, .
[lola][.]
[lola][.] Time elapsed: 72 secs. Pages in use: 6
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 68/276 7/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 1162061 m, 16578 m/sec, 31911833 t fired, .
[lola][.]
[lola][.] Time elapsed: 77 secs. Pages in use: 7
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 73/276 7/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 1247228 m, 17033 m/sec, 34214287 t fired, .
[lola][.]
[lola][.] Time elapsed: 82 secs. Pages in use: 7
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 78/276 8/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 1330144 m, 16583 m/sec, 36489566 t fired, .
[lola][.]
[lola][.] Time elapsed: 87 secs. Pages in use: 8
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 83/276 8/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 1410605 m, 16092 m/sec, 38753286 t fired, .
[lola][.]
[lola][.] Time elapsed: 92 secs. Pages in use: 8
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 88/276 9/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 1491505 m, 16180 m/sec, 41031837 t fired, .
[lola][.]
[lola][.] Time elapsed: 97 secs. Pages in use: 9
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 93/276 9/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 1574257 m, 16550 m/sec, 43352736 t fired, .
[lola][.]
[lola][.] Time elapsed: 102 secs. Pages in use: 9
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 98/276 9/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 1655161 m, 16180 m/sec, 45665629 t fired, .
[lola][.]
[lola][.] Time elapsed: 107 secs. Pages in use: 9
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 103/276 10/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 1736491 m, 16266 m/sec, 47999072 t fired, .
[lola][.]
[lola][.] Time elapsed: 112 secs. Pages in use: 10
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 108/276 10/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 1817809 m, 16263 m/sec, 50341240 t fired, .
[lola][.]
[lola][.] Time elapsed: 117 secs. Pages in use: 10
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 113/276 11/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 1903361 m, 17110 m/sec, 52688265 t fired, .
[lola][.]
[lola][.] Time elapsed: 122 secs. Pages in use: 11
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 118/276 11/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 1993593 m, 18046 m/sec, 55096116 t fired, .
[lola][.]
[lola][.] Time elapsed: 127 secs. Pages in use: 11
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 123/276 12/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 2079605 m, 17202 m/sec, 57469601 t fired, .
[lola][.]
[lola][.] Time elapsed: 132 secs. Pages in use: 12
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 128/276 12/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 2161896 m, 16458 m/sec, 59821119 t fired, .
[lola][.]
[lola][.] Time elapsed: 137 secs. Pages in use: 12
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 133/276 13/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 2242127 m, 16046 m/sec, 62141995 t fired, .
[lola][.]
[lola][.] Time elapsed: 142 secs. Pages in use: 13
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 138/276 13/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 2326698 m, 16914 m/sec, 64436425 t fired, .
[lola][.]
[lola][.] Time elapsed: 147 secs. Pages in use: 13
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 143/276 13/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 2410470 m, 16754 m/sec, 66743429 t fired, .
[lola][.]
[lola][.] Time elapsed: 152 secs. Pages in use: 13
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 148/276 14/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 2494062 m, 16718 m/sec, 69086343 t fired, .
[lola][.]
[lola][.] Time elapsed: 157 secs. Pages in use: 14
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 153/276 14/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 2574677 m, 16123 m/sec, 71427868 t fired, .
[lola][.]
[lola][.] Time elapsed: 162 secs. Pages in use: 14
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 158/276 15/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 2647939 m, 14652 m/sec, 73564520 t fired, .
[lola][.]
[lola][.] Time elapsed: 167 secs. Pages in use: 15
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 163/276 15/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 2726262 m, 15664 m/sec, 75851050 t fired, .
[lola][.]
[lola][.] Time elapsed: 172 secs. Pages in use: 15
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 168/276 16/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 2808136 m, 16374 m/sec, 78105713 t fired, .
[lola][.]
[lola][.] Time elapsed: 177 secs. Pages in use: 16
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 173/276 16/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 2891493 m, 16671 m/sec, 80354396 t fired, .
[lola][.]
[lola][.] Time elapsed: 182 secs. Pages in use: 16
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 178/276 16/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 2971055 m, 15912 m/sec, 82563792 t fired, .
[lola][.]
[lola][.] Time elapsed: 187 secs. Pages in use: 16
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 183/276 17/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 3050337 m, 15856 m/sec, 84782464 t fired, .
[lola][.]
[lola][.] Time elapsed: 192 secs. Pages in use: 17
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 188/276 17/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 3133127 m, 16558 m/sec, 87050617 t fired, .
[lola][.]
[lola][.] Time elapsed: 197 secs. Pages in use: 17
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 193/276 18/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 3220709 m, 17516 m/sec, 89414156 t fired, .
[lola][.]
[lola][.] Time elapsed: 202 secs. Pages in use: 18
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 198/276 18/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 3304584 m, 16775 m/sec, 91744319 t fired, .
[lola][.]
[lola][.] Time elapsed: 207 secs. Pages in use: 18
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 203/276 19/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 3386822 m, 16447 m/sec, 94053732 t fired, .
[lola][.]
[lola][.] Time elapsed: 212 secs. Pages in use: 19
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 208/276 19/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 3470996 m, 16834 m/sec, 96354190 t fired, .
[lola][.]
[lola][.] Time elapsed: 217 secs. Pages in use: 19
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 213/276 20/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 3555312 m, 16863 m/sec, 98634696 t fired, .
[lola][.]
[lola][.] Time elapsed: 222 secs. Pages in use: 20
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 218/276 20/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 3638064 m, 16550 m/sec, 100923447 t fired, .
[lola][.]
[lola][.] Time elapsed: 227 secs. Pages in use: 20
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 223/276 20/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 3718111 m, 16009 m/sec, 103167130 t fired, .
[lola][.]
[lola][.] Time elapsed: 232 secs. Pages in use: 20
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 228/276 21/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 3796849 m, 15747 m/sec, 105400562 t fired, .
[lola][.]
[lola][.] Time elapsed: 237 secs. Pages in use: 21
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 233/276 21/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 3878042 m, 16238 m/sec, 107687224 t fired, .
[lola][.]
[lola][.] Time elapsed: 242 secs. Pages in use: 21
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 238/276 22/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 3957983 m, 15988 m/sec, 109975026 t fired, .
[lola][.]
[lola][.] Time elapsed: 247 secs. Pages in use: 22
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 243/276 22/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 4036064 m, 15616 m/sec, 112215402 t fired, .
[lola][.]
[lola][.] Time elapsed: 252 secs. Pages in use: 22
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 248/276 23/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 4114143 m, 15615 m/sec, 114451567 t fired, .
[lola][.]
[lola][.] Time elapsed: 257 secs. Pages in use: 23
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 253/276 23/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 4193071 m, 15785 m/sec, 116717279 t fired, .
[lola][.]
[lola][.] Time elapsed: 262 secs. Pages in use: 23
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 258/276 23/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 4271599 m, 15705 m/sec, 118966292 t fired, .
[lola][.]
[lola][.] Time elapsed: 267 secs. Pages in use: 23
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 263/276 24/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 4351738 m, 16027 m/sec, 121247586 t fired, .
[lola][.]
[lola][.] Time elapsed: 272 secs. Pages in use: 24
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 268/276 24/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 4429350 m, 15522 m/sec, 123482590 t fired, .
[lola][.]
[lola][.] Time elapsed: 277 secs. Pages in use: 24
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 273/276 25/2000 DLCshifumi-PT-4a-CTLFireability-2024-06 4506785 m, 15487 m/sec, 125731160 t fired, .
[lola][.]
[lola][.] Time elapsed: 282 secs. Pages in use: 25
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][W] CANCELED task # 27 (type EXCL) for DLCshifumi-PT-4a-CTLFireability-2024-06 (local timeout)
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 1 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.]
[lola][.] Time elapsed: 287 secs. Pages in use: 25
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I] LAUNCH task # 58 (type EXCL) for 57 DLCshifumi-PT-4a-CTLFireability-2023-15
[lola][I] time limit : 276 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 27 (type EXCL) for 26 DLCshifumi-PT-4a-CTLFireability-2024-06
[lola][I] time limit : 3313 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 58 (type EXCL) for DLCshifumi-PT-4a-CTLFireability-2023-15
[lola][I] result : false
[lola][I] markings : 19
[lola][I] fired transitions : 40
[lola][I] time used : 1
[lola][I] memory pages used : 1
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 4/276 1/5 DLCshifumi-PT-4a-CTLFireability-2024-06 87855 m, -883786 m/sec, 2328236 t fired, .
[lola][.]
[lola][.] Time elapsed: 292 secs. Pages in use: 26
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 9/276 1/5 DLCshifumi-PT-4a-CTLFireability-2024-06 177182 m, 17865 m/sec, 4765004 t fired, .
[lola][.]
[lola][.] Time elapsed: 297 secs. Pages in use: 26
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 14/276 2/5 DLCshifumi-PT-4a-CTLFireability-2024-06 266966 m, 17956 m/sec, 7184456 t fired, .
[lola][.]
[lola][.] Time elapsed: 302 secs. Pages in use: 27
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 19/276 2/5 DLCshifumi-PT-4a-CTLFireability-2024-06 353119 m, 17230 m/sec, 9578249 t fired, .
[lola][.]
[lola][.] Time elapsed: 307 secs. Pages in use: 27
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 24/276 3/5 DLCshifumi-PT-4a-CTLFireability-2024-06 441621 m, 17700 m/sec, 11981926 t fired, .
[lola][.]
[lola][.] Time elapsed: 312 secs. Pages in use: 28
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 29/276 3/5 DLCshifumi-PT-4a-CTLFireability-2024-06 528449 m, 17365 m/sec, 14393037 t fired, .
[lola][.]
[lola][.] Time elapsed: 317 secs. Pages in use: 28
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 34/276 4/5 DLCshifumi-PT-4a-CTLFireability-2024-06 616349 m, 17580 m/sec, 16807324 t fired, .
[lola][.]
[lola][.] Time elapsed: 322 secs. Pages in use: 29
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 39/276 4/5 DLCshifumi-PT-4a-CTLFireability-2024-06 702378 m, 17205 m/sec, 19139643 t fired, .
[lola][.]
[lola][.] Time elapsed: 327 secs. Pages in use: 29
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 44/276 5/5 DLCshifumi-PT-4a-CTLFireability-2024-06 787874 m, 17099 m/sec, 21502533 t fired, .
[lola][.]
[lola][.] Time elapsed: 332 secs. Pages in use: 30
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 27 CTL EXCL 49/276 5/5 DLCshifumi-PT-4a-CTLFireability-2024-06 871165 m, 16658 m/sec, 23844078 t fired, .
[lola][.]
[lola][.] Time elapsed: 337 secs. Pages in use: 30
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I] CANCELED task # 27 (type EXCL) for DLCshifumi-PT-4a-CTLFireability-2024-06 (memory limit exceeded)
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.]
[lola][.] Time elapsed: 342 secs. Pages in use: 30
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I] LAUNCH task # 55 (type EXCL) for 54 DLCshifumi-PT-4a-CTLFireability-2023-14
[lola][I] time limit : 296 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 55 (type EXCL) for DLCshifumi-PT-4a-CTLFireability-2023-14
[lola][I] result : true
[lola][I] markings : 20
[lola][I] fired transitions : 20
[lola][I] time used : 1
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 52 (type EXCL) for 51 DLCshifumi-PT-4a-CTLFireability-2023-13
[lola][I] time limit : 325 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 52 (type EXCL) for DLCshifumi-PT-4a-CTLFireability-2023-13
[lola][I] result : true
[lola][I] markings : 21
[lola][I] fired transitions : 44
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 49 (type EXCL) for 48 DLCshifumi-PT-4a-CTLFireability-2023-12
[lola][I] time limit : 361 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 4/361 3/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 389881 m, 77976 m/sec, 1335363 t fired, .
[lola][.]
[lola][.] Time elapsed: 347 secs. Pages in use: 30
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 9/361 6/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 872290 m, 96481 m/sec, 2840250 t fired, .
[lola][.]
[lola][.] Time elapsed: 352 secs. Pages in use: 31
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 14/361 9/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 1337045 m, 92951 m/sec, 4291042 t fired, .
[lola][.]
[lola][.] Time elapsed: 357 secs. Pages in use: 34
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 19/361 11/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 1760190 m, 84629 m/sec, 5754645 t fired, .
[lola][.]
[lola][.] Time elapsed: 362 secs. Pages in use: 36
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 24/361 14/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 2203787 m, 88719 m/sec, 7209066 t fired, .
[lola][.]
[lola][.] Time elapsed: 367 secs. Pages in use: 39
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 29/361 17/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 2612267 m, 81696 m/sec, 8633583 t fired, .
[lola][.]
[lola][.] Time elapsed: 372 secs. Pages in use: 42
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 34/361 19/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 3044521 m, 86450 m/sec, 10121748 t fired, .
[lola][.]
[lola][.] Time elapsed: 377 secs. Pages in use: 44
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 39/361 22/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 3498896 m, 90875 m/sec, 11592786 t fired, .
[lola][.]
[lola][.] Time elapsed: 382 secs. Pages in use: 47
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 44/361 25/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 3939625 m, 88145 m/sec, 13045129 t fired, .
[lola][.]
[lola][.] Time elapsed: 387 secs. Pages in use: 50
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 49/361 27/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 4361831 m, 84441 m/sec, 14511325 t fired, .
[lola][.]
[lola][.] Time elapsed: 392 secs. Pages in use: 52
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 54/361 30/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 4760213 m, 79676 m/sec, 15980792 t fired, .
[lola][.]
[lola][.] Time elapsed: 397 secs. Pages in use: 55
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 59/361 32/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 5161687 m, 80294 m/sec, 17453008 t fired, .
[lola][.]
[lola][.] Time elapsed: 402 secs. Pages in use: 57
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 64/361 34/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 5574025 m, 82467 m/sec, 18883844 t fired, .
[lola][.]
[lola][.] Time elapsed: 407 secs. Pages in use: 59
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 69/361 37/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 6006668 m, 86528 m/sec, 20356557 t fired, .
[lola][.]
[lola][.] Time elapsed: 412 secs. Pages in use: 62
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 74/361 40/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 6434303 m, 85527 m/sec, 21778231 t fired, .
[lola][.]
[lola][.] Time elapsed: 417 secs. Pages in use: 65
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 79/361 42/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 6871174 m, 87374 m/sec, 23195392 t fired, .
[lola][.]
[lola][.] Time elapsed: 422 secs. Pages in use: 67
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 84/361 45/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 7279513 m, 81667 m/sec, 24621769 t fired, .
[lola][.]
[lola][.] Time elapsed: 427 secs. Pages in use: 70
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 89/361 47/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 7678262 m, 79749 m/sec, 26067123 t fired, .
[lola][.]
[lola][.] Time elapsed: 432 secs. Pages in use: 72
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 94/361 50/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 8115211 m, 87389 m/sec, 27506204 t fired, .
[lola][.]
[lola][.] Time elapsed: 437 secs. Pages in use: 75
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 99/361 52/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 8509806 m, 78919 m/sec, 28972075 t fired, .
[lola][.]
[lola][.] Time elapsed: 442 secs. Pages in use: 77
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 104/361 55/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 8920750 m, 82188 m/sec, 30418504 t fired, .
[lola][.]
[lola][.] Time elapsed: 447 secs. Pages in use: 80
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 109/361 57/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 9342112 m, 84272 m/sec, 31833457 t fired, .
[lola][.]
[lola][.] Time elapsed: 452 secs. Pages in use: 82
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 114/361 60/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 9756194 m, 82816 m/sec, 33258627 t fired, .
[lola][.]
[lola][.] Time elapsed: 457 secs. Pages in use: 85
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 119/361 62/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 10161339 m, 81029 m/sec, 34654403 t fired, .
[lola][.]
[lola][.] Time elapsed: 462 secs. Pages in use: 87
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 124/361 64/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 10541576 m, 76047 m/sec, 36095683 t fired, .
[lola][.]
[lola][.] Time elapsed: 467 secs. Pages in use: 89
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 129/361 67/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 10933133 m, 78311 m/sec, 37536424 t fired, .
[lola][.]
[lola][.] Time elapsed: 472 secs. Pages in use: 92
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 134/361 69/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 11351536 m, 83680 m/sec, 38966967 t fired, .
[lola][.]
[lola][.] Time elapsed: 477 secs. Pages in use: 94
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 139/361 72/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 11743845 m, 78461 m/sec, 40406828 t fired, .
[lola][.]
[lola][.] Time elapsed: 482 secs. Pages in use: 97
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 144/361 74/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 12149436 m, 81118 m/sec, 41826979 t fired, .
[lola][.]
[lola][.] Time elapsed: 487 secs. Pages in use: 99
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 149/361 77/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 12560159 m, 82144 m/sec, 43251395 t fired, .
[lola][.]
[lola][.] Time elapsed: 492 secs. Pages in use: 102
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 154/361 79/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 12960821 m, 80132 m/sec, 44684275 t fired, .
[lola][.]
[lola][.] Time elapsed: 497 secs. Pages in use: 104
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 159/361 81/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 13364131 m, 80662 m/sec, 46115464 t fired, .
[lola][.]
[lola][.] Time elapsed: 502 secs. Pages in use: 106
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 164/361 84/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 13746047 m, 76383 m/sec, 47558391 t fired, .
[lola][.]
[lola][.] Time elapsed: 507 secs. Pages in use: 109
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 169/361 86/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 14174920 m, 85774 m/sec, 48996606 t fired, .
[lola][.]
[lola][.] Time elapsed: 512 secs. Pages in use: 111
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 174/361 89/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 14613448 m, 87705 m/sec, 50441419 t fired, .
[lola][.]
[lola][.] Time elapsed: 517 secs. Pages in use: 114
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 179/361 91/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 15009008 m, 79112 m/sec, 51894432 t fired, .
[lola][.]
[lola][.] Time elapsed: 522 secs. Pages in use: 116
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 185/361 93/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 15367274 m, 71653 m/sec, 53275222 t fired, .
[lola][.]
[lola][.] Time elapsed: 528 secs. Pages in use: 118
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-04: DISJ true state space
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-05: DISJ true findpath
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-11: DISJ true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-15: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-06: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCshifumi-PT-4a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 CTL EXCL 192/361 94/2000 DLCshifumi-PT-4a-CTLFireability-2023-12 15452403 m, 17025 m/sec, 53592670 t fired, .
[lola][.]
[lola][.] Time elapsed: 535 secs. Pages in use: 119
[lola][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 411 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCshifumi-PT-4a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is DLCshifumi-PT-4a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r115-smll-171624276800322"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCshifumi-PT-4a.tgz
mv DLCshifumi-PT-4a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;