MCC'2024- Execution of r115-smll-171624276700284

About the Execution of LoLA for DLCround-PT-13b

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
6623.195	3600000.00	1131000.00	11111.00	?F??????F????FF?	normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r115-smll-171624276700284.qcow2',
Waiting for the VM to be ready (probing ssh)
.......................................................
.................................
.......................................................
=======================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is DLCround-PT-13b, examination is LTLFireabi
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r115-smll-171624276700284
================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.6M
-rw-r--r-- 1 mcc users 6.2K May 14 13:22 CTLCardinality
-rw-r--r-- 1 mcc users 64K May 14 13:22 CTLCardinality
-rw-r--r-- 1 mcc users 6.1K May 14 13:22 CTLFireability
-rw-r--r-- 1 mcc users 58K May 14 13:22 CTLFireability
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropert
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropert
-rw-r--r-- 1 mcc users 3.5K Apr 22 14:38 LTLCardinality
-rw-r--r-- 1 mcc users 24K Apr 22 14:38 LTLCardinality
-rw-r--r-- 1 mcc users 2.1K Apr 22 14:38 LTLFireability
-rw-r--r-- 1 mcc users 15K Apr 22 14:38 LTLFireability
-rw-r--r-- 1 mcc users 16K Apr 13 12:15 ReachabilityCa
-rw-r--r-- 1 mcc users 175K Apr 13 12:15 ReachabilityCa
-rw-r--r-- 1 mcc users 4.7K Apr 13 12:14 ReachabilityFi
-rw-r--r-- 1 mcc users 32K Apr 13 12:14 ReachabilityFi
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:38 UpperBounds.tx
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:38 UpperBounds.xm
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 2.1M May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from
FORMULA_NAME DLCround-PT-13b-LTLFireability-00
FORMULA_NAME DLCround-PT-13b-LTLFireability-01
FORMULA_NAME DLCround-PT-13b-LTLFireability-02
FORMULA_NAME DLCround-PT-13b-LTLFireability-03
FORMULA_NAME DLCround-PT-13b-LTLFireability-04
FORMULA_NAME DLCround-PT-13b-LTLFireability-05
FORMULA_NAME DLCround-PT-13b-LTLFireability-06
FORMULA_NAME DLCround-PT-13b-LTLFireability-07
FORMULA_NAME DLCround-PT-13b-LTLFireability-08
FORMULA_NAME DLCround-PT-13b-LTLFireability-09
FORMULA_NAME DLCround-PT-13b-LTLFireability-10
FORMULA_NAME DLCround-PT-13b-LTLFireability-11
FORMULA_NAME DLCround-PT-13b-LTLFireability-12
FORMULA_NAME DLCround-PT-13b-LTLFireability-13
FORMULA_NAME DLCround-PT-13b-LTLFireability-14
FORMULA_NAME DLCround-PT-13b-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1717110769004

FORMULA DLCround-PT-13b-LTLFireability-13
FORMULA DLCround-PT-13b-LTLFireability-08
FORMULA DLCround-PT-13b-LTLFireability-14
FORMULA DLCround-PT-13b-LTLFireability-01

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

[[35mlola[0m][I] LoLA will run for 3600 seconds
[[35mlola[0m][W] [1m[33munknown unit in memory
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmln
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition
[[35mlola[0m][I] closed [1m[34mnet[0m file
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlfo
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-00:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-01:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-02:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-03:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-04:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-05:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-06:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-07:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-08:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-09:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-10:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-11:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-12: INITIAL
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-13:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-14:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 27 secs.
[[35mlola[0m][.] # running tasks: 0 of 4.
[[35mlola[0m][I] LAUNCH task # 62 (type CNST)
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 62 (type
[[35mlola[0m][I] result : false
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-13:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-00:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-01:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-02:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-03:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-04:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-05:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-06:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-07:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-08:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-09:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-10:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-11:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-12: INITIAL
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-14:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 32 secs.
[[35mlola[0m][.] # running tasks: 0 of 4.
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-13:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-00:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-01:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-02:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-03:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-04:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-05:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-06:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-07:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-08:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-09:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-10:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-11:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-12: INITIAL
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-14:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 37 secs.
[[35mlola[0m][.] # running tasks: 0 of 4.
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-13:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-00:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-01:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-02:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-03:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-04:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-05:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-06:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-07:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-08:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-09:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-10:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-11:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-12: INITIAL
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-14:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 42 secs.
[[35mlola[0m][.] # running tasks: 0 of 4.
[[35mlola[0m][I] LAUNCH task # 51 (type EXCL)
[[35mlola[0m][I] time limit : 136 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 79 (type FNDP)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 81 (type EQUN)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 85 (type EQUN)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 79 (type
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][W] CANCELED task # 81 (type
[[35mlola[0m][I] LAUNCH task # 87 (type FNDP)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 88 (type FNDP)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 88 (type
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] LAUNCH task # 89 (type EQUN)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 87 (type
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][W] CANCELED task # 89 (type
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-01:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-08:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-13:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-14:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-00:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-02:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-03:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-04:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-05:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-06:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-07:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-09:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-10:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-11:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-12: INITIAL
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.] 51 LTL EXCL 0/187
[[35mlola[0m][.] 85 EF STEQ 0/3553
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 47 secs.
[[35mlola[0m][.] # running tasks: 2 of 4.
[*** LOG ERROR #0001 ***] [2024-05-30 23:13:37]
[[35mlola[0m][I] FINISHED task # 81 (type
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 85 (type
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 89 (type
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] LAUNCH task # 57 (type CNST)
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 57 (type
[[35mlola[0m][I] result : false
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-01:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-08:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-12:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-13:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-14:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-00:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-02:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-03:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-04:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-05:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-06:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-07:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-09:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-10:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-11:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.] 51 LTL EXCL 5/236
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 52 secs.
[[35mlola[0m][.] # running tasks: 1 of 4.
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-01:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-08:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-12:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-13:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-14:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-00:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-02:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-03:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-04:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-05:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-06:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-07:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-09:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-10:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-11:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.] 51 LTL EXCL 10/253
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 57 secs.
[[35mlola[0m][.] # running tasks: 1 of 4.
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-01:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-08:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-12:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-13:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-14:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-00:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-02:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-03:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-04:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-05:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-06:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-07:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-09:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-10:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-11:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.] 51 LTL EXCL 15/253
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 62 secs.
[[35mlola[0m][.] # running tasks: 1 of 4.
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-01:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-08:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-12:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-13:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-14:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-00:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-02:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-03:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-04:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-05:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-06:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-07:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-09:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-10:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-11:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.] 51 LTL EXCL 20/253
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 67 secs.
[[35mlola[0m][.] # running tasks: 1 of 4.
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-01:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-08:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-12:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-13:
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[[35mlola[0m][I] LAUNCH task # 74 (type EXCL)
[[35mlola[0m][I] time limit : 253 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 51 (type EXCL)
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[[35mlola[0m][I] FINISHED task # 74 (type
[[35mlola[0m][I] result : false
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[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-11:
[[35mlola[0m][.]
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[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-01:
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[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-00:
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[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-01:
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[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-00:
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[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-11:
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[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-01:
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[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-00:
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[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-01:
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[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-00:
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[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-01:
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[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-00:
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[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-11:
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[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-00:
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[[35mlola[0m][.]
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[[35mlola[0m][.] # running tasks: 1 of 4.
[[35mlola[0m][I] CANCELED task # 51 (type
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-01:
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[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 367 secs.
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[[35mlola[0m][I] LAUNCH task # 34 (type EXCL)
[[35mlola[0m][I] time limit : 293 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 34 (type
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings :
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[[35mlola[0m][I] time used :
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[[35mlola[0m][I] LAUNCH task # 25 (type EXCL)
[[35mlola[0m][I] time limit : 323 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 25 (type
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings :
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[[35mlola[0m][I] time used :
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[[35mlola[0m][I] LAUNCH task # 22 (type EXCL)
[[35mlola[0m][I] time limit : 359 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 22 (type
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings :
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[[35mlola[0m][I] LAUNCH task # 15 (type EXCL)
[[35mlola[0m][I] time limit : 461 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-01:
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[[35mlola[0m][.] DLCround-PT-13b-LTLFireability-11:
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[[35mlola[0m][.]
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[[35mlola[0m][.] [1m PENDING FORMULAS:
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[[35mlola[0m][I] CANCELED task # 15 (type
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[[35mlola[0m][.] [1m[31mDLCround-PT-13b-LTLFireability-01:
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[[35mlola[0m][I] result : false
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[[35mlola[0m][I] LAUNCH task # 77 (type EXCL)
[[35mlola[0m][I] time limit : 681 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 77 (type
[[35mlola[0m][I] result : false
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[[35mlola[0m][I] LAUNCH task # 48 (type EXCL)
[[35mlola[0m][I] time limit : 908 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA:
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============== lity ===================== .txt .xml .txt .xml iesDefinition.xml iesVerdict.xml .txt .xml .txt .xml rdinality.txt rdinality.xml reability.txt reability.xml t l (invocation template) text file) FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT at most ([1m[36m--timelimit[0m) specification: using default[0m from [4m[34mmodel.pnml[0m et[0m) net [4m[34mmodel.pnml[0m rmula[0m) from [4m[34mLTLFireability.xml[0m places removed CATEGORY VALUE PRODUCED BY[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 0 0 0 2 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 0 0 0 0 CONJ 0 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Pages in use: 133 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 2 0 0 2 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 112/2000 DLCround-PT-13b-LTLFireability-02 10928081 m, 31182 m/sec, 14068195 t fired, . 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Pages in use: 136 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 2 0 0 2 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 115/2000 DLCround-PT-13b-LTLFireability-02 11238304 m, 31052 m/sec, 14475293 t fired, . Pages in use: 138 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 2 0 0 2 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 116/2000 DLCround-PT-13b-LTLFireability-02 11394500 m, 31239 m/sec, 14678113 t fired, . Pages in use: 139 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 2 0 0 2 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 118/2000 DLCround-PT-13b-LTLFireability-02 11551611 m, 31422 m/sec, 14880347 t fired, . Pages in use: 141 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 2 0 0 2 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 120/2000 DLCround-PT-13b-LTLFireability-02 11707286 m, 31135 m/sec, 15081726 t fired, . Pages in use: 143 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 2 0 0 2 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 121/2000 DLCround-PT-13b-LTLFireability-02 11862186 m, 30980 m/sec, 15282425 t fired, . Pages in use: 144 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 2 0 0 2 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 122/2000 DLCround-PT-13b-LTLFireability-02 12019256 m, 31414 m/sec, 15483847 t fired, . Pages in use: 145 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 2 0 0 2 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 124/2000 DLCround-PT-13b-LTLFireability-02 12175383 m, 31225 m/sec, 15686273 t fired, . Pages in use: 147 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 2 0 0 2 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 125/2000 DLCround-PT-13b-LTLFireability-02 12330575 m, 31038 m/sec, 15888010 t fired, . Pages in use: 148 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 2 0 0 2 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 127/2000 DLCround-PT-13b-LTLFireability-02 12486956 m, 31276 m/sec, 16089342 t fired, . Pages in use: 150 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 2 0 0 2 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 128/2000 DLCround-PT-13b-LTLFireability-02 12641113 m, 30831 m/sec, 16291686 t fired, . Pages in use: 151 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 2 0 0 2 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 130/2000 DLCround-PT-13b-LTLFireability-02 12795549 m, 30887 m/sec, 16492814 t fired, . Pages in use: 153 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 2 0 0 2 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 131/2000 DLCround-PT-13b-LTLFireability-02 12950399 m, 30970 m/sec, 16694229 t fired, . Pages in use: 154 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 2 0 0 2 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 133/2000 DLCround-PT-13b-LTLFireability-02 13106282 m, 31176 m/sec, 16897179 t fired, . Pages in use: 156 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 2 0 0 2 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 134/2000 DLCround-PT-13b-LTLFireability-02 13261468 m, 31037 m/sec, 17099680 t fired, . Pages in use: 157 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 2 0 0 2 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 136/2000 DLCround-PT-13b-LTLFireability-02 13415217 m, 30749 m/sec, 17301621 t fired, . Pages in use: 159 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 2 0 0 2 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 138/2000 DLCround-PT-13b-LTLFireability-02 13571590 m, 31274 m/sec, 17504799 t fired, . Pages in use: 161 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 2 0 0 2 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 140/2000 DLCround-PT-13b-LTLFireability-02 13731951 m, 32072 m/sec, 17711084 t fired, . Pages in use: 163 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 2 0 0 2 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 142/2000 DLCround-PT-13b-LTLFireability-02 13891584 m, 31926 m/sec, 17916491 t fired, . Pages in use: 165 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 2 0 0 2 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 144/2000 DLCround-PT-13b-LTLFireability-02 14050695 m, 31822 m/sec, 18119785 t fired, . Pages in use: 167 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 2 0 0 2 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 146/2000 DLCround-PT-13b-LTLFireability-02 14208911 m, 31643 m/sec, 18322134 t fired, . Pages in use: 169 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 2 0 0 2 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 147/2000 DLCround-PT-13b-LTLFireability-02 14367272 m, 31672 m/sec, 18525138 t fired, . Pages in use: 170 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 2 0 0 2 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 149/2000 DLCround-PT-13b-LTLFireability-02 14525333 m, 31612 m/sec, 18729551 t fired, . Pages in use: 172 Visible: 16 EXCL) for DLCround-PT-13b-LTLFireability-02 (local timeout) CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 2 0 0 2 0 0 0 LTL 0 0 0 0 1 1 0 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 174 Visible: 16 for 0 DLCround-PT-13b-LTLFireability-00 for 14 DLCround-PT-13b-LTLFireability-02 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 1 1 0 2 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 3/2000 DLCround-PT-13b-LTLFireability-00 158693 m, 31738 m/sec, 200396 t fired, . 3/5 DLCround-PT-13b-LTLFireability-02 158258 m, -2873415 m/sec, 199847 t fired, . Pages in use: 180 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 1 1 0 2 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 5/2000 DLCround-PT-13b-LTLFireability-00 321875 m, 32636 m/sec, 408360 t fired, . 5/5 DLCround-PT-13b-LTLFireability-02 320650 m, 32478 m/sec, 406780 t fired, . Pages in use: 184 Visible: 16 EXCL) for DLCround-PT-13b-LTLFireability-02 (memory limit exceeded) CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 1 1 0 2 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 6/2000 DLCround-PT-13b-LTLFireability-00 485555 m, 32736 m/sec, 617516 t fired, . Pages in use: 185 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 1 1 0 2 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 9/2000 DLCround-PT-13b-LTLFireability-00 649586 m, 32806 m/sec, 828394 t fired, . Pages in use: 185 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 1 1 0 2 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 10/2000 DLCround-PT-13b-LTLFireability-00 813312 m, 32745 m/sec, 1037211 t fired, . Pages in use: 185 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 1 1 0 2 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 12/2000 DLCround-PT-13b-LTLFireability-00 975781 m, 32493 m/sec, 1246910 t fired, . Pages in use: 186 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 1 1 0 2 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 14/2000 DLCround-PT-13b-LTLFireability-00 1138351 m, 32514 m/sec, 1455111 t fired, . Pages in use: 188 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CONJ 0 1 1 0 2 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 F 0 1 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 16/2000 DLCround-PT-13b-LTLFireability-00 1300138 m, 32357 m/sec, 1663840 t fired, . Pages in use: 190 Visible: 16 for DLCround-PT-13b-LTLFireability-00 1364516 1746089 42 16 for 30 DLCround-PT-13b-LTLFireability-06 EXCL) for DLCround-PT-13b-LTLFireability-06 1 0 1 for 47 DLCround-PT-13b-LTLFireability-09 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m F true state space / EG[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCround-PT-13b-LTLFireability-09 2661 m, 532 m/sec, 5623 t fired, . Pages in use: 190 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m F true state space / EG[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCround-PT-13b-LTLFireability-09 6926 m, 853 m/sec, 15548 t fired, . Pages in use: 190 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m F true state space / EG[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCround-PT-13b-LTLFireability-09 11417 m, 898 m/sec, 26052 t fired, . Pages in use: 190 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m F true state space / EG[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCround-PT-13b-LTLFireability-09 15685 m, 853 m/sec, 36181 t fired, . Pages in use: 190 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m F true state space / EG[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCround-PT-13b-LTLFireability-09 19778 m, 818 m/sec, 45335 t fired, . Pages in use: 190 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m F true state space / EG[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCround-PT-13b-LTLFireability-09 24063 m, 857 m/sec, 55254 t fired, . Pages in use: 190 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m F true state space / EG[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCround-PT-13b-LTLFireability-09 28502 m, 887 m/sec, 65782 t fired, . Pages in use: 190 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m F true state space / EG[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCround-PT-13b-LTLFireability-09 32868 m, 873 m/sec, 75751 t fired, . Pages in use: 190 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m F true state space / EG[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCround-PT-13b-LTLFireability-09 37341 m, 894 m/sec, 86243 t fired, . Pages in use: 190 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m F true state space / EG[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCround-PT-13b-LTLFireability-09 42071 m, 946 m/sec, 97589 t fired, . Pages in use: 190 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m F true state space / EG[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCround-PT-13b-LTLFireability-09 44314 m, 448 m/sec, 102281 t fired, . Pages in use: 190 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m F true state space / EG[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCround-PT-13b-LTLFireability-09 46851 m, 507 m/sec, 108309 t fired, . Pages in use: 190 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m F true state space / EG[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCround-PT-13b-LTLFireability-09 48984 m, 426 m/sec, 113121 t fired, . Pages in use: 190 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m F true state space / EG[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCround-PT-13b-LTLFireability-09 51312 m, 465 m/sec, 118480 t fired, . Pages in use: 190 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m F true state space / EG[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCround-PT-13b-LTLFireability-09 53933 m, 524 m/sec, 124714 t fired, . Pages in use: 190 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m F true state space / EG[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCround-PT-13b-LTLFireability-09 56824 m, 578 m/sec, 131809 t fired, . Pages in use: 190 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m F true state space / EG[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCround-PT-13b-LTLFireability-09 59376 m, 510 m/sec, 137905 t fired, . Pages in use: 190 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m F true state space / EG[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCround-PT-13b-LTLFireability-09 61842 m, 493 m/sec, 143751 t fired, . Pages in use: 190 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m F true state space / EG[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCround-PT-13b-LTLFireability-09 64130 m, 457 m/sec, 148822 t fired, . Pages in use: 190 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m F true state space / EG[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCround-PT-13b-LTLFireability-09 66540 m, 482 m/sec, 154459 t fired, . Pages in use: 190 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m F true state space / EG[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCround-PT-13b-LTLFireability-09 69150 m, 522 m/sec, 160663 t fired, . Pages in use: 190 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m F true state space / EG[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCround-PT-13b-LTLFireability-09 71363 m, 442 m/sec, 165690 t fired, . Pages in use: 190 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m F true state space / EG[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCround-PT-13b-LTLFireability-09 73794 m, 486 m/sec, 171361 t fired, . Pages in use: 190 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m F true state space / EG[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCround-PT-13b-LTLFireability-09 76119 m, 465 m/sec, 176803 t fired, . Pages in use: 190 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false findpath[0m CONJ false LTL model checker[0m LTL true LTL model checker[0m F true state space / EG[0m LTL false LTL model checker[0m CONJ false findpath[0m INITIAL false preprocessing[0m CONJ false preprocessing[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCround-PT-13b-LTLFireability-09 78641 m, 504 m/sec, 182815 t fired, . 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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-13b"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is DLCround-PT-13b, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r115-smll-171624276700284"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-13b.tgz
mv DLCround-PT-13b execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;