MCC'2024- Execution of r115-smll-171624276700268

About the Execution of LoLA for DLCround-PT-12b

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
15196.348	1398970.00	1493009.00	5021.90	FFFFFFF?F?FFF?FF	normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r115-smll-171624276700268.qcow2',
Waiting for the VM to be ready (probing ssh)
.......................................................
=================================
Generated by BenchKit 2-5568
Executing tool lola
Input is DLCround-PT-12b, examination is LTLFireabi
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r115-smll-171624276700268
=======================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.3M
-rw-r--r-- 1 mcc users 6.6K May 14 13:22 CTLCardinality
-rw-r--r-- 1 mcc users 68K May 14 13:22 CTLCardinality
-rw-r--r-- 1 mcc users 6.1K May 14 13:22 CTLFireability
-rw-r--r-- 1 mcc users 56K May 14 13:22 CTLFireability
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropert
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropert
-rw-r--r-- 1 mcc users 3.3K Apr 22 14:38 LTLCardinality
-rw-r--r-- 1 mcc users 22K Apr 22 14:38 LTLCardinality
-rw-r--r-- 1 mcc users 2.1K May 19 07:16 LTLFireability
-rw-r--r-- 1 mcc users 18K May 19 18:11 LTLFireability
-rw-r--r-- 1 mcc users 7.5K Apr 13 12:12 ReachabilityCa
-rw-r--r-- 1 mcc users 70K Apr 13 12:12 ReachabilityCa
-rw-r--r-- 1 mcc users 9.5K Apr 13 12:12 ReachabilityFi
-rw-r--r-- 1 mcc users 82K Apr 13 12:12 ReachabilityFi
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:38 UpperBounds.tx
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:38 UpperBounds.xm
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 1.9M May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from
FORMULA_NAME DLCround-PT-12b-LTLFireability-00
FORMULA_NAME DLCround-PT-12b-LTLFireability-01
FORMULA_NAME DLCround-PT-12b-LTLFireability-02
FORMULA_NAME DLCround-PT-12b-LTLFireability-03
FORMULA_NAME DLCround-PT-12b-LTLFireability-04
FORMULA_NAME DLCround-PT-12b-LTLFireability-05
FORMULA_NAME DLCround-PT-12b-LTLFireability-06
FORMULA_NAME DLCround-PT-12b-LTLFireability-07
FORMULA_NAME DLCround-PT-12b-LTLFireability-08
FORMULA_NAME DLCround-PT-12b-LTLFireability-09
FORMULA_NAME DLCround-PT-12b-LTLFireability-10
FORMULA_NAME DLCround-PT-12b-LTLFireability-11
FORMULA_NAME DLCround-PT-12b-LTLFireability-12
FORMULA_NAME DLCround-PT-12b-LTLFireability-13
FORMULA_NAME DLCround-PT-12b-LTLFireability-14
FORMULA_NAME DLCround-PT-12b-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1717103080448

FORMULA DLCround-PT-12b-LTLFireability-11
FORMULA DLCround-PT-12b-LTLFireability-04
FORMULA DLCround-PT-12b-LTLFireability-08
FORMULA DLCround-PT-12b-LTLFireability-06
FORMULA DLCround-PT-12b-LTLFireability-14
FORMULA DLCround-PT-12b-LTLFireability-02
FORMULA DLCround-PT-12b-LTLFireability-10
FORMULA DLCround-PT-12b-LTLFireability-12
FORMULA DLCround-PT-12b-LTLFireability-15
FORMULA DLCround-PT-12b-LTLFireability-05
FORMULA DLCround-PT-12b-LTLFireability-03
FORMULA DLCround-PT-12b-LTLFireability-01
FORMULA DLCround-PT-12b-LTLFireability-00
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY
[[35mlola[0m] [1m[31mDLCround-PT-12b-LTLFireability-00:
[[35mlola[0m] [1m[31mDLCround-PT-12b-LTLFireability-01:
[[35mlola[0m] [1m[31mDLCround-PT-12b-LTLFireability-02:
[[35mlola[0m] [1m[31mDLCround-PT-12b-LTLFireability-03:
[[35mlola[0m] [1m[31mDLCround-PT-12b-LTLFireability-04:
[[35mlola[0m] [1m[31mDLCround-PT-12b-LTLFireability-05:
[[35mlola[0m] [1m[31mDLCround-PT-12b-LTLFireability-06:
[[35mlola[0m] [1m[33mDLCround-PT-12b-LTLFireability-07:
[[35mlola[0m] [1m[31mDLCround-PT-12b-LTLFireability-08:
[[35mlola[0m] [1m[33mDLCround-PT-12b-LTLFireability-09:
[[35mlola[0m] [1m[31mDLCround-PT-12b-LTLFireability-10:
[[35mlola[0m] [1m[31mDLCround-PT-12b-LTLFireability-11:
[[35mlola[0m] [1m[31mDLCround-PT-12b-LTLFireability-12:
[[35mlola[0m] [1m[33mDLCround-PT-12b-LTLFireability-13:
[[35mlola[0m] [1m[31mDLCround-PT-12b-LTLFireability-14:
[[35mlola[0m] [1m[31mDLCround-PT-12b-LTLFireability-15:
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 1398 secs. Pages

BK_STOP 1717104479418

--------------------
content from stderr:

[[35mlola[0m][I] LoLA will run for 3600 seconds
[[35mlola[0m][W] [1m[33munknown unit in memory
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmln
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition
[[35mlola[0m][I] closed [1m[34mnet[0m file
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlfo
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-00:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-01:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-02:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-03:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-04:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-05:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-06:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-07:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-08:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-09:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-10:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-11:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-12:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-13:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-14:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 18 secs.
[[35mlola[0m][.] # running tasks: 0 of 4.
[[35mlola[0m][I] Rule S: 0 transitions removed,0
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-00:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-01:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-02:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-03:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-04:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-05:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-06:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-07:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-08:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-09:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-10:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-11:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-12:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-13:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-14:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 23 secs.
[[35mlola[0m][.] # running tasks: 0 of 4.
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-00:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-01:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-02:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-03:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-04:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-05:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-06:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-07:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-08:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-09:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-10:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-11:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-12:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-13:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-14:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 28 secs.
[[35mlola[0m][.] # running tasks: 0 of 4.
[[35mlola[0m][I] LAUNCH task # 38 (type EXCL)
[[35mlola[0m][I] time limit : 198 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 38 (type
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] LAUNCH task # 17 (type EXCL)
[[35mlola[0m][I] time limit : 210 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 17 (type
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] LAUNCH task # 29 (type EXCL)
[[35mlola[0m][I] time limit : 223 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 29 (type
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] LAUNCH task # 23 (type EXCL)
[[35mlola[0m][I] time limit : 238 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 23 (type
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] LAUNCH task # 59 (type EXCL)
[[35mlola[0m][I] time limit : 255 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 57 (type FNDP)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 58 (type EQUN)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 57 (type
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][W] CANCELED task # 58 (type
[[35mlola[0m][W] CANCELED task # 59 (type
[[35mlola[0m][I] FINISHED task # 59 (type
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] FINISHED task # 58 (type
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-04:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-06:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-08:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-11:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-14:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-00:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-01:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-02:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-03:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-05:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-07:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-09:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-10:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-12:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-13:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 33 secs.
[[35mlola[0m][.] # running tasks: 0 of 4.
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-04:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-06:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-08:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-11:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-14:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-00:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-01:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-02:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-03:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-05:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-07:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-09:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-10:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-12:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-13:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 38 secs.
[[35mlola[0m][.] # running tasks: 0 of 4.
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-04:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-06:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-08:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-11:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-14:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-00:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-01:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-02:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-03:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-05:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-07:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-09:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-10:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-12:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-13:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 43 secs.
[[35mlola[0m][.] # running tasks: 0 of 4.
[[35mlola[0m][I] LAUNCH task # 7 (type EXCL)
[[35mlola[0m][I] time limit : 273 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 7 (type EXCL)
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] LAUNCH task # 35 (type EXCL)
[[35mlola[0m][I] time limit : 296 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 35 (type
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] LAUNCH task # 41 (type EXCL)
[[35mlola[0m][I] time limit : 323 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 41 (type
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] LAUNCH task # 54 (type EXCL)
[[35mlola[0m][I] time limit : 355 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 54 (type
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] LAUNCH task # 32 (type EXCL)
[[35mlola[0m][I] time limit : 444 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-02:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-04:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-06:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-08:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-10:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-11:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-12:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-14:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-00:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-01:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-03:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-05:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-07:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-09:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-13:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.] 32 LTL EXCL 3/444
[[35mlola[0m][.]
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[[35mlola[0m][I] LAUNCH task # 32 (type EXCL)
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[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-03:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-05:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-07:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-09:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-13:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.] 26 LTL EXCL 440/443
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1378 secs.
[[35mlola[0m][.] # running tasks: 1 of 4.
[[35mlola[0m][W] CANCELED task # 26 (type
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-02:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-04:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-06:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-08:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-10:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-11:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-12:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-14:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-00:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-01:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-03:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-05:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-07:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-09:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-13:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1383 secs.
[[35mlola[0m][.] # running tasks: 1 of 4.
[[35mlola[0m][I] LAUNCH task # 20 (type EXCL)
[[35mlola[0m][I] time limit : 443 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 26 (type EXCL)
[[35mlola[0m][I] time limit : 2217 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 20 (type
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-02:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-04:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-05:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-06:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-08:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-10:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-11:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-12:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-14:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-00:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-01:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-03:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-07:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-09:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-13:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.] 26 LTL EXCL 5/443
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1388 secs.
[[35mlola[0m][.] # running tasks: 1 of 4.
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-02:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-04:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-05:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-06:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-08:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-10:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-11:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-12:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-14:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-00:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-01:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-03:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-07:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-09:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-13:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.] 26 LTL EXCL 10/443
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1393 secs.
[[35mlola[0m][.] # running tasks: 1 of 4.
[[35mlola[0m][I] CANCELED task # 26 (type
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-02:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-04:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-05:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-06:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-08:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-10:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-11:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-12:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-14:
[[35mlola[0m][.] [1m[31mDLCround-PT-12b-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-00:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-01:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-03:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-07:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-09:
[[35mlola[0m][.] DLCround-PT-12b-LTLFireability-13:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1398 secs.
[[35mlola[0m][.] # running tasks: 1 of 4.
[[35mlola[0m][I] LAUNCH task # 14 (type EXCL)
[[35mlola[0m][I] time limit : 550 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 14 (type
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL)
[[35mlola[0m][I] time limit : 1101 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 4 (type EXCL)
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL)
[[35mlola[0m][I] time limit : 2202 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 1 (type EXCL)
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] Portfolio finished: no open
fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................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........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................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................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................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........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................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==================================== lity ============== .txt .xml .txt .xml iesDefinition.xml iesVerdict.xml .txt .xml .txt .xml rdinality.txt rdinality.xml reability.txt reability.xml t l (invocation template) text file) FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m CONJ false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL unknown AGGR[0m LTL false LTL model checker[0m LTL unknown AGGR[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL unknown AGGR[0m AG false findpath[0m CONJ false LTL model checker[0m in use: 450 at most ([1m[36m--timelimit[0m) specification: using default[0m from [4m[34mmodel.pnml[0m et[0m) net [4m[34mmodel.pnml[0m rmula[0m) from [4m[34mLTLFireability.xml[0m CATEGORY VALUE PRODUCED BY[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 0 0 0 0 LTL 0 0 0 0 0 0 0 0 LTL 0 0 0 0 0 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 0 0 0 0 LTL 0 0 0 0 0 0 0 0 LTL 0 0 0 0 0 0 0 0 AG 0 0 0 0 0 0 0 0 CONJ 0 0 0 0 0 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 0 Visible: 16 places removed CATEGORY VALUE PRODUCED BY[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 AG 0 0 0 0 0 0 0 0 CONJ 0 0 0 0 0 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 0 Visible: 16 CATEGORY VALUE PRODUCED BY[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 AG 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 0 Visible: 16 for 37 DLCround-PT-12b-LTLFireability-11 EXCL) for DLCround-PT-12b-LTLFireability-11 263 263 0 1 for 16 DLCround-PT-12b-LTLFireability-04 EXCL) for DLCround-PT-12b-LTLFireability-04 260 260 0 1 for 28 DLCround-PT-12b-LTLFireability-08 EXCL) for DLCround-PT-12b-LTLFireability-08 260 260 0 1 for 22 DLCround-PT-12b-LTLFireability-06 EXCL) for DLCround-PT-12b-LTLFireability-06 116 116 0 1 for 46 DLCround-PT-12b-LTLFireability-14 for 46 DLCround-PT-12b-LTLFireability-14 for 46 DLCround-PT-12b-LTLFireability-14 FNDP) for DLCround-PT-12b-LTLFireability-14 1 0 0 EQUN) for DLCround-PT-12b-LTLFireability-14 (obsolete) EXCL) for DLCround-PT-12b-LTLFireability-14 (obsolete) EXCL) for DLCround-PT-12b-LTLFireability-14 0 1 EQUN) for DLCround-PT-12b-LTLFireability-14 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 1 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 1 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 1 Visible: 16 for 6 DLCround-PT-12b-LTLFireability-02 for DLCround-PT-12b-LTLFireability-02 135 135 0 1 for 34 DLCround-PT-12b-LTLFireability-10 EXCL) for DLCround-PT-12b-LTLFireability-10 135 135 0 1 for 40 DLCround-PT-12b-LTLFireability-12 EXCL) for DLCround-PT-12b-LTLFireability-12 135 135 0 1 for 49 DLCround-PT-12b-LTLFireability-15 EXCL) for DLCround-PT-12b-LTLFireability-15 135 135 0 1 for 31 DLCround-PT-12b-LTLFireability-09 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCround-PT-12b-LTLFireability-09 67392 m, 13478 m/sec, 71467 t fired, . Pages in use: 1 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 3/2000 DLCround-PT-12b-LTLFireability-09 259052 m, 38332 m/sec, 275836 t fired, . Pages in use: 3 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 5/2000 DLCround-PT-12b-LTLFireability-09 455514 m, 39292 m/sec, 487919 t fired, . Pages in use: 5 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 7/2000 DLCround-PT-12b-LTLFireability-09 647493 m, 38395 m/sec, 701370 t fired, . Pages in use: 7 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 9/2000 DLCround-PT-12b-LTLFireability-09 841864 m, 38874 m/sec, 915610 t fired, . Pages in use: 9 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 11/2000 DLCround-PT-12b-LTLFireability-09 1032701 m, 38167 m/sec, 1131122 t fired, . Pages in use: 11 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 13/2000 DLCround-PT-12b-LTLFireability-09 1229299 m, 39319 m/sec, 1343467 t fired, . Pages in use: 13 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 14/2000 DLCround-PT-12b-LTLFireability-09 1415644 m, 37269 m/sec, 1555431 t fired, . Pages in use: 14 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 16/2000 DLCround-PT-12b-LTLFireability-09 1592484 m, 35368 m/sec, 1770534 t fired, . Pages in use: 16 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 18/2000 DLCround-PT-12b-LTLFireability-09 1770684 m, 35640 m/sec, 1977182 t fired, . Pages in use: 18 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 19/2000 DLCround-PT-12b-LTLFireability-09 1949236 m, 35710 m/sec, 2185540 t fired, . Pages in use: 19 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 21/2000 DLCround-PT-12b-LTLFireability-09 2126444 m, 35441 m/sec, 2392658 t fired, . Pages in use: 21 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 23/2000 DLCround-PT-12b-LTLFireability-09 2300759 m, 34863 m/sec, 2601358 t fired, . Pages in use: 23 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 24/2000 DLCround-PT-12b-LTLFireability-09 2475889 m, 35026 m/sec, 2811610 t fired, . Pages in use: 24 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 26/2000 DLCround-PT-12b-LTLFireability-09 2650222 m, 34866 m/sec, 3020030 t fired, . Pages in use: 26 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 28/2000 DLCround-PT-12b-LTLFireability-09 2824067 m, 34769 m/sec, 3229030 t fired, . Pages in use: 28 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 29/2000 DLCround-PT-12b-LTLFireability-09 2999512 m, 35089 m/sec, 3437753 t fired, . Pages in use: 29 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 31/2000 DLCround-PT-12b-LTLFireability-09 3176341 m, 35365 m/sec, 3645116 t fired, . Pages in use: 31 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 33/2000 DLCround-PT-12b-LTLFireability-09 3349155 m, 34562 m/sec, 3855203 t fired, . Pages in use: 33 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 34/2000 DLCround-PT-12b-LTLFireability-09 3524286 m, 35026 m/sec, 4061460 t fired, . Pages in use: 34 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 36/2000 DLCround-PT-12b-LTLFireability-09 3694935 m, 34129 m/sec, 4271351 t fired, . Pages in use: 36 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 38/2000 DLCround-PT-12b-LTLFireability-09 3867332 m, 34479 m/sec, 4481241 t fired, . Pages in use: 38 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 39/2000 DLCround-PT-12b-LTLFireability-09 4043263 m, 35186 m/sec, 4688788 t fired, . Pages in use: 39 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 41/2000 DLCround-PT-12b-LTLFireability-09 4216824 m, 34712 m/sec, 4897170 t fired, . Pages in use: 41 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 43/2000 DLCround-PT-12b-LTLFireability-09 4385764 m, 33788 m/sec, 5110411 t fired, . Pages in use: 43 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 44/2000 DLCround-PT-12b-LTLFireability-09 4559155 m, 34678 m/sec, 5321942 t fired, . Pages in use: 44 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 46/2000 DLCround-PT-12b-LTLFireability-09 4732475 m, 34664 m/sec, 5531919 t fired, . Pages in use: 46 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 48/2000 DLCround-PT-12b-LTLFireability-09 4910689 m, 35642 m/sec, 5738401 t fired, . Pages in use: 48 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 49/2000 DLCround-PT-12b-LTLFireability-09 5086727 m, 35207 m/sec, 5945061 t fired, . Pages in use: 49 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 51/2000 DLCround-PT-12b-LTLFireability-09 5263351 m, 35324 m/sec, 6151026 t fired, . Pages in use: 51 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 52/2000 DLCround-PT-12b-LTLFireability-09 5434702 m, 34270 m/sec, 6360367 t fired, . Pages in use: 52 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 54/2000 DLCround-PT-12b-LTLFireability-09 5606476 m, 34354 m/sec, 6568183 t fired, . Pages in use: 54 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 56/2000 DLCround-PT-12b-LTLFireability-09 5779768 m, 34658 m/sec, 6775798 t fired, . Pages in use: 56 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 57/2000 DLCround-PT-12b-LTLFireability-09 5951365 m, 34319 m/sec, 6983792 t fired, . Pages in use: 57 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 59/2000 DLCround-PT-12b-LTLFireability-09 6118755 m, 33478 m/sec, 7195129 t fired, . Pages in use: 59 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 61/2000 DLCround-PT-12b-LTLFireability-09 6291888 m, 34626 m/sec, 7402528 t fired, . Pages in use: 61 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 62/2000 DLCround-PT-12b-LTLFireability-09 6463182 m, 34258 m/sec, 7612059 t fired, . Pages in use: 62 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 64/2000 DLCround-PT-12b-LTLFireability-09 6636580 m, 34679 m/sec, 7817132 t fired, . Pages in use: 64 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 66/2000 DLCround-PT-12b-LTLFireability-09 6816144 m, 35912 m/sec, 8023837 t fired, . Pages in use: 66 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 67/2000 DLCround-PT-12b-LTLFireability-09 6992766 m, 35324 m/sec, 8232102 t fired, . Pages in use: 67 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 69/2000 DLCround-PT-12b-LTLFireability-09 7167948 m, 35036 m/sec, 8442172 t fired, . Pages in use: 69 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 70/2000 DLCround-PT-12b-LTLFireability-09 7342366 m, 34883 m/sec, 8653064 t fired, . Pages in use: 70 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 72/2000 DLCround-PT-12b-LTLFireability-09 7516952 m, 34917 m/sec, 8864841 t fired, . Pages in use: 72 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 74/2000 DLCround-PT-12b-LTLFireability-09 7690123 m, 34634 m/sec, 9075708 t fired, . Pages in use: 74 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 75/2000 DLCround-PT-12b-LTLFireability-09 7860334 m, 34042 m/sec, 9287915 t fired, . Pages in use: 75 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 77/2000 DLCround-PT-12b-LTLFireability-09 8034403 m, 34813 m/sec, 9497102 t fired, . Pages in use: 77 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 79/2000 DLCround-PT-12b-LTLFireability-09 8206629 m, 34445 m/sec, 9708869 t fired, . Pages in use: 79 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 80/2000 DLCround-PT-12b-LTLFireability-09 8386005 m, 35875 m/sec, 9915161 t fired, . Pages in use: 80 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 82/2000 DLCround-PT-12b-LTLFireability-09 8561410 m, 35081 m/sec, 10123620 t fired, . Pages in use: 82 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 84/2000 DLCround-PT-12b-LTLFireability-09 8737309 m, 35179 m/sec, 10329108 t fired, . Pages in use: 84 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 85/2000 DLCround-PT-12b-LTLFireability-09 8912109 m, 34960 m/sec, 10536228 t fired, . Pages in use: 85 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 87/2000 DLCround-PT-12b-LTLFireability-09 9085127 m, 34603 m/sec, 10747390 t fired, . Pages in use: 87 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 89/2000 DLCround-PT-12b-LTLFireability-09 9256861 m, 34346 m/sec, 10959461 t fired, . Pages in use: 89 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 90/2000 DLCround-PT-12b-LTLFireability-09 9433456 m, 35319 m/sec, 11167943 t fired, . Pages in use: 90 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 92/2000 DLCround-PT-12b-LTLFireability-09 9599934 m, 33295 m/sec, 11382429 t fired, . Pages in use: 92 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 93/2000 DLCround-PT-12b-LTLFireability-09 9775619 m, 35137 m/sec, 11590361 t fired, . Pages in use: 93 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 95/2000 DLCround-PT-12b-LTLFireability-09 9945583 m, 33992 m/sec, 11799800 t fired, . Pages in use: 95 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 97/2000 DLCround-PT-12b-LTLFireability-09 10121712 m, 35225 m/sec, 12005478 t fired, . Pages in use: 97 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 98/2000 DLCround-PT-12b-LTLFireability-09 10294617 m, 34581 m/sec, 12210720 t fired, . Pages in use: 98 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 100/2000 DLCround-PT-12b-LTLFireability-09 10468501 m, 34776 m/sec, 12413323 t fired, . Pages in use: 100 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 101/2000 DLCround-PT-12b-LTLFireability-09 10642020 m, 34703 m/sec, 12615752 t fired, . Pages in use: 101 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 103/2000 DLCround-PT-12b-LTLFireability-09 10810701 m, 33736 m/sec, 12822099 t fired, . Pages in use: 103 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 105/2000 DLCround-PT-12b-LTLFireability-09 10978556 m, 33571 m/sec, 13030551 t fired, . Pages in use: 105 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 106/2000 DLCround-PT-12b-LTLFireability-09 11153162 m, 34921 m/sec, 13236461 t fired, . Pages in use: 106 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 108/2000 DLCround-PT-12b-LTLFireability-09 11320507 m, 33469 m/sec, 13449544 t fired, . Pages in use: 108 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 110/2000 DLCround-PT-12b-LTLFireability-09 11494629 m, 34824 m/sec, 13658925 t fired, . Pages in use: 110 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 111/2000 DLCround-PT-12b-LTLFireability-09 11666748 m, 34423 m/sec, 13869252 t fired, . Pages in use: 111 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 113/2000 DLCround-PT-12b-LTLFireability-09 11843376 m, 35325 m/sec, 14077603 t fired, . Pages in use: 113 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 114/2000 DLCround-PT-12b-LTLFireability-09 12019987 m, 35322 m/sec, 14283054 t fired, . Pages in use: 114 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 116/2000 DLCround-PT-12b-LTLFireability-09 12196212 m, 35245 m/sec, 14488601 t fired, . Pages in use: 116 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 118/2000 DLCround-PT-12b-LTLFireability-09 12369098 m, 34577 m/sec, 14694266 t fired, . Pages in use: 118 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 119/2000 DLCround-PT-12b-LTLFireability-09 12538397 m, 33859 m/sec, 14903619 t fired, . Pages in use: 119 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 121/2000 DLCround-PT-12b-LTLFireability-09 12709986 m, 34317 m/sec, 15112643 t fired, . Pages in use: 121 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 123/2000 DLCround-PT-12b-LTLFireability-09 12887361 m, 35475 m/sec, 15319071 t fired, . Pages in use: 123 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 124/2000 DLCround-PT-12b-LTLFireability-09 13059340 m, 34395 m/sec, 15527173 t fired, . Pages in use: 124 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 126/2000 DLCround-PT-12b-LTLFireability-09 13225316 m, 33195 m/sec, 15738487 t fired, . Pages in use: 126 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 127/2000 DLCround-PT-12b-LTLFireability-09 13397623 m, 34461 m/sec, 15946192 t fired, . Pages in use: 127 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 129/2000 DLCround-PT-12b-LTLFireability-09 13571877 m, 34850 m/sec, 16155544 t fired, . Pages in use: 129 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 131/2000 DLCround-PT-12b-LTLFireability-09 13746178 m, 34860 m/sec, 16361996 t fired, . Pages in use: 131 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 132/2000 DLCround-PT-12b-LTLFireability-09 13923778 m, 35520 m/sec, 16566551 t fired, . Pages in use: 132 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 134/2000 DLCround-PT-12b-LTLFireability-09 14097027 m, 34649 m/sec, 16770703 t fired, . Pages in use: 134 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 135/2000 DLCround-PT-12b-LTLFireability-09 14268278 m, 34250 m/sec, 16976909 t fired, . Pages in use: 135 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 137/2000 DLCround-PT-12b-LTLFireability-09 14438015 m, 33947 m/sec, 17183879 t fired, . Pages in use: 137 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 139/2000 DLCround-PT-12b-LTLFireability-09 14608386 m, 34074 m/sec, 17390768 t fired, . Pages in use: 139 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 140/2000 DLCround-PT-12b-LTLFireability-09 14779016 m, 34126 m/sec, 17597535 t fired, . Pages in use: 140 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 142/2000 DLCround-PT-12b-LTLFireability-09 14946621 m, 33521 m/sec, 17806099 t fired, . Pages in use: 142 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 143/2000 DLCround-PT-12b-LTLFireability-09 15117096 m, 34095 m/sec, 18011243 t fired, . Pages in use: 143 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 145/2000 DLCround-PT-12b-LTLFireability-09 15285875 m, 33755 m/sec, 18219403 t fired, . Pages in use: 145 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 147/2000 DLCround-PT-12b-LTLFireability-09 15461970 m, 35219 m/sec, 18422282 t fired, . Pages in use: 147 Visible: 16 EXCL) for DLCround-PT-12b-LTLFireability-09 (local timeout) CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 1 0 0 LTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 148 Visible: 16 for 43 DLCround-PT-12b-LTLFireability-13 for 31 DLCround-PT-12b-LTLFireability-09 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 2/5 DLCround-PT-12b-LTLFireability-09 184206 m, -3055552 m/sec, 195844 t fired, . 2/2000 DLCround-PT-12b-LTLFireability-13 170442 m, 34088 m/sec, 181171 t fired, . Pages in use: 152 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 4/5 DLCround-PT-12b-LTLFireability-09 382227 m, 39604 m/sec, 410124 t fired, . 4/2000 DLCround-PT-12b-LTLFireability-13 372017 m, 40315 m/sec, 397581 t fired, . Pages in use: 156 Visible: 16 EXCL) for DLCround-PT-12b-LTLFireability-09 (memory limit exceeded) CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 6/2000 DLCround-PT-12b-LTLFireability-13 569926 m, 39581 m/sec, 614168 t fired, . Pages in use: 158 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 8/2000 DLCround-PT-12b-LTLFireability-13 764181 m, 38851 m/sec, 832855 t fired, . Pages in use: 158 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 10/2000 DLCround-PT-12b-LTLFireability-13 959973 m, 39158 m/sec, 1050039 t fired, . Pages in use: 158 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 12/2000 DLCround-PT-12b-LTLFireability-13 1156807 m, 39366 m/sec, 1266138 t fired, . Pages in use: 160 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 14/2000 DLCround-PT-12b-LTLFireability-13 1348981 m, 38434 m/sec, 1480484 t fired, . Pages in use: 162 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 16/2000 DLCround-PT-12b-LTLFireability-13 1530340 m, 36271 m/sec, 1695303 t fired, . Pages in use: 164 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 17/2000 DLCround-PT-12b-LTLFireability-13 1709452 m, 35822 m/sec, 1907718 t fired, . Pages in use: 165 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 19/2000 DLCround-PT-12b-LTLFireability-13 1889564 m, 36022 m/sec, 2115072 t fired, . Pages in use: 167 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 21/2000 DLCround-PT-12b-LTLFireability-13 2068919 m, 35871 m/sec, 2323110 t fired, . Pages in use: 169 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 22/2000 DLCround-PT-12b-LTLFireability-13 2242661 m, 34748 m/sec, 2532852 t fired, . Pages in use: 170 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 24/2000 DLCround-PT-12b-LTLFireability-13 2416488 m, 34765 m/sec, 2743871 t fired, . Pages in use: 172 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 26/2000 DLCround-PT-12b-LTLFireability-13 2590530 m, 34808 m/sec, 2952488 t fired, . Pages in use: 174 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 27/2000 DLCround-PT-12b-LTLFireability-13 2765680 m, 35030 m/sec, 3160468 t fired, . Pages in use: 175 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 29/2000 DLCround-PT-12b-LTLFireability-13 2942099 m, 35283 m/sec, 3367073 t fired, . Pages in use: 177 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 31/2000 DLCround-PT-12b-LTLFireability-13 3118259 m, 35232 m/sec, 3573037 t fired, . Pages in use: 179 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 32/2000 DLCround-PT-12b-LTLFireability-13 3287413 m, 33830 m/sec, 3781779 t fired, . Pages in use: 180 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 34/2000 DLCround-PT-12b-LTLFireability-13 3462674 m, 35052 m/sec, 3987096 t fired, . Pages in use: 182 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 35/2000 DLCround-PT-12b-LTLFireability-13 3634841 m, 34433 m/sec, 4194292 t fired, . Pages in use: 183 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 37/2000 DLCround-PT-12b-LTLFireability-13 3806236 m, 34279 m/sec, 4403339 t fired, . Pages in use: 185 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 39/2000 DLCround-PT-12b-LTLFireability-13 3977776 m, 34308 m/sec, 4612203 t fired, . Pages in use: 187 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 40/2000 DLCround-PT-12b-LTLFireability-13 4148815 m, 34207 m/sec, 4819107 t fired, . Pages in use: 188 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 42/2000 DLCround-PT-12b-LTLFireability-13 4317229 m, 33682 m/sec, 5028818 t fired, . Pages in use: 190 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 44/2000 DLCround-PT-12b-LTLFireability-13 4490261 m, 34606 m/sec, 5236450 t fired, . Pages in use: 192 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 45/2000 DLCround-PT-12b-LTLFireability-13 4660116 m, 33971 m/sec, 5446208 t fired, . Pages in use: 193 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 47/2000 DLCround-PT-12b-LTLFireability-13 4837686 m, 35514 m/sec, 5650645 t fired, . Pages in use: 195 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 48/2000 DLCround-PT-12b-LTLFireability-13 5011392 m, 34741 m/sec, 5856926 t fired, . Pages in use: 196 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 50/2000 DLCround-PT-12b-LTLFireability-13 5187365 m, 35194 m/sec, 6062017 t fired, . Pages in use: 198 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 52/2000 DLCround-PT-12b-LTLFireability-13 5360644 m, 34655 m/sec, 6267066 t fired, . Pages in use: 200 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 53/2000 DLCround-PT-12b-LTLFireability-13 5531048 m, 34080 m/sec, 6475789 t fired, . Pages in use: 201 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 55/2000 DLCround-PT-12b-LTLFireability-13 5702586 m, 34307 m/sec, 6684999 t fired, . Pages in use: 203 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 57/2000 DLCround-PT-12b-LTLFireability-13 5876035 m, 34689 m/sec, 6893335 t fired, . Pages in use: 205 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 58/2000 DLCround-PT-12b-LTLFireability-13 6041399 m, 33072 m/sec, 7105993 t fired, . Pages in use: 206 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 60/2000 DLCround-PT-12b-LTLFireability-13 6216800 m, 35080 m/sec, 7313149 t fired, . Pages in use: 208 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 61/2000 DLCround-PT-12b-LTLFireability-13 6386879 m, 34015 m/sec, 7520581 t fired, . Pages in use: 209 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 63/2000 DLCround-PT-12b-LTLFireability-13 6561216 m, 34867 m/sec, 7726092 t fired, . Pages in use: 211 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 65/2000 DLCround-PT-12b-LTLFireability-13 6735045 m, 34765 m/sec, 7932021 t fired, . Pages in use: 213 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 66/2000 DLCround-PT-12b-LTLFireability-13 6908744 m, 34739 m/sec, 8135318 t fired, . Pages in use: 214 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 68/2000 DLCround-PT-12b-LTLFireability-13 7082843 m, 34819 m/sec, 8339460 t fired, . Pages in use: 216 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 70/2000 DLCround-PT-12b-LTLFireability-13 7251885 m, 33808 m/sec, 8545736 t fired, . Pages in use: 218 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 71/2000 DLCround-PT-12b-LTLFireability-13 7421747 m, 33972 m/sec, 8752663 t fired, . Pages in use: 219 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 73/2000 DLCround-PT-12b-LTLFireability-13 7595083 m, 34667 m/sec, 8957339 t fired, . Pages in use: 221 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 75/2000 DLCround-PT-12b-LTLFireability-13 7765017 m, 33986 m/sec, 9163585 t fired, . Pages in use: 223 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 76/2000 DLCround-PT-12b-LTLFireability-13 7932396 m, 33475 m/sec, 9373187 t fired, . Pages in use: 224 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 78/2000 DLCround-PT-12b-LTLFireability-13 8101460 m, 33812 m/sec, 9580510 t fired, . Pages in use: 226 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 79/2000 DLCround-PT-12b-LTLFireability-13 8273562 m, 34420 m/sec, 9788593 t fired, . Pages in use: 227 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 81/2000 DLCround-PT-12b-LTLFireability-13 8451477 m, 35583 m/sec, 9994937 t fired, . Pages in use: 229 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 83/2000 DLCround-PT-12b-LTLFireability-13 8627749 m, 35254 m/sec, 10201077 t fired, . Pages in use: 231 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 84/2000 DLCround-PT-12b-LTLFireability-13 8804619 m, 35374 m/sec, 10408068 t fired, . Pages in use: 232 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 86/2000 DLCround-PT-12b-LTLFireability-13 8977650 m, 34606 m/sec, 10619366 t fired, . Pages in use: 234 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 88/2000 DLCround-PT-12b-LTLFireability-13 9152581 m, 34986 m/sec, 10830334 t fired, . Pages in use: 236 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 89/2000 DLCround-PT-12b-LTLFireability-13 9328295 m, 35142 m/sec, 11040808 t fired, . Pages in use: 237 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 91/2000 DLCround-PT-12b-LTLFireability-13 9500229 m, 34386 m/sec, 11250869 t fired, . Pages in use: 239 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 92/2000 DLCround-PT-12b-LTLFireability-13 9669520 m, 33858 m/sec, 11464613 t fired, . Pages in use: 240 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 94/2000 DLCround-PT-12b-LTLFireability-13 9845123 m, 35120 m/sec, 11672881 t fired, . Pages in use: 242 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 96/2000 DLCround-PT-12b-LTLFireability-13 10018432 m, 34661 m/sec, 11885500 t fired, . Pages in use: 244 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 97/2000 DLCround-PT-12b-LTLFireability-13 10194935 m, 35300 m/sec, 12093580 t fired, . Pages in use: 245 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 99/2000 DLCround-PT-12b-LTLFireability-13 10373338 m, 35680 m/sec, 12299776 t fired, . Pages in use: 247 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 101/2000 DLCround-PT-12b-LTLFireability-13 10549608 m, 35254 m/sec, 12506761 t fired, . Pages in use: 249 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 102/2000 DLCround-PT-12b-LTLFireability-13 10723196 m, 34717 m/sec, 12715825 t fired, . Pages in use: 250 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 104/2000 DLCround-PT-12b-LTLFireability-13 10896088 m, 34578 m/sec, 12926030 t fired, . Pages in use: 252 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 106/2000 DLCround-PT-12b-LTLFireability-13 11069390 m, 34660 m/sec, 13136213 t fired, . Pages in use: 254 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 107/2000 DLCround-PT-12b-LTLFireability-13 11241686 m, 34459 m/sec, 13345256 t fired, . Pages in use: 255 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 109/2000 DLCround-PT-12b-LTLFireability-13 11411809 m, 34024 m/sec, 13557593 t fired, . Pages in use: 257 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 110/2000 DLCround-PT-12b-LTLFireability-13 11587018 m, 35041 m/sec, 13766958 t fired, . Pages in use: 258 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 112/2000 DLCround-PT-12b-LTLFireability-13 11759028 m, 34402 m/sec, 13978997 t fired, . Pages in use: 260 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 114/2000 DLCround-PT-12b-LTLFireability-13 11938452 m, 35884 m/sec, 14185103 t fired, . Pages in use: 262 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 115/2000 DLCround-PT-12b-LTLFireability-13 12113551 m, 35019 m/sec, 14392920 t fired, . Pages in use: 263 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 117/2000 DLCround-PT-12b-LTLFireability-13 12289404 m, 35170 m/sec, 14597886 t fired, . Pages in use: 265 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 119/2000 DLCround-PT-12b-LTLFireability-13 12463901 m, 34899 m/sec, 14805950 t fired, . Pages in use: 267 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 120/2000 DLCround-PT-12b-LTLFireability-13 12635477 m, 34315 m/sec, 15015837 t fired, . Pages in use: 268 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 122/2000 DLCround-PT-12b-LTLFireability-13 12806887 m, 34282 m/sec, 15225777 t fired, . Pages in use: 270 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 123/2000 DLCround-PT-12b-LTLFireability-13 12980964 m, 34815 m/sec, 15432747 t fired, . Pages in use: 271 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 125/2000 DLCround-PT-12b-LTLFireability-13 13146357 m, 33078 m/sec, 15645355 t fired, . Pages in use: 273 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 127/2000 DLCround-PT-12b-LTLFireability-13 13321032 m, 34935 m/sec, 15851834 t fired, . Pages in use: 275 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 128/2000 DLCround-PT-12b-LTLFireability-13 13491792 m, 34152 m/sec, 16062083 t fired, . Pages in use: 276 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 130/2000 DLCround-PT-12b-LTLFireability-13 13668140 m, 35269 m/sec, 16267981 t fired, . Pages in use: 278 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 132/2000 DLCround-PT-12b-LTLFireability-13 13842445 m, 34861 m/sec, 16474719 t fired, . Pages in use: 280 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 133/2000 DLCround-PT-12b-LTLFireability-13 14017333 m, 34977 m/sec, 16678821 t fired, . Pages in use: 281 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 135/2000 DLCround-PT-12b-LTLFireability-13 14193159 m, 35165 m/sec, 16883330 t fired, . Pages in use: 283 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 136/2000 DLCround-PT-12b-LTLFireability-13 14362737 m, 33915 m/sec, 17091241 t fired, . Pages in use: 284 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 138/2000 DLCround-PT-12b-LTLFireability-13 14531218 m, 33696 m/sec, 17299991 t fired, . Pages in use: 286 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 140/2000 DLCround-PT-12b-LTLFireability-13 14704584 m, 34673 m/sec, 17505259 t fired, . Pages in use: 288 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 141/2000 DLCround-PT-12b-LTLFireability-13 14867048 m, 32492 m/sec, 17717631 t fired, . Pages in use: 289 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 143/2000 DLCround-PT-12b-LTLFireability-13 15040896 m, 34769 m/sec, 17922309 t fired, . Pages in use: 291 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 144/2000 DLCround-PT-12b-LTLFireability-13 15210710 m, 33962 m/sec, 18129167 t fired, . Pages in use: 292 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 146/2000 DLCround-PT-12b-LTLFireability-13 15386075 m, 35073 m/sec, 18336161 t fired, . Pages in use: 294 Visible: 16 EXCL) for DLCround-PT-12b-LTLFireability-13 (local timeout) CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 1 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 296 Visible: 16 for 25 DLCround-PT-12b-LTLFireability-07 for 43 DLCround-PT-12b-LTLFireability-13 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 2/2000 DLCround-PT-12b-LTLFireability-07 167266 m, 33453 m/sec, 177810 t fired, . 2/5 DLCround-PT-12b-LTLFireability-13 179828 m, -3041249 m/sec, 191176 t fired, . Pages in use: 300 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 4/2000 DLCround-PT-12b-LTLFireability-07 367769 m, 40100 m/sec, 391749 t fired, . 4/5 DLCround-PT-12b-LTLFireability-13 383154 m, 40665 m/sec, 411107 t fired, . Pages in use: 304 Visible: 16 EXCL) for DLCround-PT-12b-LTLFireability-13 (memory limit exceeded) CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 6/2000 DLCround-PT-12b-LTLFireability-07 563916 m, 39229 m/sec, 607718 t fired, . Pages in use: 306 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 8/2000 DLCround-PT-12b-LTLFireability-07 761159 m, 39448 m/sec, 829615 t fired, . Pages in use: 306 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 10/2000 DLCround-PT-12b-LTLFireability-07 958997 m, 39567 m/sec, 1049005 t fired, . Pages in use: 306 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 12/2000 DLCround-PT-12b-LTLFireability-07 1158323 m, 39865 m/sec, 1267739 t fired, . Pages in use: 308 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 14/2000 DLCround-PT-12b-LTLFireability-07 1350399 m, 38415 m/sec, 1482323 t fired, . Pages in use: 310 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 16/2000 DLCround-PT-12b-LTLFireability-07 1533006 m, 36521 m/sec, 1698691 t fired, . Pages in use: 312 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 17/2000 DLCround-PT-12b-LTLFireability-07 1714803 m, 36359 m/sec, 1913470 t fired, . Pages in use: 313 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 19/2000 DLCround-PT-12b-LTLFireability-07 1898477 m, 36734 m/sec, 2125885 t fired, . Pages in use: 315 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 21/2000 DLCround-PT-12b-LTLFireability-07 2083395 m, 36983 m/sec, 2338464 t fired, . Pages in use: 317 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 22/2000 DLCround-PT-12b-LTLFireability-07 2260755 m, 35472 m/sec, 2554170 t fired, . Pages in use: 318 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 24/2000 DLCround-PT-12b-LTLFireability-07 2439303 m, 35709 m/sec, 2770686 t fired, . Pages in use: 320 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 26/2000 DLCround-PT-12b-LTLFireability-07 2618155 m, 35770 m/sec, 2984121 t fired, . Pages in use: 322 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 28/2000 DLCround-PT-12b-LTLFireability-07 2799440 m, 36257 m/sec, 3197017 t fired, . Pages in use: 324 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 29/2000 DLCround-PT-12b-LTLFireability-07 2974468 m, 35005 m/sec, 3410686 t fired, . Pages in use: 325 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 31/2000 DLCround-PT-12b-LTLFireability-07 3156686 m, 36443 m/sec, 3620721 t fired, . Pages in use: 327 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 33/2000 DLCround-PT-12b-LTLFireability-07 3333716 m, 35406 m/sec, 3835869 t fired, . Pages in use: 329 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 34/2000 DLCround-PT-12b-LTLFireability-07 3493866 m, 32030 m/sec, 4023727 t fired, . Pages in use: 330 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 36/2000 DLCround-PT-12b-LTLFireability-07 3668810 m, 34988 m/sec, 4237869 t fired, . Pages in use: 332 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 38/2000 DLCround-PT-12b-LTLFireability-07 3845600 m, 35358 m/sec, 4451945 t fired, . Pages in use: 334 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 39/2000 DLCround-PT-12b-LTLFireability-07 4024335 m, 35747 m/sec, 4665351 t fired, . Pages in use: 335 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 41/2000 DLCround-PT-12b-LTLFireability-07 4200412 m, 35215 m/sec, 4878455 t fired, . Pages in use: 337 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 43/2000 DLCround-PT-12b-LTLFireability-07 4371908 m, 34299 m/sec, 5095630 t fired, . Pages in use: 339 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 44/2000 DLCround-PT-12b-LTLFireability-07 4548565 m, 35331 m/sec, 5308020 t fired, . Pages in use: 340 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 46/2000 DLCround-PT-12b-LTLFireability-07 4725090 m, 35305 m/sec, 5522577 t fired, . Pages in use: 342 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 48/2000 DLCround-PT-12b-LTLFireability-07 4905471 m, 36076 m/sec, 5732812 t fired, . Pages in use: 344 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 49/2000 DLCround-PT-12b-LTLFireability-07 5085531 m, 36012 m/sec, 5942659 t fired, . Pages in use: 345 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 51/2000 DLCround-PT-12b-LTLFireability-07 5264122 m, 35718 m/sec, 6151846 t fired, . Pages in use: 347 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 53/2000 DLCround-PT-12b-LTLFireability-07 5436987 m, 34573 m/sec, 6363188 t fired, . Pages in use: 349 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 54/2000 DLCround-PT-12b-LTLFireability-07 5612971 m, 35196 m/sec, 6575046 t fired, . Pages in use: 350 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 56/2000 DLCround-PT-12b-LTLFireability-07 5789541 m, 35314 m/sec, 6786614 t fired, . Pages in use: 352 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 58/2000 DLCround-PT-12b-LTLFireability-07 5963362 m, 34764 m/sec, 6998836 t fired, . Pages in use: 354 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 59/2000 DLCround-PT-12b-LTLFireability-07 6133213 m, 33970 m/sec, 7213350 t fired, . Pages in use: 355 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 61/2000 DLCround-PT-12b-LTLFireability-07 6309295 m, 35216 m/sec, 7422381 t fired, . Pages in use: 357 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 63/2000 DLCround-PT-12b-LTLFireability-07 6484077 m, 34956 m/sec, 7635791 t fired, . Pages in use: 359 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 64/2000 DLCround-PT-12b-LTLFireability-07 6662250 m, 35634 m/sec, 7846442 t fired, . Pages in use: 360 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 66/2000 DLCround-PT-12b-LTLFireability-07 6843198 m, 36189 m/sec, 8054543 t fired, . Pages in use: 362 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 68/2000 DLCround-PT-12b-LTLFireability-07 7019663 m, 35293 m/sec, 8264300 t fired, . Pages in use: 364 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 69/2000 DLCround-PT-12b-LTLFireability-07 7196336 m, 35334 m/sec, 8474332 t fired, . Pages in use: 365 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 71/2000 DLCround-PT-12b-LTLFireability-07 7346107 m, 29954 m/sec, 8657623 t fired, . Pages in use: 367 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 72/2000 DLCround-PT-12b-LTLFireability-07 7520109 m, 34800 m/sec, 8870588 t fired, . Pages in use: 368 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 74/2000 DLCround-PT-12b-LTLFireability-07 7694415 m, 34861 m/sec, 9081262 t fired, . Pages in use: 370 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 76/2000 DLCround-PT-12b-LTLFireability-07 7866335 m, 34384 m/sec, 9294551 t fired, . Pages in use: 372 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 77/2000 DLCround-PT-12b-LTLFireability-07 8042270 m, 35187 m/sec, 9505917 t fired, . Pages in use: 373 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 79/2000 DLCround-PT-12b-LTLFireability-07 8215589 m, 34663 m/sec, 9719659 t fired, . Pages in use: 375 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 81/2000 DLCround-PT-12b-LTLFireability-07 8396697 m, 36221 m/sec, 9927573 t fired, . Pages in use: 377 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 82/2000 DLCround-PT-12b-LTLFireability-07 8573440 m, 35348 m/sec, 10137335 t fired, . Pages in use: 378 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 84/2000 DLCround-PT-12b-LTLFireability-07 8750314 m, 35374 m/sec, 10345168 t fired, . Pages in use: 380 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 86/2000 DLCround-PT-12b-LTLFireability-07 8927461 m, 35429 m/sec, 10554554 t fired, . Pages in use: 382 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 87/2000 DLCround-PT-12b-LTLFireability-07 9102001 m, 34908 m/sec, 10767683 t fired, . Pages in use: 383 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 89/2000 DLCround-PT-12b-LTLFireability-07 9276896 m, 34979 m/sec, 10980792 t fired, . Pages in use: 385 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 90/2000 DLCround-PT-12b-LTLFireability-07 9442016 m, 33024 m/sec, 11179534 t fired, . Pages in use: 386 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 92/2000 DLCround-PT-12b-LTLFireability-07 9585511 m, 28699 m/sec, 11366043 t fired, . Pages in use: 388 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 93/2000 DLCround-PT-12b-LTLFireability-07 9761443 m, 35186 m/sec, 11573769 t fired, . Pages in use: 389 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 95/2000 DLCround-PT-12b-LTLFireability-07 9933938 m, 34499 m/sec, 11785618 t fired, . Pages in use: 391 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 97/2000 DLCround-PT-12b-LTLFireability-07 10112343 m, 35681 m/sec, 11995453 t fired, . Pages in use: 393 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 98/2000 DLCround-PT-12b-LTLFireability-07 10289404 m, 35412 m/sec, 12204662 t fired, . Pages in use: 394 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 100/2000 DLCround-PT-12b-LTLFireability-07 10466907 m, 35500 m/sec, 12411604 t fired, . Pages in use: 396 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 102/2000 DLCround-PT-12b-LTLFireability-07 10644479 m, 35514 m/sec, 12618417 t fired, . Pages in use: 398 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 103/2000 DLCround-PT-12b-LTLFireability-07 10817540 m, 34612 m/sec, 12829428 t fired, . Pages in use: 399 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 105/2000 DLCround-PT-12b-LTLFireability-07 10988791 m, 34250 m/sec, 13041728 t fired, . Pages in use: 401 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 107/2000 DLCround-PT-12b-LTLFireability-07 11164777 m, 35197 m/sec, 13250014 t fired, . Pages in use: 403 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 108/2000 DLCround-PT-12b-LTLFireability-07 11329706 m, 32985 m/sec, 13464740 t fired, . Pages in use: 404 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 110/2000 DLCround-PT-12b-LTLFireability-07 11506503 m, 35359 m/sec, 13673228 t fired, . Pages in use: 406 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 111/2000 DLCround-PT-12b-LTLFireability-07 11680489 m, 34797 m/sec, 13883896 t fired, . Pages in use: 407 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 113/2000 DLCround-PT-12b-LTLFireability-07 11857394 m, 35381 m/sec, 14094162 t fired, . Pages in use: 409 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 115/2000 DLCround-PT-12b-LTLFireability-07 12034860 m, 35493 m/sec, 14301242 t fired, . Pages in use: 411 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 116/2000 DLCround-PT-12b-LTLFireability-07 12210466 m, 35121 m/sec, 14507737 t fired, . Pages in use: 412 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 118/2000 DLCround-PT-12b-LTLFireability-07 12386191 m, 35145 m/sec, 14713784 t fired, . Pages in use: 414 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 120/2000 DLCround-PT-12b-LTLFireability-07 12556477 m, 34057 m/sec, 14922882 t fired, . Pages in use: 416 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 121/2000 DLCround-PT-12b-LTLFireability-07 12728750 m, 34454 m/sec, 15132726 t fired, . Pages in use: 417 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 123/2000 DLCround-PT-12b-LTLFireability-07 12904358 m, 35121 m/sec, 15339948 t fired, . Pages in use: 419 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 125/2000 DLCround-PT-12b-LTLFireability-07 13076267 m, 34381 m/sec, 15548405 t fired, . Pages in use: 421 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 126/2000 DLCround-PT-12b-LTLFireability-07 13244558 m, 33658 m/sec, 15758996 t fired, . Pages in use: 422 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 128/2000 DLCround-PT-12b-LTLFireability-07 13414556 m, 33999 m/sec, 15967689 t fired, . Pages in use: 424 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 129/2000 DLCround-PT-12b-LTLFireability-07 13587840 m, 34656 m/sec, 16176973 t fired, . Pages in use: 425 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 131/2000 DLCround-PT-12b-LTLFireability-07 13765206 m, 35473 m/sec, 16382431 t fired, . Pages in use: 427 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 133/2000 DLCround-PT-12b-LTLFireability-07 13940945 m, 35147 m/sec, 16588517 t fired, . Pages in use: 429 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 134/2000 DLCround-PT-12b-LTLFireability-07 14116382 m, 35087 m/sec, 16793435 t fired, . Pages in use: 430 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 136/2000 DLCround-PT-12b-LTLFireability-07 14286596 m, 34042 m/sec, 17000970 t fired, . Pages in use: 432 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 137/2000 DLCround-PT-12b-LTLFireability-07 14457331 m, 34147 m/sec, 17208339 t fired, . Pages in use: 433 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 139/2000 DLCround-PT-12b-LTLFireability-07 14622885 m, 33110 m/sec, 17407730 t fired, . Pages in use: 435 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 141/2000 DLCround-PT-12b-LTLFireability-07 14794202 m, 34263 m/sec, 17615259 t fired, . Pages in use: 437 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 142/2000 DLCround-PT-12b-LTLFireability-07 14961281 m, 33415 m/sec, 17824791 t fired, . Pages in use: 438 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 144/2000 DLCround-PT-12b-LTLFireability-07 15133621 m, 34468 m/sec, 18031340 t fired, . Pages in use: 440 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 145/2000 DLCround-PT-12b-LTLFireability-07 15304923 m, 34260 m/sec, 18240931 t fired, . Pages in use: 441 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 147/2000 DLCround-PT-12b-LTLFireability-07 15481129 m, 35241 m/sec, 18444381 t fired, . Pages in use: 443 Visible: 16 EXCL) for DLCround-PT-12b-LTLFireability-07 (local timeout) CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 1 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 445 Visible: 16 for 19 DLCround-PT-12b-LTLFireability-05 for 25 DLCround-PT-12b-LTLFireability-07 EXCL) for DLCround-PT-12b-LTLFireability-05 135 135 0 1 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 2/5 DLCround-PT-12b-LTLFireability-07 146513 m, -3066923 m/sec, 155835 t fired, . Pages in use: 447 Visible: 16 CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 4/5 DLCround-PT-12b-LTLFireability-07 331995 m, 37096 m/sec, 353475 t fired, . Pages in use: 449 Visible: 16 EXCL) for DLCround-PT-12b-LTLFireability-07 (memory limit exceeded) CATEGORY VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m AG false findpath[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 LTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 450 Visible: 16 for 9 DLCround-PT-12b-LTLFireability-03 EXCL) for DLCround-PT-12b-LTLFireability-03 135 135 0 1 for 3 DLCround-PT-12b-LTLFireability-01 for DLCround-PT-12b-LTLFireability-01 135 135 0 1 for 0 DLCround-PT-12b-LTLFireability-00 for DLCround-PT-12b-LTLFireability-00 135 135 0 1 tasks 16

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-12b"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is DLCround-PT-12b, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r115-smll-171624276700268"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-12b.tgz
mv DLCround-PT-12b execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;