About the Execution of LoLA for DLCround-PT-11a
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16208.319 | 691453.00 | 762787.00 | 2769.30 | ???????F?????T?? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r115-smll-171624276600242.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is DLCround-PT-11a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r115-smll-171624276600242
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.3M
-rw-r--r-- 1 mcc users 6.3K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 69K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Apr 22 14:38 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Apr 22 14:38 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Apr 22 14:38 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 22 14:38 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Apr 13 17:32 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 133K Apr 13 17:32 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Apr 13 16:31 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 116K Apr 13 16:31 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:38 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:38 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 762K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-11a-CTLFireability-2024-00
FORMULA_NAME DLCround-PT-11a-CTLFireability-2024-01
FORMULA_NAME DLCround-PT-11a-CTLFireability-2024-02
FORMULA_NAME DLCround-PT-11a-CTLFireability-2024-03
FORMULA_NAME DLCround-PT-11a-CTLFireability-2024-04
FORMULA_NAME DLCround-PT-11a-CTLFireability-2024-05
FORMULA_NAME DLCround-PT-11a-CTLFireability-2024-06
FORMULA_NAME DLCround-PT-11a-CTLFireability-2024-07
FORMULA_NAME DLCround-PT-11a-CTLFireability-2024-08
FORMULA_NAME DLCround-PT-11a-CTLFireability-2024-09
FORMULA_NAME DLCround-PT-11a-CTLFireability-2024-10
FORMULA_NAME DLCround-PT-11a-CTLFireability-2024-11
FORMULA_NAME DLCround-PT-11a-CTLFireability-2023-12
FORMULA_NAME DLCround-PT-11a-CTLFireability-2023-13
FORMULA_NAME DLCround-PT-11a-CTLFireability-2023-14
FORMULA_NAME DLCround-PT-11a-CTLFireability-2023-15
=== Now, execution of the tool begins
BK_START 1717092000398
FORMULA DLCround-PT-11a-CTLFireability-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-11a-CTLFireability-2023-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717092691851
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 65 (type SKEL/FNDP) for 33 DLCround-PT-11a-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 66 (type SKEL/EQUN) for 33 DLCround-PT-11a-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 67 (type SKEL/SRCH) for 33 DLCround-PT-11a-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 66 (type SKEL/EQUN) for DLCround-PT-11a-CTLFireability-2024-07
[[35mlola[0m][I] result : false
[[35mlola[0m][W] CANCELED task # 65 (type FNDP) for DLCround-PT-11a-CTLFireability-2024-07 (obsolete)
[[35mlola[0m][W] CANCELED task # 67 (type SRCH) for DLCround-PT-11a-CTLFireability-2024-07 (obsolete)
[[35mlola[0m][I] FINISHED task # 65 (type SKEL/FNDP) for DLCround-PT-11a-CTLFireability-2024-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] LAUNCH task # 69 (type EXCL) for 0 DLCround-PT-11a-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 179 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 74 (type EQUN) for 0 DLCround-PT-11a-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 76 (type EQUN) for 0 DLCround-PT-11a-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 79 (type SKEL/EQUN) for 55 DLCround-PT-11a-CTLFireability-2023-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] planning for DLCround-PT-11a-CTLFireability-2024-07 stopped (result already fixed).
[[35mlola[0m][I] FINISHED task # 79 (type SKEL/EQUN) for DLCround-PT-11a-CTLFireability-2023-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] planning for DLCround-PT-11a-CTLFireability-2023-13 stopped (result already fixed).
[[35mlola[0m][I] FINISHED task # 74 (type EQUN) for DLCround-PT-11a-CTLFireability-2024-00
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 76 (type EQUN) for DLCround-PT-11a-CTLFireability-2024-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 83 (type EQUN) for 45 DLCround-PT-11a-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 85 (type EQUN) for 45 DLCround-PT-11a-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 83 (type EQUN) for DLCround-PT-11a-CTLFireability-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 90 (type EQUN) for 22 DLCround-PT-11a-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 92 (type EQUN) for 22 DLCround-PT-11a-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 90 (type EQUN) for DLCround-PT-11a-CTLFireability-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 92 (type EQUN) for DLCround-PT-11a-CTLFireability-2024-06
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 85 (type EQUN) for DLCround-PT-11a-CTLFireability-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCround-PT-11a-CTLFireability-2024-07: EF false skeleton: state equation[0m
[[35mlola[0m][.] [1m[32mDLCround-PT-11a-CTLFireability-2023-13: AR true skeleton: state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2024-00: EFAG 0 0 1 0 3 0 0 0
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2024-04: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2024-06: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2024-11: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2023-12: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 AGEF EXCL 4/199 1/2000 DLCround-PT-11a-CTLFireability-2024-00 222347 m, 44469 m/sec, 3246467 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 6 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCround-PT-11a-CTLFireability-2024-07: EF false skeleton: state equation[0m
[[35mlola[0m][.] [1m[32mDLCround-PT-11a-CTLFireability-2023-13: AR true skeleton: state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2024-00: EFAG 0 0 1 0 3 0 0 0
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2024-04: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2024-06: CONJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2024-11: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2023-12: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-11a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 AGEF EXCL 9/199 3/2000 DLCround-PT-11a-CTLFireability-2024-00 542485 m, 64027 m/sec, 7933784 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 11 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCround-PT-11a-CTLFireability-2024-07: EF false skeleton: state equation[0m
[[35mlola[0m][.] [1m[32mDLCround-PT-11a-CTLFireability-2023-13: AR true skeleton: state equation[0m
[[35mlola[0m][.]
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[[35mlola[0m][.] 69 AGEF EXCL 14/199 4/2000 DLCround-PT-11a-CTLFireability-2024-00 885344 m, 68571 m/sec, 13046006 t fired, .
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[[35mlola[0m][.] 69 AGEF EXCL 19/199 5/2000 DLCround-PT-11a-CTLFireability-2024-00 1221942 m, 67319 m/sec, 18091235 t fired, .
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[[35mlola[0m][.] 69 AGEF EXCL 24/199 6/2000 DLCround-PT-11a-CTLFireability-2024-00 1563743 m, 68360 m/sec, 23208320 t fired, .
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[[35mlola[0m][.] 69 AGEF EXCL 29/199 7/2000 DLCround-PT-11a-CTLFireability-2024-00 1885042 m, 64259 m/sec, 27993958 t fired, .
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[[35mlola[0m][.] 69 AGEF EXCL 34/199 9/2000 DLCround-PT-11a-CTLFireability-2024-00 2222849 m, 67561 m/sec, 33056665 t fired, .
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[[35mlola[0m][.] 69 AGEF EXCL 39/199 10/2000 DLCround-PT-11a-CTLFireability-2024-00 2559211 m, 67272 m/sec, 38107534 t fired, .
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[[35mlola[0m][.] 69 AGEF EXCL 44/199 11/2000 DLCround-PT-11a-CTLFireability-2024-00 2894649 m, 67087 m/sec, 43094138 t fired, .
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[[35mlola[0m][.] 69 AGEF EXCL 49/199 12/2000 DLCround-PT-11a-CTLFireability-2024-00 3221722 m, 65414 m/sec, 48016276 t fired, .
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[[35mlola[0m][.] 69 AGEF EXCL 54/199 14/2000 DLCround-PT-11a-CTLFireability-2024-00 3548627 m, 65381 m/sec, 52967468 t fired, .
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[[35mlola[0m][.] 69 AGEF EXCL 59/199 15/2000 DLCround-PT-11a-CTLFireability-2024-00 3888538 m, 67982 m/sec, 58027969 t fired, .
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[[35mlola[0m][.] 69 AGEF EXCL 64/199 16/2000 DLCround-PT-11a-CTLFireability-2024-00 4225521 m, 67396 m/sec, 63031822 t fired, .
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[[35mlola[0m][.] 69 AGEF EXCL 69/199 17/2000 DLCround-PT-11a-CTLFireability-2024-00 4558079 m, 66511 m/sec, 68022522 t fired, .
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[[35mlola[0m][.] 69 AGEF EXCL 74/199 19/2000 DLCround-PT-11a-CTLFireability-2024-00 4899112 m, 68206 m/sec, 73035489 t fired, .
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[[35mlola[0m][.] 69 AGEF EXCL 104/199 26/2000 DLCround-PT-11a-CTLFireability-2024-00 6887375 m, 66167 m/sec, 102678514 t fired, .
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[[35mlola[0m][.] 69 AGEF EXCL 109/199 27/2000 DLCround-PT-11a-CTLFireability-2024-00 7210912 m, 64707 m/sec, 107567342 t fired, .
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[[35mlola[0m][.] 69 AGEF EXCL 114/199 28/2000 DLCround-PT-11a-CTLFireability-2024-00 7532957 m, 64409 m/sec, 112412446 t fired, .
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[[35mlola[0m][.] 69 AGEF EXCL 119/199 29/2000 DLCround-PT-11a-CTLFireability-2024-00 7854112 m, 64231 m/sec, 117247085 t fired, .
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[[35mlola[0m][.] 69 AGEF EXCL 149/199 37/2000 DLCround-PT-11a-CTLFireability-2024-00 9801199 m, 64440 m/sec, 146619754 t fired, .
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[[35mlola[0m][.] 69 AGEF EXCL 154/199 38/2000 DLCround-PT-11a-CTLFireability-2024-00 10127640 m, 65288 m/sec, 151558780 t fired, .
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[[35mlola[0m][.] 69 AGEF EXCL 159/199 39/2000 DLCround-PT-11a-CTLFireability-2024-00 10457100 m, 65892 m/sec, 156538247 t fired, .
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[[35mlola[0m][.] 69 AGEF EXCL 194/199 48/2000 DLCround-PT-11a-CTLFireability-2024-00 12826295 m, 66534 m/sec, 191936239 t fired, .
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 407 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-11a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is DLCround-PT-11a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r115-smll-171624276600242"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-11a.tgz
mv DLCround-PT-11a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;