fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r115-smll-171624276500187
Last Updated
July 7, 2024

About the Execution of LoLA for DLCround-PT-07b

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16206.855 1307339.00 1314957.00 6462.40 F??FFT??FF???T?F normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r115-smll-171624276500187.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is DLCround-PT-07b, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r115-smll-171624276500187
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.5M
-rw-r--r-- 1 mcc users 7.7K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 87K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 48K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Apr 22 14:38 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Apr 22 14:38 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Apr 22 14:38 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 22 14:38 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Apr 13 12:32 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 154K Apr 13 12:32 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.5K Apr 13 12:31 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 51K Apr 13 12:31 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:38 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:38 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 963K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-07b-LTLCardinality-00
FORMULA_NAME DLCround-PT-07b-LTLCardinality-01
FORMULA_NAME DLCround-PT-07b-LTLCardinality-02
FORMULA_NAME DLCround-PT-07b-LTLCardinality-03
FORMULA_NAME DLCround-PT-07b-LTLCardinality-04
FORMULA_NAME DLCround-PT-07b-LTLCardinality-05
FORMULA_NAME DLCround-PT-07b-LTLCardinality-06
FORMULA_NAME DLCround-PT-07b-LTLCardinality-07
FORMULA_NAME DLCround-PT-07b-LTLCardinality-08
FORMULA_NAME DLCround-PT-07b-LTLCardinality-09
FORMULA_NAME DLCround-PT-07b-LTLCardinality-10
FORMULA_NAME DLCround-PT-07b-LTLCardinality-11
FORMULA_NAME DLCround-PT-07b-LTLCardinality-12
FORMULA_NAME DLCround-PT-07b-LTLCardinality-13
FORMULA_NAME DLCround-PT-07b-LTLCardinality-14
FORMULA_NAME DLCround-PT-07b-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1717074911084

FORMULA DLCround-PT-07b-LTLCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-07b-LTLCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-07b-LTLCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-07b-LTLCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-07b-LTLCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-07b-LTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-07b-LTLCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-07b-LTLCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1717076218423

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from LTLCardinality.xml
[lola][I] Rule S: 0 transitions removed,0 places removed
[lola][I] LAUNCH task # 22 (type CNST) for 19 DLCround-PT-07b-LTLCardinality-05
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] LAUNCH task # 52 (type CNST) for 51 DLCround-PT-07b-LTLCardinality-13
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 22 (type CNST) for DLCround-PT-07b-LTLCardinality-05
[lola][I] result : true
[lola][I] FINISHED task # 52 (type CNST) for DLCround-PT-07b-LTLCardinality-13
[lola][I] result : true
[lola][I] LAUNCH task # 1 (type CNST) for 0 DLCround-PT-07b-LTLCardinality-00
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 1 (type CNST) for DLCround-PT-07b-LTLCardinality-00
[lola][I] result : false
[lola][I] LAUNCH task # 12 (type EXCL) for 9 DLCround-PT-07b-LTLCardinality-03
[lola][I] time limit : 171 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 12 (type EXCL) for DLCround-PT-07b-LTLCardinality-03
[lola][I] result : false
[lola][I] markings : 122
[lola][I] fired transitions : 123
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 58 (type EXCL) for 57 DLCround-PT-07b-LTLCardinality-15
[lola][I] time limit : 204 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 64 (type EQUN) for 32 DLCround-PT-07b-LTLCardinality-08
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 58 (type EXCL) for DLCround-PT-07b-LTLCardinality-15
[lola][I] result : false
[lola][I] markings : 122
[lola][I] fired transitions : 123
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 61 (type EXCL) for 32 DLCround-PT-07b-LTLCardinality-08
[lola][I] time limit : 233 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCround-PT-07b-LTLCardinality-00: INITIAL false preprocessing
[lola][.] DLCround-PT-07b-LTLCardinality-03: CONJ false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-13: INITIAL true preprocessing
[lola][.] DLCround-PT-07b-LTLCardinality-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-07b-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-05: CONJ 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-08: CONJ 0 0 2 0 2 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 61 ER EXCL 0/251 1/2000 DLCround-PT-07b-LTLCardinality-08 --
[lola][.] 64 EF STEQ 0/3264 0/5 DLCround-PT-07b-LTLCardinality-08 sara not yet started (preprocessing).
[lola][.]
[lola][.] Time elapsed: 336 secs. Pages in use: 1
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[lola][I] FINISHED task # 61 (type EXCL) for DLCround-PT-07b-LTLCardinality-08
[lola][I] result : true
[lola][I] markings : 123
[lola][I] fired transitions : 123
[lola][I] time used : 1
[lola][I] memory pages used : 1
[lola][W] CANCELED task # 64 (type EQUN) for DLCround-PT-07b-LTLCardinality-08 (obsolete)
[lola][I] LAUNCH task # 17 (type EXCL) for 16 DLCround-PT-07b-LTLCardinality-04
[lola][I] time limit : 296 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 17 (type EXCL) for DLCround-PT-07b-LTLCardinality-04
[lola][I] result : false
[lola][I] markings : 125
[lola][I] fired transitions : 126
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 24 (type EXCL) for 19 DLCround-PT-07b-LTLCardinality-05
[lola][I] time limit : 326 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 24 (type EXCL) for DLCround-PT-07b-LTLCardinality-05
[lola][I] result : true
[lola][I] markings : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 40 (type EXCL) for 39 DLCround-PT-07b-LTLCardinality-09
[lola][I] time limit : 362 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 40 (type EXCL) for DLCround-PT-07b-LTLCardinality-09
[lola][I] result : false
[lola][I] markings : 730
[lola][I] fired transitions : 1239
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] FINISHED task # 64 (type EQUN) for DLCround-PT-07b-LTLCardinality-08
[lola][I] result : true
[lola][I] LAUNCH task # 30 (type EXCL) for 29 DLCround-PT-07b-LTLCardinality-07
[lola][I] time limit : 407 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 30 (type EXCL) for DLCround-PT-07b-LTLCardinality-07
[lola][I] result : true
[lola][I] markings : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 7 (type EXCL) for 6 DLCround-PT-07b-LTLCardinality-02
[lola][I] time limit : 466 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 7 (type EXCL) for DLCround-PT-07b-LTLCardinality-02
[lola][I] result : true
[lola][I] markings : 21
[lola][I] fired transitions : 27
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 49 (type EXCL) for 48 DLCround-PT-07b-LTLCardinality-12
[lola][I] time limit : 543 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 49 (type EXCL) for DLCround-PT-07b-LTLCardinality-12
[lola][I] result : false
[lola][I] markings : 1133
[lola][I] fired transitions : 1159
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 55 (type EXCL) for 54 DLCround-PT-07b-LTLCardinality-14
[lola][I] time limit : 652 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 55 (type EXCL) for DLCround-PT-07b-LTLCardinality-14
[lola][I] result : true
[lola][I] markings : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 43 (type EXCL) for 42 DLCround-PT-07b-LTLCardinality-10
[lola][I] time limit : 815 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 43 (type EXCL) for DLCround-PT-07b-LTLCardinality-10
[lola][I] result : false
[lola][I] markings : 109
[lola][I] fired transitions : 109
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 46 (type EXCL) for 45 DLCround-PT-07b-LTLCardinality-11
[lola][I] time limit : 1087 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCround-PT-07b-LTLCardinality-00: INITIAL false preprocessing
[lola][.] DLCround-PT-07b-LTLCardinality-02: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-03: CONJ false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-04: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-05: CONJ true CONJ
[lola][.] DLCround-PT-07b-LTLCardinality-07: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-08: CONJ false state space /ER
[lola][.] DLCround-PT-07b-LTLCardinality-09: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-10: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-12: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-13: INITIAL true preprocessing
[lola][.] DLCround-PT-07b-LTLCardinality-14: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-07b-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-11: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 46 LTL EXCL 3/1087 3/2000 DLCround-PT-07b-LTLCardinality-11 228556 m, 45711 m/sec, 246343 t fired, .
[lola][.]
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[lola][.] DLCround-PT-07b-LTLCardinality-00: INITIAL false preprocessing
[lola][.] DLCround-PT-07b-LTLCardinality-02: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-03: CONJ false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-04: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-05: CONJ true CONJ
[lola][.] DLCround-PT-07b-LTLCardinality-07: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-08: CONJ false state space /ER
[lola][.] DLCround-PT-07b-LTLCardinality-09: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-10: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-12: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-13: INITIAL true preprocessing
[lola][.] DLCround-PT-07b-LTLCardinality-14: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-07b-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-11: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 46 LTL EXCL 8/1087 7/2000 DLCround-PT-07b-LTLCardinality-11 572847 m, 68858 m/sec, 617721 t fired, .
[lola][.]
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[lola][.] DLCround-PT-07b-LTLCardinality-00: INITIAL false preprocessing
[lola][.] DLCround-PT-07b-LTLCardinality-02: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-03: CONJ false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-04: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-05: CONJ true CONJ
[lola][.] DLCround-PT-07b-LTLCardinality-07: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-08: CONJ false state space /ER
[lola][.] DLCround-PT-07b-LTLCardinality-09: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-10: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-12: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-13: INITIAL true preprocessing
[lola][.] DLCround-PT-07b-LTLCardinality-14: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-07b-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-11: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 46 LTL EXCL 13/1087 11/2000 DLCround-PT-07b-LTLCardinality-11 902248 m, 65880 m/sec, 972910 t fired, .
[lola][.]
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[lola][.] DLCround-PT-07b-LTLCardinality-00: INITIAL false preprocessing
[lola][.] DLCround-PT-07b-LTLCardinality-02: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-03: CONJ false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-04: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-05: CONJ true CONJ
[lola][.] DLCround-PT-07b-LTLCardinality-07: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-08: CONJ false state space /ER
[lola][.] DLCround-PT-07b-LTLCardinality-09: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-10: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-12: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-13: INITIAL true preprocessing
[lola][.] DLCround-PT-07b-LTLCardinality-14: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-07b-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-11: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 46 LTL EXCL 18/1087 14/2000 DLCround-PT-07b-LTLCardinality-11 1230113 m, 65573 m/sec, 1326761 t fired, .
[lola][.]
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[lola][.] DLCround-PT-07b-LTLCardinality-00: INITIAL false preprocessing
[lola][.] DLCround-PT-07b-LTLCardinality-02: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-03: CONJ false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-04: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-05: CONJ true CONJ
[lola][.] DLCround-PT-07b-LTLCardinality-07: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-08: CONJ false state space /ER
[lola][.] DLCround-PT-07b-LTLCardinality-09: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-10: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-12: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-13: INITIAL true preprocessing
[lola][.] DLCround-PT-07b-LTLCardinality-14: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-07b-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-11: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 46 LTL EXCL 23/1087 18/2000 DLCround-PT-07b-LTLCardinality-11 1565814 m, 67140 m/sec, 1689303 t fired, .
[lola][.]
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[lola][.] DLCround-PT-07b-LTLCardinality-00: INITIAL false preprocessing
[lola][.] DLCround-PT-07b-LTLCardinality-02: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-03: CONJ false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-04: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-05: CONJ true CONJ
[lola][.] DLCround-PT-07b-LTLCardinality-07: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-08: CONJ false state space /ER
[lola][.] DLCround-PT-07b-LTLCardinality-09: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-10: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-12: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-13: INITIAL true preprocessing
[lola][.] DLCround-PT-07b-LTLCardinality-14: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-07b-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-11: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 46 LTL EXCL 28/1087 21/2000 DLCround-PT-07b-LTLCardinality-11 1897199 m, 66277 m/sec, 2046917 t fired, .
[lola][.]
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[lola][.] DLCround-PT-07b-LTLCardinality-00: INITIAL false preprocessing
[lola][.] DLCround-PT-07b-LTLCardinality-02: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-03: CONJ false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-04: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-05: CONJ true CONJ
[lola][.] DLCround-PT-07b-LTLCardinality-07: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-08: CONJ false state space /ER
[lola][.] DLCround-PT-07b-LTLCardinality-09: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-10: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-12: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-13: INITIAL true preprocessing
[lola][.] DLCround-PT-07b-LTLCardinality-14: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-07b-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-11: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 46 LTL EXCL 33/1087 25/2000 DLCround-PT-07b-LTLCardinality-11 2227542 m, 66068 m/sec, 2404314 t fired, .
[lola][.]
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[lola][.] DLCround-PT-07b-LTLCardinality-00: INITIAL false preprocessing
[lola][.] DLCround-PT-07b-LTLCardinality-02: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-03: CONJ false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-04: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-05: CONJ true CONJ
[lola][.] DLCround-PT-07b-LTLCardinality-07: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-08: CONJ false state space /ER
[lola][.] DLCround-PT-07b-LTLCardinality-09: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-10: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-12: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-13: INITIAL true preprocessing
[lola][.] DLCround-PT-07b-LTLCardinality-14: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-07b-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-11: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 46 LTL EXCL 38/1087 28/2000 DLCround-PT-07b-LTLCardinality-11 2549452 m, 64382 m/sec, 2752088 t fired, .
[lola][.]
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[lola][.] DLCround-PT-07b-LTLCardinality-00: INITIAL false preprocessing
[lola][.] DLCround-PT-07b-LTLCardinality-02: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-03: CONJ false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-04: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-05: CONJ true CONJ
[lola][.] DLCround-PT-07b-LTLCardinality-07: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-08: CONJ false state space /ER
[lola][.] DLCround-PT-07b-LTLCardinality-09: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-10: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-12: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-13: INITIAL true preprocessing
[lola][.] DLCround-PT-07b-LTLCardinality-14: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-07b-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
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[lola][.] 46 LTL EXCL 43/1087 32/2000 DLCround-PT-07b-LTLCardinality-11 2882252 m, 66560 m/sec, 3111587 t fired, .
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[lola][.] 46 LTL EXCL 103/1087 74/2000 DLCround-PT-07b-LTLCardinality-11 6844635 m, 63456 m/sec, 7392487 t fired, .
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[lola][.] 46 LTL EXCL 108/1087 78/2000 DLCround-PT-07b-LTLCardinality-11 7164940 m, 64061 m/sec, 7736993 t fired, .
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[lola][.] 46 LTL EXCL 113/1087 81/2000 DLCround-PT-07b-LTLCardinality-11 7495419 m, 66095 m/sec, 8095254 t fired, .
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[lola][.] 46 LTL EXCL 118/1087 85/2000 DLCround-PT-07b-LTLCardinality-11 7826574 m, 66231 m/sec, 8452205 t fired, .
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[lola][.] 46 LTL EXCL 123/1087 88/2000 DLCround-PT-07b-LTLCardinality-11 8158119 m, 66309 m/sec, 8809025 t fired, .
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[lola][.] 46 LTL EXCL 128/1087 92/2000 DLCround-PT-07b-LTLCardinality-11 8489404 m, 66257 m/sec, 9166195 t fired, .
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[lola][.] 46 LTL EXCL 133/1087 95/2000 DLCround-PT-07b-LTLCardinality-11 8818347 m, 65788 m/sec, 9522969 t fired, .
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[lola][.] 46 LTL EXCL 138/1087 98/2000 DLCround-PT-07b-LTLCardinality-11 9146734 m, 65677 m/sec, 9876625 t fired, .
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[lola][.] 46 LTL EXCL 158/1087 112/2000 DLCround-PT-07b-LTLCardinality-11 10458356 m, 65485 m/sec, 11291539 t fired, .
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[lola][.] 46 LTL EXCL 163/1087 115/2000 DLCround-PT-07b-LTLCardinality-11 10784987 m, 65326 m/sec, 11644313 t fired, .
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[lola][.] 46 LTL EXCL 168/1087 119/2000 DLCround-PT-07b-LTLCardinality-11 11112407 m, 65484 m/sec, 11998872 t fired, .
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[lola][.] 46 LTL EXCL 173/1087 122/2000 DLCround-PT-07b-LTLCardinality-11 11439078 m, 65334 m/sec, 12351453 t fired, .
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[lola][.] 46 LTL EXCL 328/1087 232/2000 DLCround-PT-07b-LTLCardinality-11 21788256 m, 66127 m/sec, 23556541 t fired, .
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[lola][.] 46 LTL EXCL 333/1087 235/2000 DLCround-PT-07b-LTLCardinality-11 22117993 m, 65947 m/sec, 23912544 t fired, .
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[lola][.] 46 LTL EXCL 338/1087 239/2000 DLCround-PT-07b-LTLCardinality-11 22447500 m, 65901 m/sec, 24271711 t fired, .
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[lola][.] 46 LTL EXCL 383/1087 269/2000 DLCround-PT-07b-LTLCardinality-11 25390347 m, 65442 m/sec, 27464567 t fired, .
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[lola][.] 46 LTL EXCL 388/1087 273/2000 DLCround-PT-07b-LTLCardinality-11 25720990 m, 66128 m/sec, 27820602 t fired, .
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[lola][.] 46 LTL EXCL 393/1087 276/2000 DLCround-PT-07b-LTLCardinality-11 26047825 m, 65367 m/sec, 28175147 t fired, .
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[lola][.] 46 LTL EXCL 443/1087 309/2000 DLCround-PT-07b-LTLCardinality-11 29194736 m, 63929 m/sec, 31586024 t fired, .
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[lola][.] 46 LTL EXCL 498/1087 345/2000 DLCround-PT-07b-LTLCardinality-11 32704917 m, 63748 m/sec, 35388456 t fired, .
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[lola][.] 46 LTL EXCL 553/1087 381/2000 DLCround-PT-07b-LTLCardinality-11 36219400 m, 63371 m/sec, 39189429 t fired, .
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[lola][.] 46 LTL EXCL 669/1087 457/2000 DLCround-PT-07b-LTLCardinality-11 43512202 m, 63480 m/sec, 47083072 t fired, .
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[lola][.] 46 LTL EXCL 724/1087 492/2000 DLCround-PT-07b-LTLCardinality-11 46971586 m, 62069 m/sec, 50831909 t fired, .
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[lola][.] 46 LTL EXCL 729/1087 495/2000 DLCround-PT-07b-LTLCardinality-11 47283865 m, 62455 m/sec, 51169573 t fired, .
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[lola][.] 46 LTL EXCL 734/1087 499/2000 DLCround-PT-07b-LTLCardinality-11 47590997 m, 61426 m/sec, 51503205 t fired, .
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[lola][.] 46 LTL EXCL 739/1087 502/2000 DLCround-PT-07b-LTLCardinality-11 47903165 m, 62433 m/sec, 51841401 t fired, .
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[lola][.] 46 LTL EXCL 779/1087 527/2000 DLCround-PT-07b-LTLCardinality-11 50387643 m, 62423 m/sec, 54535849 t fired, .
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[lola][.] 46 LTL EXCL 784/1087 530/2000 DLCround-PT-07b-LTLCardinality-11 50695569 m, 61585 m/sec, 54870615 t fired, .
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[lola][.] 46 LTL EXCL 789/1087 534/2000 DLCround-PT-07b-LTLCardinality-11 51001219 m, 61130 m/sec, 55201961 t fired, .
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[lola][.] 46 LTL EXCL 794/1087 537/2000 DLCround-PT-07b-LTLCardinality-11 51306891 m, 61134 m/sec, 55530843 t fired, .
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[lola][.] 46 LTL EXCL 799/1087 540/2000 DLCround-PT-07b-LTLCardinality-11 51611219 m, 60865 m/sec, 55860078 t fired, .
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[lola][.] 46 LTL EXCL 804/1087 543/2000 DLCround-PT-07b-LTLCardinality-11 51919701 m, 61696 m/sec, 56194869 t fired, .
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[lola][.] 46 LTL EXCL 809/1087 546/2000 DLCround-PT-07b-LTLCardinality-11 52227398 m, 61539 m/sec, 56530048 t fired, .
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[lola][.] 46 LTL EXCL 814/1087 549/2000 DLCround-PT-07b-LTLCardinality-11 52533077 m, 61135 m/sec, 56862350 t fired, .
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[lola][.] 46 LTL EXCL 819/1087 552/2000 DLCround-PT-07b-LTLCardinality-11 52840931 m, 61570 m/sec, 57201868 t fired, .
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[lola][.] 46 LTL EXCL 824/1087 556/2000 DLCround-PT-07b-LTLCardinality-11 53151733 m, 62160 m/sec, 57538275 t fired, .
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[lola][.] 46 LTL EXCL 829/1087 559/2000 DLCround-PT-07b-LTLCardinality-11 53461635 m, 61980 m/sec, 57873357 t fired, .
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[lola][.] 46 LTL EXCL 834/1087 562/2000 DLCround-PT-07b-LTLCardinality-11 53771242 m, 61921 m/sec, 58207384 t fired, .
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[lola][.] 46 LTL EXCL 839/1087 565/2000 DLCround-PT-07b-LTLCardinality-11 54080296 m, 61810 m/sec, 58541405 t fired, .
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[lola][.] 46 LTL EXCL 844/1087 568/2000 DLCround-PT-07b-LTLCardinality-11 54386553 m, 61251 m/sec, 58874165 t fired, .
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[lola][.] 46 LTL EXCL 854/1087 574/2000 DLCround-PT-07b-LTLCardinality-11 54995935 m, 60782 m/sec, 59531637 t fired, .
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[lola][.] 46 LTL EXCL 859/1087 578/2000 DLCround-PT-07b-LTLCardinality-11 55301945 m, 61202 m/sec, 59861411 t fired, .
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[lola][.] 46 LTL EXCL 894/1087 599/2000 DLCround-PT-07b-LTLCardinality-11 57451781 m, 61174 m/sec, 62188147 t fired, .
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[lola][.] 46 LTL EXCL 899/1087 602/2000 DLCround-PT-07b-LTLCardinality-11 57756153 m, 60874 m/sec, 62516703 t fired, .
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[lola][.] 46 LTL EXCL 904/1087 605/2000 DLCround-PT-07b-LTLCardinality-11 58059571 m, 60683 m/sec, 62844033 t fired, .
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[lola][.] 46 LTL EXCL 909/1087 608/2000 DLCround-PT-07b-LTLCardinality-11 58363636 m, 60813 m/sec, 63173594 t fired, .
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[lola][.] 46 LTL EXCL 914/1087 612/2000 DLCround-PT-07b-LTLCardinality-11 58668595 m, 60991 m/sec, 63505877 t fired, .
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[lola][.] 46 LTL EXCL 919/1087 615/2000 DLCround-PT-07b-LTLCardinality-11 58977101 m, 61701 m/sec, 63842157 t fired, .
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[lola][.] 46 LTL EXCL 924/1087 618/2000 DLCround-PT-07b-LTLCardinality-11 59290120 m, 62603 m/sec, 64183380 t fired, .
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[lola][.] DLCround-PT-07b-LTLCardinality-09: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-10: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-12: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-13: INITIAL true preprocessing
[lola][.] DLCround-PT-07b-LTLCardinality-14: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-07b-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-11: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 46 LTL EXCL 952/1087 630/2000 DLCround-PT-07b-LTLCardinality-11 60508672 m, 13589 m/sec, 65501492 t fired, .
[lola][.]
[lola][.] Time elapsed: 1290 secs. Pages in use: 630
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCround-PT-07b-LTLCardinality-00: INITIAL false preprocessing
[lola][.] DLCround-PT-07b-LTLCardinality-02: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-03: CONJ false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-04: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-05: CONJ true CONJ
[lola][.] DLCround-PT-07b-LTLCardinality-07: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-08: CONJ false state space /ER
[lola][.] DLCround-PT-07b-LTLCardinality-09: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-10: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-12: LTL false LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-13: INITIAL true preprocessing
[lola][.] DLCround-PT-07b-LTLCardinality-14: LTL true LTL model checker
[lola][.] DLCround-PT-07b-LTLCardinality-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-07b-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07b-LTLCardinality-11: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 46 LTL EXCL 958/1087 630/2000 DLCround-PT-07b-LTLCardinality-11 60511650 m, 595 m/sec, 65504640 t fired, .
[lola][.]
[lola][.] Time elapsed: 1296 secs. Pages in use: 630
[lola][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 405 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-07b"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is DLCround-PT-07b, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r115-smll-171624276500187"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-07b.tgz
mv DLCround-PT-07b execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;