fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r115-smll-171624276500178
Last Updated
July 7, 2024

About the Execution of LoLA for DLCround-PT-07a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16199.655 551953.00 721066.00 2583.90 ????T???F??????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r115-smll-171624276500178.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is DLCround-PT-07a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r115-smll-171624276500178
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 888K
-rw-r--r-- 1 mcc users 6.7K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 71K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Apr 22 14:38 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 22 14:38 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Apr 22 14:38 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 22 14:38 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Apr 13 14:50 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 124K Apr 13 14:50 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Apr 13 14:30 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 107K Apr 13 14:30 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:38 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:38 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 398K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-07a-CTLFireability-2024-00
FORMULA_NAME DLCround-PT-07a-CTLFireability-2024-01
FORMULA_NAME DLCround-PT-07a-CTLFireability-2024-02
FORMULA_NAME DLCround-PT-07a-CTLFireability-2024-03
FORMULA_NAME DLCround-PT-07a-CTLFireability-2024-04
FORMULA_NAME DLCround-PT-07a-CTLFireability-2024-05
FORMULA_NAME DLCround-PT-07a-CTLFireability-2024-06
FORMULA_NAME DLCround-PT-07a-CTLFireability-2024-07
FORMULA_NAME DLCround-PT-07a-CTLFireability-2024-08
FORMULA_NAME DLCround-PT-07a-CTLFireability-2024-09
FORMULA_NAME DLCround-PT-07a-CTLFireability-2024-10
FORMULA_NAME DLCround-PT-07a-CTLFireability-2024-11
FORMULA_NAME DLCround-PT-07a-CTLFireability-2023-12
FORMULA_NAME DLCround-PT-07a-CTLFireability-2023-13
FORMULA_NAME DLCround-PT-07a-CTLFireability-2023-14
FORMULA_NAME DLCround-PT-07a-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717073672795

FORMULA DLCround-PT-07a-CTLFireability-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-07a-CTLFireability-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1717074224748

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from CTLFireability.xml
[lola][I] LAUNCH task # 49 (type SKEL/FNDP) for 12 DLCround-PT-07a-CTLFireability-2024-04
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 50 (type SKEL/EQUN) for 12 DLCround-PT-07a-CTLFireability-2024-04
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 51 (type SKEL/SRCH) for 12 DLCround-PT-07a-CTLFireability-2024-04
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 51 (type SKEL/SRCH) for DLCround-PT-07a-CTLFireability-2024-04
[lola][I] result : true
[lola][I] markings : 6
[lola][I] fired transitions : 5
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][W] CANCELED task # 49 (type FNDP) for DLCround-PT-07a-CTLFireability-2024-04 (obsolete)
[lola][W] CANCELED task # 50 (type EQUN) for DLCround-PT-07a-CTLFireability-2024-04 (obsolete)
[lola][I] FINISHED task # 49 (type SKEL/FNDP) for DLCround-PT-07a-CTLFireability-2024-04
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][I] FINISHED task # 50 (type SKEL/EQUN) for DLCround-PT-07a-CTLFireability-2024-04
[lola][I] result : false
[lola][I] Rule S: 0 transitions removed,0 places removed
[lola][I] LAUNCH task # 1 (type EXCL) for 0 DLCround-PT-07a-CTLFireability-2024-00
[lola][I] time limit : 179 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 54 (type SKEL/FNDP) for 24 DLCround-PT-07a-CTLFireability-2024-08
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 55 (type SKEL/EQUN) for 24 DLCround-PT-07a-CTLFireability-2024-08
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 56 (type SKEL/SRCH) for 24 DLCround-PT-07a-CTLFireability-2024-08
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 54 (type SKEL/FNDP) for DLCround-PT-07a-CTLFireability-2024-08
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][W] CANCELED task # 55 (type EQUN) for DLCround-PT-07a-CTLFireability-2024-08 (obsolete)
[lola][W] CANCELED task # 56 (type SRCH) for DLCround-PT-07a-CTLFireability-2024-08 (obsolete)
[lola][I] FINISHED task # 55 (type SKEL/EQUN) for DLCround-PT-07a-CTLFireability-2024-08
[lola][I] result : false
[lola][I] LAUNCH task # 57 (type FNDP) for 12 DLCround-PT-07a-CTLFireability-2024-04
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 58 (type EQUN) for 12 DLCround-PT-07a-CTLFireability-2024-04
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 57 (type FNDP) for DLCround-PT-07a-CTLFireability-2024-04
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][W] CANCELED task # 58 (type EQUN) for DLCround-PT-07a-CTLFireability-2024-04 (obsolete)
[lola][I] FINISHED task # 58 (type EQUN) for DLCround-PT-07a-CTLFireability-2024-04
[lola][I] result : true
[lola][I] LAUNCH task # 63 (type FNDP) for 24 DLCround-PT-07a-CTLFireability-2024-08
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 64 (type EQUN) for 24 DLCround-PT-07a-CTLFireability-2024-08
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 63 (type FNDP) for DLCround-PT-07a-CTLFireability-2024-08
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][W] CANCELED task # 64 (type EQUN) for DLCround-PT-07a-CTLFireability-2024-08 (obsolete)
[lola][I] FINISHED task # 64 (type EQUN) for DLCround-PT-07a-CTLFireability-2024-08
[lola][I] result : true
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCround-PT-07a-CTLFireability-2024-04: EF true findpath
[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-07a-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-02: SP ECTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 1 CTL EXCL 5/257 1/2000 DLCround-PT-07a-CTLFireability-2024-00 129761 m, 25952 m/sec, 5162453 t fired, .
[lola][.]
[lola][.] Time elapsed: 6 secs. Pages in use: 2
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCround-PT-07a-CTLFireability-2024-04: EF true findpath
[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-07a-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-02: SP ECTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 1 CTL EXCL 10/257 2/2000 DLCround-PT-07a-CTLFireability-2024-00 290473 m, 32142 m/sec, 11810974 t fired, .
[lola][.]
[lola][.] Time elapsed: 11 secs. Pages in use: 2
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCround-PT-07a-CTLFireability-2024-04: EF true findpath
[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-07a-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-02: SP ECTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 1 CTL EXCL 15/257 2/2000 DLCround-PT-07a-CTLFireability-2024-00 459871 m, 33879 m/sec, 18885849 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-04: EF true findpath
[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] DLCround-PT-07a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-02: SP ECTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 1 CTL EXCL 20/257 3/2000 DLCround-PT-07a-CTLFireability-2024-00 636231 m, 35272 m/sec, 26139442 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-04: EF true findpath
[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-07a-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-02: SP ECTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 1 CTL EXCL 25/257 4/2000 DLCround-PT-07a-CTLFireability-2024-00 792014 m, 31156 m/sec, 33199925 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-04: EF true findpath
[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-07a-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-02: SP ECTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 1 CTL EXCL 30/257 5/2000 DLCround-PT-07a-CTLFireability-2024-00 982778 m, 38152 m/sec, 39746870 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-04: EF true findpath
[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-07a-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-02: SP ECTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 1 CTL EXCL 35/257 6/2000 DLCround-PT-07a-CTLFireability-2024-00 1321646 m, 67773 m/sec, 46547030 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-04: EF true findpath
[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-07a-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-02: SP ECTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 1 CTL EXCL 40/257 7/2000 DLCround-PT-07a-CTLFireability-2024-00 1664897 m, 68650 m/sec, 53286849 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-04: EF true findpath
[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-07a-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-02: SP ECTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 1 CTL EXCL 45/257 9/2000 DLCround-PT-07a-CTLFireability-2024-00 2017347 m, 70490 m/sec, 60210989 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-04: EF true findpath
[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-07a-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-02: SP ECTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 1 CTL EXCL 50/257 10/2000 DLCround-PT-07a-CTLFireability-2024-00 2352790 m, 67088 m/sec, 66901868 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-04: EF true findpath
[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-07a-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-02: SP ECTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 1 CTL EXCL 55/257 12/2000 DLCround-PT-07a-CTLFireability-2024-00 2684053 m, 66252 m/sec, 73399084 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-04: EF true findpath
[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-07a-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-02: SP ECTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 1 CTL EXCL 60/257 13/2000 DLCround-PT-07a-CTLFireability-2024-00 3019849 m, 67159 m/sec, 80044963 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-04: EF true findpath
[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-07a-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-02: SP ECTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 1 CTL EXCL 65/257 14/2000 DLCround-PT-07a-CTLFireability-2024-00 3349159 m, 65862 m/sec, 86621524 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-04: EF true findpath
[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
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[lola][.] DLCround-PT-07a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-02: SP ECTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 1 CTL EXCL 70/257 16/2000 DLCround-PT-07a-CTLFireability-2024-00 3697533 m, 69674 m/sec, 93496597 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-04: EF true findpath
[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
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[lola][.] DLCround-PT-07a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-02: SP ECTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 1 CTL EXCL 75/257 17/2000 DLCround-PT-07a-CTLFireability-2024-00 4028143 m, 66122 m/sec, 100161161 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-04: EF true findpath
[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
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[lola][.] DLCround-PT-07a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-02: SP ECTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 1 CTL EXCL 80/257 18/2000 DLCround-PT-07a-CTLFireability-2024-00 4371383 m, 68648 m/sec, 106878938 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-04: EF true findpath
[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] DLCround-PT-07a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-02: SP ECTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 1 CTL EXCL 85/257 20/2000 DLCround-PT-07a-CTLFireability-2024-00 4718070 m, 69337 m/sec, 113735679 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-04: EF true findpath
[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
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[lola][.] DLCround-PT-07a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-02: SP ECTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 1 CTL EXCL 90/257 21/2000 DLCround-PT-07a-CTLFireability-2024-00 5076321 m, 71650 m/sec, 120656937 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-04: EF true findpath
[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] DLCround-PT-07a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-02: SP ECTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 1 CTL EXCL 95/257 23/2000 DLCround-PT-07a-CTLFireability-2024-00 5411749 m, 67085 m/sec, 127384225 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-04: EF true findpath
[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
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[lola][.] DLCround-PT-07a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-02: SP ECTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 1 CTL EXCL 100/257 24/2000 DLCround-PT-07a-CTLFireability-2024-00 5745802 m, 66810 m/sec, 134061393 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
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[lola][.] DLCround-PT-07a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-02: SP ECTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 1 CTL EXCL 105/257 25/2000 DLCround-PT-07a-CTLFireability-2024-00 6026821 m, 56203 m/sec, 139713152 t fired, .
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[lola][I] markings : 6026821
[lola][I] fired transitions : 139713163
[lola][I] time used : 106
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[lola][I] LAUNCH task # 43 (type EXCL) for 42 DLCround-PT-07a-CTLFireability-2023-14
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[lola][I] FINISHED task # 43 (type EXCL) for DLCround-PT-07a-CTLFireability-2023-14
[lola][I] result : true
[lola][I] markings : 147
[lola][I] fired transitions : 3154
[lola][I] time used : 0
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[lola][I] LAUNCH task # 40 (type EXCL) for 39 DLCround-PT-07a-CTLFireability-2023-13
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[lola][I] result : true
[lola][I] markings : 83622
[lola][I] fired transitions : 1733149
[lola][I] time used : 2
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 37 (type EXCL) for 36 DLCround-PT-07a-CTLFireability-2023-12
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[lola][.] DLCround-PT-07a-CTLFireability-2024-00: CTL false CTL model checker
[lola][.] DLCround-PT-07a-CTLFireability-2024-04: EF true findpath
[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
[lola][.] DLCround-PT-07a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCround-PT-07a-CTLFireability-2023-14: CTL true CTL model checker
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[lola][.] DLCround-PT-07a-CTLFireability-2024-02: SP ECTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 37 CTL EXCL 2/317 1/2000 DLCround-PT-07a-CTLFireability-2023-12 66449 m, 13289 m/sec, 2706239 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-04: EF true findpath
[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
[lola][.] DLCround-PT-07a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCround-PT-07a-CTLFireability-2023-14: CTL true CTL model checker
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[lola][.] DLCround-PT-07a-CTLFireability-2024-02: SP ECTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 37 CTL EXCL 7/317 2/2000 DLCround-PT-07a-CTLFireability-2023-12 267700 m, 40250 m/sec, 9290812 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 37 CTL EXCL 12/317 2/2000 DLCround-PT-07a-CTLFireability-2023-12 429264 m, 32312 m/sec, 15908786 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
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[lola][.] 37 CTL EXCL 17/317 3/2000 DLCround-PT-07a-CTLFireability-2023-12 569058 m, 27958 m/sec, 21682505 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
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[lola][.] 37 CTL EXCL 22/317 3/2000 DLCround-PT-07a-CTLFireability-2023-12 715100 m, 29208 m/sec, 27759443 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
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[lola][.] 37 CTL EXCL 27/317 4/2000 DLCround-PT-07a-CTLFireability-2023-12 857854 m, 28550 m/sec, 33826156 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 37 CTL EXCL 32/317 5/2000 DLCround-PT-07a-CTLFireability-2023-12 996649 m, 27759 m/sec, 39846576 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
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[lola][.] 37 CTL EXCL 37/317 5/2000 DLCround-PT-07a-CTLFireability-2023-12 1134223 m, 27514 m/sec, 45828795 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
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[lola][.] 37 CTL EXCL 42/317 6/2000 DLCround-PT-07a-CTLFireability-2023-12 1249157 m, 22986 m/sec, 50899219 t fired, .
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[lola][.] 37 CTL EXCL 47/317 6/2000 DLCround-PT-07a-CTLFireability-2023-12 1410441 m, 32256 m/sec, 56952193 t fired, .
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[lola][.] 37 CTL EXCL 52/317 7/2000 DLCround-PT-07a-CTLFireability-2023-12 1572502 m, 32412 m/sec, 62887460 t fired, .
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[lola][.] 37 CTL EXCL 57/317 8/2000 DLCround-PT-07a-CTLFireability-2023-12 1717693 m, 29038 m/sec, 68488536 t fired, .
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 37 CTL EXCL 62/317 8/2000 DLCround-PT-07a-CTLFireability-2023-12 1866442 m, 29749 m/sec, 74071360 t fired, .
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[lola][.] 37 CTL EXCL 67/317 9/2000 DLCround-PT-07a-CTLFireability-2023-12 2014717 m, 29655 m/sec, 79657106 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
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[lola][.] 37 CTL EXCL 72/317 9/2000 DLCround-PT-07a-CTLFireability-2023-12 2159729 m, 29002 m/sec, 85511460 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
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[lola][.] 37 CTL EXCL 77/317 10/2000 DLCround-PT-07a-CTLFireability-2023-12 2301677 m, 28389 m/sec, 91271022 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
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[lola][.] 37 CTL EXCL 82/317 11/2000 DLCround-PT-07a-CTLFireability-2023-12 2436891 m, 27042 m/sec, 97000939 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
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[lola][.] 37 CTL EXCL 87/317 11/2000 DLCround-PT-07a-CTLFireability-2023-12 2567090 m, 26039 m/sec, 102646353 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
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[lola][.] 37 CTL EXCL 92/317 12/2000 DLCround-PT-07a-CTLFireability-2023-12 2699368 m, 26455 m/sec, 108313283 t fired, .
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[lola][.] 37 CTL EXCL 97/317 12/2000 DLCround-PT-07a-CTLFireability-2023-12 2825762 m, 25278 m/sec, 113915637 t fired, .
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[lola][.] 37 CTL EXCL 102/317 13/2000 DLCround-PT-07a-CTLFireability-2023-12 2962342 m, 27316 m/sec, 119612514 t fired, .
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[lola][.] 37 CTL EXCL 107/317 13/2000 DLCround-PT-07a-CTLFireability-2023-12 3092035 m, 25938 m/sec, 125228687 t fired, .
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[lola][.] 37 CTL EXCL 112/317 14/2000 DLCround-PT-07a-CTLFireability-2023-12 3221900 m, 25973 m/sec, 130875847 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 37 CTL EXCL 117/317 14/2000 DLCround-PT-07a-CTLFireability-2023-12 3352569 m, 26133 m/sec, 136502983 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
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[lola][.] 37 CTL EXCL 122/317 15/2000 DLCround-PT-07a-CTLFireability-2023-12 3491810 m, 27848 m/sec, 142157774 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
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[lola][.] 37 CTL EXCL 127/317 16/2000 DLCround-PT-07a-CTLFireability-2023-12 3630287 m, 27695 m/sec, 147664392 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
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[lola][.] 37 CTL EXCL 132/317 16/2000 DLCround-PT-07a-CTLFireability-2023-12 3775635 m, 29069 m/sec, 152954343 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
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[lola][.] 37 CTL EXCL 137/317 17/2000 DLCround-PT-07a-CTLFireability-2023-12 3907781 m, 26429 m/sec, 158398885 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
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[lola][.] 37 CTL EXCL 142/317 17/2000 DLCround-PT-07a-CTLFireability-2023-12 4035631 m, 25570 m/sec, 163843829 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
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[lola][.] 37 CTL EXCL 147/317 18/2000 DLCround-PT-07a-CTLFireability-2023-12 4169465 m, 26766 m/sec, 169256706 t fired, .
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[lola][.] 37 CTL EXCL 152/317 18/2000 DLCround-PT-07a-CTLFireability-2023-12 4296239 m, 25354 m/sec, 174757728 t fired, .
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[lola][.] 37 CTL EXCL 157/317 19/2000 DLCround-PT-07a-CTLFireability-2023-12 4422752 m, 25302 m/sec, 180198509 t fired, .
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[lola][.] 37 CTL EXCL 162/317 19/2000 DLCround-PT-07a-CTLFireability-2023-12 4548985 m, 25246 m/sec, 185500811 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 37 CTL EXCL 172/317 20/2000 DLCround-PT-07a-CTLFireability-2023-12 4808778 m, 26819 m/sec, 196313902 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
[lola][.] DLCround-PT-07a-CTLFireability-2023-13: CTL true CTL model checker
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 37 CTL EXCL 177/317 21/2000 DLCround-PT-07a-CTLFireability-2023-12 4945428 m, 27330 m/sec, 202037946 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
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[lola][.] 37 CTL EXCL 182/317 22/2000 DLCround-PT-07a-CTLFireability-2023-12 5111509 m, 33216 m/sec, 208355370 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
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[lola][.] 37 CTL EXCL 187/317 22/2000 DLCround-PT-07a-CTLFireability-2023-12 5305794 m, 38857 m/sec, 214315587 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
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[lola][.] 37 CTL EXCL 192/317 23/2000 DLCround-PT-07a-CTLFireability-2023-12 5490783 m, 36997 m/sec, 219976468 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
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[lola][.] 37 CTL EXCL 197/317 24/2000 DLCround-PT-07a-CTLFireability-2023-12 5617779 m, 25399 m/sec, 225299160 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
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[lola][.] 37 CTL EXCL 202/317 24/2000 DLCround-PT-07a-CTLFireability-2023-12 5743945 m, 25233 m/sec, 230562072 t fired, .
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[lola][.] 37 CTL EXCL 207/317 25/2000 DLCround-PT-07a-CTLFireability-2023-12 5872525 m, 25716 m/sec, 236005890 t fired, .
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[lola][.] 37 CTL EXCL 212/317 25/2000 DLCround-PT-07a-CTLFireability-2023-12 6011449 m, 27784 m/sec, 241800764 t fired, .
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[lola][.] 37 CTL EXCL 217/317 26/2000 DLCround-PT-07a-CTLFireability-2023-12 6150668 m, 27843 m/sec, 247469261 t fired, .
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[lola][.] 37 CTL EXCL 222/317 26/2000 DLCround-PT-07a-CTLFireability-2023-12 6282782 m, 26422 m/sec, 253051429 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
[lola][.] DLCround-PT-07a-CTLFireability-2023-13: CTL true CTL model checker
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 37 CTL EXCL 227/317 27/2000 DLCround-PT-07a-CTLFireability-2023-12 6412341 m, 25911 m/sec, 258646730 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 37 CTL EXCL 232/317 28/2000 DLCround-PT-07a-CTLFireability-2023-12 6539861 m, 25504 m/sec, 264233281 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
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[lola][.] 37 CTL EXCL 237/317 28/2000 DLCround-PT-07a-CTLFireability-2023-12 6668952 m, 25818 m/sec, 269825762 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
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[lola][.] 37 CTL EXCL 242/317 29/2000 DLCround-PT-07a-CTLFireability-2023-12 6801353 m, 26480 m/sec, 275417530 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
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[lola][.] 37 CTL EXCL 247/317 29/2000 DLCround-PT-07a-CTLFireability-2023-12 6927300 m, 25189 m/sec, 280888978 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-04: EF true findpath
[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
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[lola][.] 37 CTL EXCL 252/317 30/2000 DLCround-PT-07a-CTLFireability-2023-12 7067276 m, 27995 m/sec, 286493003 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
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[lola][.] 37 CTL EXCL 257/317 30/2000 DLCround-PT-07a-CTLFireability-2023-12 7212551 m, 29055 m/sec, 291779994 t fired, .
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[lola][.] 37 CTL EXCL 262/317 31/2000 DLCround-PT-07a-CTLFireability-2023-12 7343571 m, 26204 m/sec, 297162656 t fired, .
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[lola][.] 37 CTL EXCL 267/317 31/2000 DLCround-PT-07a-CTLFireability-2023-12 7471386 m, 25563 m/sec, 302669165 t fired, .
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[lola][.] 37 CTL EXCL 272/317 32/2000 DLCround-PT-07a-CTLFireability-2023-12 7595496 m, 24822 m/sec, 308082155 t fired, .
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[lola][.] 37 CTL EXCL 277/317 32/2000 DLCround-PT-07a-CTLFireability-2023-12 7725070 m, 25914 m/sec, 313577986 t fired, .
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[lola][.] 37 CTL EXCL 282/317 33/2000 DLCround-PT-07a-CTLFireability-2023-12 7849080 m, 24802 m/sec, 318952687 t fired, .
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[lola][.] 37 CTL EXCL 287/317 34/2000 DLCround-PT-07a-CTLFireability-2023-12 7979644 m, 26112 m/sec, 324413168 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
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[lola][.] 34 CTL EXCL 10/316 2/2000 DLCround-PT-07a-CTLFireability-2024-11 330672 m, 32016 m/sec, 12408668 t fired, .
[lola][.] 37 CTL EXCL 10/288 2/5 DLCround-PT-07a-CTLFireability-2023-12 342606 m, 33050 m/sec, 12373449 t fired, .
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[lola][.] 34 CTL EXCL 15/316 3/2000 DLCround-PT-07a-CTLFireability-2024-11 487088 m, 31283 m/sec, 18575809 t fired, .
[lola][.] 37 CTL EXCL 15/288 2/5 DLCround-PT-07a-CTLFireability-2023-12 477515 m, 26981 m/sec, 17933575 t fired, .
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[lola][.] 34 CTL EXCL 20/316 3/2000 DLCround-PT-07a-CTLFireability-2024-11 640626 m, 30707 m/sec, 24511422 t fired, .
[lola][.] 37 CTL EXCL 20/288 3/5 DLCround-PT-07a-CTLFireability-2023-12 609052 m, 26307 m/sec, 23270923 t fired, .
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[lola][.] 34 CTL EXCL 25/316 4/2000 DLCround-PT-07a-CTLFireability-2024-11 786279 m, 29130 m/sec, 30447100 t fired, .
[lola][.] 37 CTL EXCL 25/288 4/5 DLCround-PT-07a-CTLFireability-2023-12 733204 m, 24830 m/sec, 28528722 t fired, .
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[lola][.] 34 CTL EXCL 30/316 4/2000 DLCround-PT-07a-CTLFireability-2024-11 927020 m, 28148 m/sec, 36217749 t fired, .
[lola][.] 37 CTL EXCL 30/288 4/5 DLCround-PT-07a-CTLFireability-2023-12 855513 m, 24461 m/sec, 33740043 t fired, .
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[lola][.] 34 CTL EXCL 35/316 5/2000 DLCround-PT-07a-CTLFireability-2024-11 1065194 m, 27634 m/sec, 42012922 t fired, .
[lola][.] 37 CTL EXCL 35/288 5/5 DLCround-PT-07a-CTLFireability-2023-12 976514 m, 24200 m/sec, 38954431 t fired, .
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[lola][.] 34 CTL EXCL 40/316 5/2000 DLCround-PT-07a-CTLFireability-2024-11 1203251 m, 27611 m/sec, 47813582 t fired, .
[lola][.] 37 CTL EXCL 40/288 5/5 DLCround-PT-07a-CTLFireability-2023-12 1096801 m, 24057 m/sec, 44200942 t fired, .
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[lola][.] 34 CTL EXCL 45/316 6/2000 DLCround-PT-07a-CTLFireability-2024-11 1373563 m, 34062 m/sec, 53933063 t fired, .
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[lola][.] 34 CTL EXCL 50/316 7/2000 DLCround-PT-07a-CTLFireability-2024-11 1554578 m, 36203 m/sec, 60239664 t fired, .
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[lola][.] 34 CTL EXCL 55/316 8/2000 DLCround-PT-07a-CTLFireability-2024-11 1724614 m, 34007 m/sec, 66460631 t fired, .
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[lola][.] 34 CTL EXCL 60/316 8/2000 DLCround-PT-07a-CTLFireability-2024-11 1888406 m, 32758 m/sec, 72590760 t fired, .
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[lola][.] 34 CTL EXCL 65/316 9/2000 DLCround-PT-07a-CTLFireability-2024-11 2057049 m, 33728 m/sec, 78840266 t fired, .
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[lola][.] 34 CTL EXCL 70/316 10/2000 DLCround-PT-07a-CTLFireability-2024-11 2223009 m, 33192 m/sec, 85298858 t fired, .
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[lola][.] 34 CTL EXCL 80/316 11/2000 DLCround-PT-07a-CTLFireability-2024-11 2530839 m, 29631 m/sec, 97797160 t fired, .
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[lola][.] 34 CTL EXCL 85/316 12/2000 DLCround-PT-07a-CTLFireability-2024-11 2680075 m, 29847 m/sec, 103949254 t fired, .
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[lola][.] DLCround-PT-07a-CTLFireability-2024-02: SP ECTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 34 CTL EXCL 115/316 15/2000 DLCround-PT-07a-CTLFireability-2024-11 3600087 m, 33057 m/sec, 140923647 t fired, .
[lola][.]
[lola][.] Time elapsed: 546 secs. Pages in use: 66
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCround-PT-07a-CTLFireability-2024-00: CTL false CTL model checker
[lola][.] DLCround-PT-07a-CTLFireability-2024-04: EF true findpath
[lola][.] DLCround-PT-07a-CTLFireability-2024-08: AG false findpath
[lola][.] DLCround-PT-07a-CTLFireability-2023-13: CTL true CTL model checker
[lola][.] DLCround-PT-07a-CTLFireability-2023-14: CTL true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-07a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-02: SP ECTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-03: AFAG 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[lola][.] DLCround-PT-07a-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 34 CTL EXCL 120/316 16/2000 DLCround-PT-07a-CTLFireability-2024-11 3731156 m, 26213 m/sec, 145414326 t fired, .
[lola][.]
[lola][.] Time elapsed: 551 secs. Pages in use: 67
[lola][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 408 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-07a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is DLCround-PT-07a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r115-smll-171624276500178"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-07a.tgz
mv DLCround-PT-07a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;