fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r115-smll-171624276500171
Last Updated
July 7, 2024

About the Execution of LoLA for DLCround-PT-06b

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16203.768 844558.00 853049.00 3395.80 FFFFF????T?FF??? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r115-smll-171624276500171.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is DLCround-PT-06b, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r115-smll-171624276500171
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.2M
-rw-r--r-- 1 mcc users 7.9K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 90K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Apr 22 14:38 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Apr 22 14:38 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Apr 22 14:38 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 22 14:38 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.5K Apr 13 13:15 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 72K Apr 13 13:15 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.7K Apr 13 13:15 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 41K Apr 13 13:15 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:38 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:38 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 813K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-06b-LTLCardinality-00
FORMULA_NAME DLCround-PT-06b-LTLCardinality-01
FORMULA_NAME DLCround-PT-06b-LTLCardinality-02
FORMULA_NAME DLCround-PT-06b-LTLCardinality-03
FORMULA_NAME DLCround-PT-06b-LTLCardinality-04
FORMULA_NAME DLCround-PT-06b-LTLCardinality-05
FORMULA_NAME DLCround-PT-06b-LTLCardinality-06
FORMULA_NAME DLCround-PT-06b-LTLCardinality-07
FORMULA_NAME DLCround-PT-06b-LTLCardinality-08
FORMULA_NAME DLCround-PT-06b-LTLCardinality-09
FORMULA_NAME DLCround-PT-06b-LTLCardinality-10
FORMULA_NAME DLCround-PT-06b-LTLCardinality-11
FORMULA_NAME DLCround-PT-06b-LTLCardinality-12
FORMULA_NAME DLCround-PT-06b-LTLCardinality-13
FORMULA_NAME DLCround-PT-06b-LTLCardinality-14
FORMULA_NAME DLCround-PT-06b-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1717072067189

FORMULA DLCround-PT-06b-LTLCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-06b-LTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-06b-LTLCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-06b-LTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-06b-LTLCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-06b-LTLCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-06b-LTLCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-06b-LTLCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1717072911747

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from LTLCardinality.xml
[lola][I] Rule S: 0 transitions removed,0 places removed
[lola][I] LAUNCH task # 4 (type CNST) for 3 DLCround-PT-06b-LTLCardinality-01
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] LAUNCH task # 7 (type CNST) for 6 DLCround-PT-06b-LTLCardinality-02
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 7 (type CNST) for DLCround-PT-06b-LTLCardinality-02
[lola][I] result : false
[lola][I] LAUNCH task # 10 (type CNST) for 9 DLCround-PT-06b-LTLCardinality-03
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 4 (type CNST) for DLCround-PT-06b-LTLCardinality-01
[lola][I] result : false
[lola][I] FINISHED task # 10 (type CNST) for DLCround-PT-06b-LTLCardinality-03
[lola][I] result : false
[lola][I] LAUNCH task # 13 (type CNST) for 12 DLCround-PT-06b-LTLCardinality-04
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 13 (type CNST) for DLCround-PT-06b-LTLCardinality-04
[lola][I] result : false
[lola][I] LAUNCH task # 49 (type CNST) for 46 DLCround-PT-06b-LTLCardinality-14
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 49 (type CNST) for DLCround-PT-06b-LTLCardinality-14
[lola][I] result : true
[lola][I] LAUNCH task # 37 (type EXCL) for 36 DLCround-PT-06b-LTLCardinality-12
[lola][I] time limit : 261 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 37 (type EXCL) for DLCround-PT-06b-LTLCardinality-12
[lola][I] result : false
[lola][I] markings : 98
[lola][I] fired transitions : 98
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 34 (type EXCL) for 33 DLCround-PT-06b-LTLCardinality-11
[lola][I] time limit : 283 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 34 (type EXCL) for DLCround-PT-06b-LTLCardinality-11
[lola][I] result : false
[lola][I] markings : 99
[lola][I] fired transitions : 99
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 57 (type EXCL) for 0 DLCround-PT-06b-LTLCardinality-00
[lola][I] time limit : 309 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 60 (type EQUN) for 0 DLCround-PT-06b-LTLCardinality-00
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 57 (type EXCL) for DLCround-PT-06b-LTLCardinality-00
[lola][I] result : true
[lola][I] markings : 99
[lola][I] fired transitions : 99
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][W] CANCELED task # 60 (type EQUN) for DLCround-PT-06b-LTLCardinality-00 (obsolete)
[lola][I] LAUNCH task # 28 (type EXCL) for 27 DLCround-PT-06b-LTLCardinality-09
[lola][I] time limit : 340 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 28 (type EXCL) for DLCround-PT-06b-LTLCardinality-09
[lola][I] result : true
[lola][I] markings : 4
[lola][I] fired transitions : 3
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 22 (type EXCL) for 21 DLCround-PT-06b-LTLCardinality-07
[lola][I] time limit : 377 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 60 (type EQUN) for DLCround-PT-06b-LTLCardinality-00
[lola][I] result : true
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCround-PT-06b-LTLCardinality-00: F false state space / EG
[lola][.] DLCround-PT-06b-LTLCardinality-01: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-02: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-03: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-04: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-09: LTL true LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-11: LTL false LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-12: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-06b-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-13: CONJ 0 2 0 0 2 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-14: CONJ 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 22 LTL EXCL 0/377 1/2000 DLCround-PT-06b-LTLCardinality-07 28590 m, 5718 m/sec, 30911 t fired, .
[lola][.]
[lola][.] Time elapsed: 200 secs. Pages in use: 1
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCround-PT-06b-LTLCardinality-00: F false state space / EG
[lola][.] DLCround-PT-06b-LTLCardinality-01: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-02: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-03: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-04: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-09: LTL true LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-11: LTL false LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-12: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-06b-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-13: CONJ 0 2 0 0 2 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-14: CONJ 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 22 LTL EXCL 5/377 6/2000 DLCround-PT-06b-LTLCardinality-07 379471 m, 70176 m/sec, 437001 t fired, .
[lola][.]
[lola][.] Time elapsed: 205 secs. Pages in use: 6
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCround-PT-06b-LTLCardinality-00: F false state space / EG
[lola][.] DLCround-PT-06b-LTLCardinality-01: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-02: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-03: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-04: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-09: LTL true LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-11: LTL false LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-12: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-06b-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-13: CONJ 0 2 0 0 2 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-14: CONJ 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 22 LTL EXCL 10/377 10/2000 DLCround-PT-06b-LTLCardinality-07 715121 m, 67130 m/sec, 825268 t fired, .
[lola][.]
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[lola][.] 22 LTL EXCL 15/377 15/2000 DLCround-PT-06b-LTLCardinality-07 1053987 m, 67773 m/sec, 1210689 t fired, .
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[lola][.] 22 LTL EXCL 20/377 19/2000 DLCround-PT-06b-LTLCardinality-07 1390438 m, 67290 m/sec, 1597969 t fired, .
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[lola][.] 22 LTL EXCL 25/377 24/2000 DLCround-PT-06b-LTLCardinality-07 1727952 m, 67502 m/sec, 1981459 t fired, .
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[lola][.] 22 LTL EXCL 30/377 28/2000 DLCround-PT-06b-LTLCardinality-07 2061798 m, 66769 m/sec, 2365839 t fired, .
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[lola][.] 22 LTL EXCL 35/377 33/2000 DLCround-PT-06b-LTLCardinality-07 2389713 m, 65583 m/sec, 2744747 t fired, .
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[lola][.] 22 LTL EXCL 40/377 37/2000 DLCround-PT-06b-LTLCardinality-07 2714733 m, 65004 m/sec, 3114035 t fired, .
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[lola][.] 22 LTL EXCL 70/377 64/2000 DLCround-PT-06b-LTLCardinality-07 4727981 m, 68080 m/sec, 5437560 t fired, .
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[lola][.] 22 LTL EXCL 125/377 113/2000 DLCround-PT-06b-LTLCardinality-07 8404112 m, 66445 m/sec, 9659652 t fired, .
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[lola][.] 22 LTL EXCL 135/377 122/2000 DLCround-PT-06b-LTLCardinality-07 9055077 m, 65962 m/sec, 10409660 t fired, .
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[lola][.] 22 LTL EXCL 140/377 126/2000 DLCround-PT-06b-LTLCardinality-07 9384525 m, 65889 m/sec, 10787236 t fired, .
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[lola][.] DLCround-PT-06b-LTLCardinality-03: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-04: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-09: LTL true LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-11: LTL false LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-12: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-06b-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
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[lola][.] DLCround-PT-06b-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-13: CONJ 0 2 0 0 2 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-14: CONJ 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 22 LTL EXCL 350/377 309/2000 DLCround-PT-06b-LTLCardinality-07 23179780 m, 62105 m/sec, 26646183 t fired, .
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[lola][.] DLCround-PT-06b-LTLCardinality-00: F false state space / EG
[lola][.] DLCround-PT-06b-LTLCardinality-01: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-02: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-03: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-04: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-09: LTL true LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-11: LTL false LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-12: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-06b-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-13: CONJ 0 2 0 0 2 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-14: CONJ 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 22 LTL EXCL 355/377 313/2000 DLCround-PT-06b-LTLCardinality-07 23491434 m, 62330 m/sec, 27001315 t fired, .
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[lola][.] DLCround-PT-06b-LTLCardinality-00: F false state space / EG
[lola][.] DLCround-PT-06b-LTLCardinality-01: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-02: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-03: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-04: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-09: LTL true LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-11: LTL false LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-12: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-06b-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-13: CONJ 0 2 0 0 2 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-14: CONJ 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 22 LTL EXCL 360/377 317/2000 DLCround-PT-06b-LTLCardinality-07 23790695 m, 59852 m/sec, 27352672 t fired, .
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[lola][.] DLCround-PT-06b-LTLCardinality-00: F false state space / EG
[lola][.] DLCround-PT-06b-LTLCardinality-01: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-02: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-03: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-04: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-09: LTL true LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-11: LTL false LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-12: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-06b-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-13: CONJ 0 2 0 0 2 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-14: CONJ 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 22 LTL EXCL 365/377 320/2000 DLCround-PT-06b-LTLCardinality-07 24100352 m, 61931 m/sec, 27707294 t fired, .
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[lola][.] DLCround-PT-06b-LTLCardinality-00: F false state space / EG
[lola][.] DLCround-PT-06b-LTLCardinality-01: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-02: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-03: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-04: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-09: LTL true LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-11: LTL false LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-12: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-06b-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-13: CONJ 0 2 0 0 2 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-14: CONJ 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 22 LTL EXCL 370/377 325/2000 DLCround-PT-06b-LTLCardinality-07 24419579 m, 63845 m/sec, 28072942 t fired, .
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[lola][.] DLCround-PT-06b-LTLCardinality-00: F false state space / EG
[lola][.] DLCround-PT-06b-LTLCardinality-01: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-02: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-03: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-04: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-09: LTL true LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-11: LTL false LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-12: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-06b-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-13: CONJ 0 2 0 0 2 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-14: CONJ 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 22 LTL EXCL 375/377 329/2000 DLCround-PT-06b-LTLCardinality-07 24739760 m, 64036 m/sec, 28437459 t fired, .
[lola][.]
[lola][.] Time elapsed: 575 secs. Pages in use: 329
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[lola][W] CANCELED task # 22 (type EXCL) for DLCround-PT-06b-LTLCardinality-07 (local timeout)
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[lola][.] DLCround-PT-06b-LTLCardinality-00: F false state space / EG
[lola][.] DLCround-PT-06b-LTLCardinality-01: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-02: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-03: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-04: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-09: LTL true LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-11: LTL false LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-12: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] DLCround-PT-06b-LTLCardinality-07: LTL 0 0 0 0 1 1 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-13: CONJ 0 2 0 0 2 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-14: CONJ 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.]
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[lola][I] LAUNCH task # 54 (type EXCL) for 53 DLCround-PT-06b-LTLCardinality-15
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[lola][I] LAUNCH task # 22 (type EXCL) for 21 DLCround-PT-06b-LTLCardinality-07
[lola][I] time limit : 3020 sec
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[lola][I] FINISHED task # 54 (type EXCL) for DLCround-PT-06b-LTLCardinality-15
[lola][I] result : false
[lola][I] markings : 593
[lola][I] fired transitions : 593
[lola][I] time used : 0
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[lola][.] DLCround-PT-06b-LTLCardinality-00: F false state space / EG
[lola][.] DLCround-PT-06b-LTLCardinality-01: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-02: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-03: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-04: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-09: LTL true LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-11: LTL false LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-12: LTL false LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-06b-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
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[lola][.] DLCround-PT-06b-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-13: CONJ 0 2 0 0 2 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-14: CONJ 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 22 LTL EXCL 5/377 5/5 DLCround-PT-06b-LTLCardinality-07 344946 m, -4878962 m/sec, 396078 t fired, .
[lola][.]
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[lola][I] CANCELED task # 22 (type EXCL) for DLCround-PT-06b-LTLCardinality-07 (memory limit exceeded)
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[lola][.] DLCround-PT-06b-LTLCardinality-00: F false state space / EG
[lola][.] DLCround-PT-06b-LTLCardinality-01: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-02: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-03: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-04: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-09: LTL true LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-11: LTL false LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-12: LTL false LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-15: LTL false LTL model checker
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-06b-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
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[lola][.] DLCround-PT-06b-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-13: CONJ 0 2 0 0 2 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-14: CONJ 0 1 0 0 1 0 0 0
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[lola][I] LAUNCH task # 51 (type EXCL) for 46 DLCround-PT-06b-LTLCardinality-14
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[lola][I] FINISHED task # 51 (type EXCL) for DLCround-PT-06b-LTLCardinality-14
[lola][I] result : true
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[lola][I] LAUNCH task # 44 (type EXCL) for 39 DLCround-PT-06b-LTLCardinality-13
[lola][I] time limit : 501 sec
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[lola][I] FINISHED task # 44 (type EXCL) for DLCround-PT-06b-LTLCardinality-13
[lola][I] result : true
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[lola][I] LAUNCH task # 42 (type EXCL) for 39 DLCround-PT-06b-LTLCardinality-13
[lola][I] time limit : 602 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 42 (type EXCL) for DLCround-PT-06b-LTLCardinality-13
[lola][I] result : true
[lola][I] markings : 2
[lola][I] fired transitions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 31 (type EXCL) for 30 DLCround-PT-06b-LTLCardinality-10
[lola][I] time limit : 752 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 31 (type EXCL) for DLCround-PT-06b-LTLCardinality-10
[lola][I] result : true
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[lola][I] LAUNCH task # 25 (type EXCL) for 24 DLCround-PT-06b-LTLCardinality-08
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[lola][I] FINISHED task # 25 (type EXCL) for DLCround-PT-06b-LTLCardinality-08
[lola][I] result : true
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[lola][I] time used : 0
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[lola][I] LAUNCH task # 19 (type EXCL) for 18 DLCround-PT-06b-LTLCardinality-06
[lola][I] time limit : 1505 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCround-PT-06b-LTLCardinality-00: F false state space / EG
[lola][.] DLCround-PT-06b-LTLCardinality-01: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-02: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-03: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-04: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-08: LTL true LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-09: LTL true LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-10: LTL true LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-11: LTL false LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-12: LTL false LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-13: CONJ true CONJ
[lola][.] DLCround-PT-06b-LTLCardinality-14: CONJ true CONJ
[lola][.] DLCround-PT-06b-LTLCardinality-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-06b-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-06: LTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-07: LTL 0 0 0 0 1 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 19 LTL EXCL 5/1505 5/2000 DLCround-PT-06b-LTLCardinality-06 343438 m, 68687 m/sec, 394380 t fired, .
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[lola][.] 19 LTL EXCL 10/1505 9/2000 DLCround-PT-06b-LTLCardinality-06 669820 m, 65276 m/sec, 772254 t fired, .
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[lola][.] 19 LTL EXCL 15/1505 14/2000 DLCround-PT-06b-LTLCardinality-06 996274 m, 65290 m/sec, 1144715 t fired, .
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[lola][.] 19 LTL EXCL 20/1505 18/2000 DLCround-PT-06b-LTLCardinality-06 1322726 m, 65290 m/sec, 1517429 t fired, .
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[lola][.] 19 LTL EXCL 25/1505 23/2000 DLCround-PT-06b-LTLCardinality-06 1649996 m, 65454 m/sec, 1891268 t fired, .
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[lola][.] 19 LTL EXCL 30/1505 27/2000 DLCround-PT-06b-LTLCardinality-06 1975004 m, 65001 m/sec, 2263837 t fired, .
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[lola][.] 19 LTL EXCL 35/1505 31/2000 DLCround-PT-06b-LTLCardinality-06 2284042 m, 61807 m/sec, 2624667 t fired, .
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[lola][.] 19 LTL EXCL 65/1505 57/2000 DLCround-PT-06b-LTLCardinality-06 4201215 m, 67070 m/sec, 4837095 t fired, .
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[lola][.] 19 LTL EXCL 70/1505 62/2000 DLCround-PT-06b-LTLCardinality-06 4536926 m, 67142 m/sec, 5218701 t fired, .
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[lola][.] 19 LTL EXCL 75/1505 66/2000 DLCround-PT-06b-LTLCardinality-06 4866027 m, 65820 m/sec, 5594519 t fired, .
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[lola][.] 19 LTL EXCL 80/1505 70/2000 DLCround-PT-06b-LTLCardinality-06 5189138 m, 64622 m/sec, 5964723 t fired, .
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[lola][.] 19 LTL EXCL 85/1505 74/2000 DLCround-PT-06b-LTLCardinality-06 5505859 m, 63344 m/sec, 6328386 t fired, .
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[lola][.] 19 LTL EXCL 95/1505 83/2000 DLCround-PT-06b-LTLCardinality-06 6151656 m, 67376 m/sec, 7071811 t fired, .
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[lola][.] 19 LTL EXCL 100/1505 87/2000 DLCround-PT-06b-LTLCardinality-06 6477555 m, 65179 m/sec, 7453528 t fired, .
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[lola][.] 19 LTL EXCL 180/1505 157/2000 DLCround-PT-06b-LTLCardinality-06 11630842 m, 61756 m/sec, 13365737 t fired, .
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[lola][.] 19 LTL EXCL 185/1505 161/2000 DLCround-PT-06b-LTLCardinality-06 11947025 m, 63236 m/sec, 13734089 t fired, .
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[lola][.] 19 LTL EXCL 190/1505 165/2000 DLCround-PT-06b-LTLCardinality-06 12276999 m, 65994 m/sec, 14113906 t fired, .
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[lola][.] 19 LTL EXCL 195/1505 170/2000 DLCround-PT-06b-LTLCardinality-06 12602261 m, 65052 m/sec, 14493387 t fired, .
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[lola][.] 19 LTL EXCL 200/1505 174/2000 DLCround-PT-06b-LTLCardinality-06 12929956 m, 65539 m/sec, 14869857 t fired, .
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-06b-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-06: LTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-07: LTL 0 0 0 0 1 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 19 LTL EXCL 235/1505 204/2000 DLCround-PT-06b-LTLCardinality-06 15144527 m, 64137 m/sec, 17407050 t fired, .
[lola][.]
[lola][.] Time elapsed: 825 secs. Pages in use: 537
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCround-PT-06b-LTLCardinality-00: F false state space / EG
[lola][.] DLCround-PT-06b-LTLCardinality-01: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-02: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-03: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-04: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-08: LTL true LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-09: LTL true LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-10: LTL true LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-11: LTL false LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-12: LTL false LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-13: CONJ true CONJ
[lola][.] DLCround-PT-06b-LTLCardinality-14: CONJ true CONJ
[lola][.] DLCround-PT-06b-LTLCardinality-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-06b-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-06: LTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-07: LTL 0 0 0 0 1 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 19 LTL EXCL 240/1505 208/2000 DLCround-PT-06b-LTLCardinality-06 15456878 m, 62470 m/sec, 17763822 t fired, .
[lola][.]
[lola][.] Time elapsed: 830 secs. Pages in use: 541
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCround-PT-06b-LTLCardinality-00: F false state space / EG
[lola][.] DLCround-PT-06b-LTLCardinality-01: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-02: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-03: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-04: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-08: LTL true LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-09: LTL true LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-10: LTL true LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-11: LTL false LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-12: LTL false LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-13: CONJ true CONJ
[lola][.] DLCround-PT-06b-LTLCardinality-14: CONJ true CONJ
[lola][.] DLCround-PT-06b-LTLCardinality-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-06b-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-06: LTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-07: LTL 0 0 0 0 1 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 19 LTL EXCL 245/1505 211/2000 DLCround-PT-06b-LTLCardinality-06 15736787 m, 55981 m/sec, 18088887 t fired, .
[lola][.]
[lola][.] Time elapsed: 835 secs. Pages in use: 544
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCround-PT-06b-LTLCardinality-00: F false state space / EG
[lola][.] DLCround-PT-06b-LTLCardinality-01: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-02: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-03: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-04: INITIAL false preprocessing
[lola][.] DLCround-PT-06b-LTLCardinality-08: LTL true LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-09: LTL true LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-10: LTL true LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-11: LTL false LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-12: LTL false LTL model checker
[lola][.] DLCround-PT-06b-LTLCardinality-13: CONJ true CONJ
[lola][.] DLCround-PT-06b-LTLCardinality-14: CONJ true CONJ
[lola][.] DLCround-PT-06b-LTLCardinality-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-06b-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-06: LTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-06b-LTLCardinality-07: LTL 0 0 0 0 1 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 19 LTL EXCL 250/1505 216/2000 DLCround-PT-06b-LTLCardinality-06 16069236 m, 66489 m/sec, 18470282 t fired, .
[lola][.]
[lola][.] Time elapsed: 840 secs. Pages in use: 549
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 402 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-06b"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is DLCround-PT-06b, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r115-smll-171624276500171"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-06b.tgz
mv DLCround-PT-06b execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;