About the Execution of LoLA for DLCround-PT-05a
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
7350.928 | 237455.00 | 473762.00 | 842.10 | TTFTTFTFTFTFTFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r115-smll-171624276500147.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is DLCround-PT-05a, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r115-smll-171624276500147
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 804K
-rw-r--r-- 1 mcc users 7.1K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 80K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.6K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Apr 22 14:37 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K Apr 22 14:37 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Apr 22 14:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Apr 22 14:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Apr 13 13:10 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 150K Apr 13 13:10 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Apr 13 13:02 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 120K Apr 13 13:02 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:37 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:37 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 259K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-05a-LTLCardinality-00
FORMULA_NAME DLCround-PT-05a-LTLCardinality-01
FORMULA_NAME DLCround-PT-05a-LTLCardinality-02
FORMULA_NAME DLCround-PT-05a-LTLCardinality-03
FORMULA_NAME DLCround-PT-05a-LTLCardinality-04
FORMULA_NAME DLCround-PT-05a-LTLCardinality-05
FORMULA_NAME DLCround-PT-05a-LTLCardinality-06
FORMULA_NAME DLCround-PT-05a-LTLCardinality-07
FORMULA_NAME DLCround-PT-05a-LTLCardinality-08
FORMULA_NAME DLCround-PT-05a-LTLCardinality-09
FORMULA_NAME DLCround-PT-05a-LTLCardinality-10
FORMULA_NAME DLCround-PT-05a-LTLCardinality-11
FORMULA_NAME DLCround-PT-05a-LTLCardinality-12
FORMULA_NAME DLCround-PT-05a-LTLCardinality-13
FORMULA_NAME DLCround-PT-05a-LTLCardinality-14
FORMULA_NAME DLCround-PT-05a-LTLCardinality-15
=== Now, execution of the tool begins
BK_START 1717063919917
FORMULA DLCround-PT-05a-LTLCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-05a-LTLCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-05a-LTLCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-05a-LTLCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-05a-LTLCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-05a-LTLCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-05a-LTLCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-05a-LTLCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-05a-LTLCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-05a-LTLCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-05a-LTLCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-05a-LTLCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-05a-LTLCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-05a-LTLCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-05a-LTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-05a-LTLCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[32mDLCround-PT-05a-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
[[35mlola[0m] [1m[32mDLCround-PT-05a-LTLCardinality-01: LTL/CTL true LTL model checker[0m
[[35mlola[0m] [1m[31mDLCround-PT-05a-LTLCardinality-02: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mDLCround-PT-05a-LTLCardinality-03: INITIAL true preprocessing[0m
[[35mlola[0m] [1m[32mDLCround-PT-05a-LTLCardinality-04: LTL/CTL true LTL model checker[0m
[[35mlola[0m] [1m[31mDLCround-PT-05a-LTLCardinality-05: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mDLCround-PT-05a-LTLCardinality-06: LTL/CTL true LTL model checker[0m
[[35mlola[0m] [1m[31mDLCround-PT-05a-LTLCardinality-07: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[32mDLCround-PT-05a-LTLCardinality-08: INITIAL true preprocessing[0m
[[35mlola[0m] [1m[31mDLCround-PT-05a-LTLCardinality-09: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mDLCround-PT-05a-LTLCardinality-10: LTL/CTL true LTL model checker[0m
[[35mlola[0m] [1m[31mDLCround-PT-05a-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mDLCround-PT-05a-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mDLCround-PT-05a-LTLCardinality-13: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m] [1m[31mDLCround-PT-05a-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mDLCround-PT-05a-LTLCardinality-15: INITIAL false preprocessing[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 236 secs. Pages in use: 85
BK_STOP 1717064157372
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLCardinality.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 48 (type SKEL/SRCH) for 0 DLCround-PT-05a-LTLCardinality-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 49 (type SKEL/SRCH) for 3 DLCround-PT-05a-LTLCardinality-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] FINISHED task # 49 (type SKEL/SRCH) for DLCround-PT-05a-LTLCardinality-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 46 (type CNST) for 45 DLCround-PT-05a-LTLCardinality-15
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 46 (type CNST) for DLCround-PT-05a-LTLCardinality-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 50 (type SKEL/SRCH) for 12 DLCround-PT-05a-LTLCardinality-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 50 (type SKEL/SRCH) for DLCround-PT-05a-LTLCardinality-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 10 (type CNST) for 9 DLCround-PT-05a-LTLCardinality-03
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 51 (type SKEL/SRCH) for 18 DLCround-PT-05a-LTLCardinality-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 22 (type CNST) for 21 DLCround-PT-05a-LTLCardinality-07
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 51 (type SKEL/SRCH) for DLCround-PT-05a-LTLCardinality-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 25 (type CNST) for 24 DLCround-PT-05a-LTLCardinality-08
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 10 (type CNST) for DLCround-PT-05a-LTLCardinality-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 25 (type CNST) for DLCround-PT-05a-LTLCardinality-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 22 (type CNST) for DLCround-PT-05a-LTLCardinality-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 52 (type SKEL/SRCH) for 30 DLCround-PT-05a-LTLCardinality-10
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 52 (type SKEL/SRCH) for DLCround-PT-05a-LTLCardinality-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 DLCround-PT-05a-LTLCardinality-00
[[35mlola[0m][I] time limit : 257 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 53 (type SKEL/SRCH) for 39 DLCround-PT-05a-LTLCardinality-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 53 (type SKEL/SRCH) for DLCround-PT-05a-LTLCardinality-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 3
[[35mlola[0m][I] fired transitions : 3
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
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[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 5/327 2/2000 DLCround-PT-05a-LTLCardinality-00 294588 m, 58917 m/sec, 6484725 t fired, .
[[35mlola[0m][.] 48 LTL SRCH 5/3599 1/5 DLCround-PT-05a-LTLCardinality-00 493012 m, 98602 m/sec, 6550643 t fired, .
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[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 1 LTL EXCL 10/327 5/2000 DLCround-PT-05a-LTLCardinality-00 630320 m, 67146 m/sec, 12946842 t fired, .
[[35mlola[0m][.] 48 LTL SRCH 10/3599 1/5 DLCround-PT-05a-LTLCardinality-00 949546 m, 91306 m/sec, 13242770 t fired, .
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[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-06: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 15/327 6/2000 DLCround-PT-05a-LTLCardinality-00 925019 m, 58939 m/sec, 19394988 t fired, .
[[35mlola[0m][.] 48 LTL SRCH 15/3599 1/5 DLCround-PT-05a-LTLCardinality-00 1378622 m, 85815 m/sec, 19688653 t fired, .
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[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 1 LTL EXCL 20/327 8/2000 DLCround-PT-05a-LTLCardinality-00 1217832 m, 58562 m/sec, 25663588 t fired, .
[[35mlola[0m][.] 48 LTL SRCH 20/3599 1/5 DLCround-PT-05a-LTLCardinality-00 1776924 m, 79660 m/sec, 25839371 t fired, .
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[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 1 LTL EXCL 25/327 10/2000 DLCround-PT-05a-LTLCardinality-00 1506235 m, 57680 m/sec, 32027339 t fired, .
[[35mlola[0m][.] 48 LTL SRCH 25/3599 1/5 DLCround-PT-05a-LTLCardinality-00 2153361 m, 75287 m/sec, 31815896 t fired, .
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[[35mlola[0m][.] 1 LTL EXCL 30/327 12/2000 DLCround-PT-05a-LTLCardinality-00 1781764 m, 55105 m/sec, 38119748 t fired, .
[[35mlola[0m][.] 48 LTL SRCH 30/3599 1/5 DLCround-PT-05a-LTLCardinality-00 2514428 m, 72213 m/sec, 37613994 t fired, .
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[[35mlola[0m][.] 1 LTL EXCL 35/327 14/2000 DLCround-PT-05a-LTLCardinality-00 2069737 m, 57594 m/sec, 44365254 t fired, .
[[35mlola[0m][.] 48 LTL SRCH 35/3599 1/5 DLCround-PT-05a-LTLCardinality-00 2866242 m, 70362 m/sec, 43280547 t fired, .
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[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-06: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 1 LTL EXCL 210/327 75/2000 DLCround-PT-05a-LTLCardinality-00 11490592 m, 47661 m/sec, 254430290 t fired, .
[[35mlola[0m][.] 48 LTL SRCH 210/3599 1/5 DLCround-PT-05a-LTLCardinality-00 6726094 m, 30 m/sec, 222708487 t fired, .
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[[35mlola[0m][.]
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[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-01: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-06: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 1 LTL EXCL 215/327 77/2000 DLCround-PT-05a-LTLCardinality-00 11761565 m, 54194 m/sec, 260416829 t fired, .
[[35mlola[0m][.] 48 LTL SRCH 215/3599 1/5 DLCround-PT-05a-LTLCardinality-00 6726252 m, 31 m/sec, 228686129 t fired, .
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[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-01: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-06: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 1 LTL EXCL 220/327 78/2000 DLCround-PT-05a-LTLCardinality-00 12023851 m, 52457 m/sec, 266477006 t fired, .
[[35mlola[0m][.] 48 LTL SRCH 220/3599 1/5 DLCround-PT-05a-LTLCardinality-00 6726418 m, 33 m/sec, 234792767 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-01: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-06: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 225/327 80/2000 DLCround-PT-05a-LTLCardinality-00 12290073 m, 53244 m/sec, 272770325 t fired, .
[[35mlola[0m][.] 48 LTL SRCH 225/3599 1/5 DLCround-PT-05a-LTLCardinality-00 6726526 m, 21 m/sec, 241190625 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][.]
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[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-01: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-06: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 230/327 82/2000 DLCround-PT-05a-LTLCardinality-00 12567903 m, 55566 m/sec, 278997074 t fired, .
[[35mlola[0m][.] 48 LTL SRCH 230/3599 1/5 DLCround-PT-05a-LTLCardinality-00 6726629 m, 20 m/sec, 247881985 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][I] FINISHED task # 48 (type SKEL/SRCH) for DLCround-PT-05a-LTLCardinality-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 6726721
[[35mlola[0m][I] fired transitions : 254886633
[[35mlola[0m][I] time used : 235
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 1 (type EXCL) for DLCround-PT-05a-LTLCardinality-00 (obsolete)
[[35mlola[0m][I] LAUNCH task # 37 (type EXCL) for 36 DLCround-PT-05a-LTLCardinality-12
[[35mlola[0m][I] time limit : 336 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 37 (type EXCL) for DLCround-PT-05a-LTLCardinality-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 78
[[35mlola[0m][I] fired transitions : 434
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 34 (type EXCL) for 33 DLCround-PT-05a-LTLCardinality-11
[[35mlola[0m][I] time limit : 373 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mDLCround-PT-05a-LTLCardinality-00: LTL true skeleton: LTL model checker[0m
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[[35mlola[0m][.]
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[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-06: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-11: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCround-PT-05a-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 34 LTL EXCL 0/373 1/2000 DLCround-PT-05a-LTLCardinality-11 6453 m, 1290 m/sec, 164146 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][I] FINISHED task # 34 (type EXCL) for DLCround-PT-05a-LTLCardinality-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 15291
[[35mlola[0m][I] fired transitions : 408058
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 31 (type EXCL) for 30 DLCround-PT-05a-LTLCardinality-10
[[35mlola[0m][I] time limit : 420 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 31 (type EXCL) for DLCround-PT-05a-LTLCardinality-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 28 (type EXCL) for 27 DLCround-PT-05a-LTLCardinality-09
[[35mlola[0m][I] time limit : 480 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 28 (type EXCL) for DLCround-PT-05a-LTLCardinality-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 7646
[[35mlola[0m][I] fired transitions : 191003
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 19 (type EXCL) for 18 DLCround-PT-05a-LTLCardinality-06
[[35mlola[0m][I] time limit : 560 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 19 (type EXCL) for DLCround-PT-05a-LTLCardinality-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 13 (type EXCL) for 12 DLCround-PT-05a-LTLCardinality-04
[[35mlola[0m][I] time limit : 672 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 13 (type EXCL) for DLCround-PT-05a-LTLCardinality-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 7 (type EXCL) for 6 DLCround-PT-05a-LTLCardinality-02
[[35mlola[0m][I] time limit : 841 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 7 (type EXCL) for DLCround-PT-05a-LTLCardinality-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 2
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 DLCround-PT-05a-LTLCardinality-01
[[35mlola[0m][I] time limit : 1121 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 4 (type EXCL) for DLCround-PT-05a-LTLCardinality-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 16 (type EXCL) for 15 DLCround-PT-05a-LTLCardinality-05
[[35mlola[0m][I] time limit : 1682 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 16 (type EXCL) for DLCround-PT-05a-LTLCardinality-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 25
[[35mlola[0m][I] fired transitions : 183
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 43 (type EXCL) for 42 DLCround-PT-05a-LTLCardinality-14
[[35mlola[0m][I] time limit : 3364 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 43 (type EXCL) for DLCround-PT-05a-LTLCardinality-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 3
[[35mlola[0m][I] fired transitions : 4
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-05a"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is DLCround-PT-05a, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r115-smll-171624276500147"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-05a.tgz
mv DLCround-PT-05a execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;