fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r115-smll-171624276400130
Last Updated
July 7, 2024

About the Execution of LoLA for DLCround-PT-04a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16207.399 979403.00 1034331.00 3929.90 ????????T???TT?? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r115-smll-171624276400130.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is DLCround-PT-04a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r115-smll-171624276400130
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 680K
-rw-r--r-- 1 mcc users 7.5K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 87K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.8K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:37 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 22 14:37 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Apr 22 14:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 22 14:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Apr 13 13:17 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 113K Apr 13 13:17 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Apr 13 13:07 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 98K Apr 13 13:07 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:37 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:37 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 200K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-04a-CTLFireability-2024-00
FORMULA_NAME DLCround-PT-04a-CTLFireability-2024-01
FORMULA_NAME DLCround-PT-04a-CTLFireability-2024-02
FORMULA_NAME DLCround-PT-04a-CTLFireability-2024-03
FORMULA_NAME DLCround-PT-04a-CTLFireability-2024-04
FORMULA_NAME DLCround-PT-04a-CTLFireability-2024-05
FORMULA_NAME DLCround-PT-04a-CTLFireability-2024-06
FORMULA_NAME DLCround-PT-04a-CTLFireability-2024-07
FORMULA_NAME DLCround-PT-04a-CTLFireability-2024-08
FORMULA_NAME DLCround-PT-04a-CTLFireability-2024-09
FORMULA_NAME DLCround-PT-04a-CTLFireability-2024-10
FORMULA_NAME DLCround-PT-04a-CTLFireability-2024-11
FORMULA_NAME DLCround-PT-04a-CTLFireability-2023-12
FORMULA_NAME DLCround-PT-04a-CTLFireability-2023-13
FORMULA_NAME DLCround-PT-04a-CTLFireability-2023-14
FORMULA_NAME DLCround-PT-04a-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717057300920

FORMULA DLCround-PT-04a-CTLFireability-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-04a-CTLFireability-2023-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-04a-CTLFireability-2023-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1717058280323

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from CTLFireability.xml
[lola][I] Rule S: 0 transitions removed,0 places removed
[lola][I] LAUNCH task # 7 (type EXCL) for 6 DLCround-PT-04a-CTLFireability-2024-02
[lola][I] time limit : 112 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 64 (type FNDP) for 24 DLCround-PT-04a-CTLFireability-2024-08
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 65 (type EQUN) for 24 DLCround-PT-04a-CTLFireability-2024-08
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 64 (type FNDP) for DLCround-PT-04a-CTLFireability-2024-08
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][W] CANCELED task # 65 (type EQUN) for DLCround-PT-04a-CTLFireability-2024-08 (obsolete)
[lola][I] FINISHED task # 65 (type EQUN) for DLCround-PT-04a-CTLFireability-2024-08
[lola][I] result : true
[lola][I] LAUNCH task # 71 (type FNDP) for 47 DLCround-PT-04a-CTLFireability-2023-13
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 72 (type EQUN) for 47 DLCround-PT-04a-CTLFireability-2023-13
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 78 (type EQUN) for 57 DLCround-PT-04a-CTLFireability-2023-15
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 72 (type EQUN) for DLCround-PT-04a-CTLFireability-2023-13
[lola][I] result : true
[lola][W] CANCELED task # 71 (type FNDP) for DLCround-PT-04a-CTLFireability-2023-13 (obsolete)
[lola][I] FINISHED task # 71 (type FNDP) for DLCround-PT-04a-CTLFireability-2023-13
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][I] NOTDEADLOCKFREE
[lola][I] FINISHED task # 78 (type EQUN) for DLCround-PT-04a-CTLFireability-2023-15
[lola][I] result : unknown
[lola][I] LAUNCH task # 79 (type FNDP) for 44 DLCround-PT-04a-CTLFireability-2023-12
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 80 (type EQUN) for 44 DLCround-PT-04a-CTLFireability-2023-12
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 79 (type FNDP) for DLCround-PT-04a-CTLFireability-2023-12
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][W] CANCELED task # 80 (type EQUN) for DLCround-PT-04a-CTLFireability-2023-12 (obsolete)
[lola][I] FINISHED task # 80 (type EQUN) for DLCround-PT-04a-CTLFireability-2023-12
[lola][I] result : unknown
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCround-PT-04a-CTLFireability-2024-08: DISJ true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-04a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-04a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-04a-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-04a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-04a-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-04a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-04a-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-04a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-04a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-04a-CTLFireability-2024-10: CONJ 0 2 0 0 2 0 0 0
[lola][.] DLCround-PT-04a-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-04a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-04a-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 7 CTL EXCL 5/240 1/2000 DLCround-PT-04a-CTLFireability-2024-02 170997 m, 34199 m/sec, 6963893 t fired, .
[lola][.]
[lola][.] Time elapsed: 5 secs. Pages in use: 1
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCround-PT-04a-CTLFireability-2024-08: DISJ true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCround-PT-04a-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-04a-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-04a-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[lola][.] DLCround-PT-04a-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-04a-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-04a-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-04a-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-04a-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-04a-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-04a-CTLFireability-2024-10: CONJ 0 2 0 0 2 0 0 0
[lola][.] DLCround-PT-04a-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-04a-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.] DLCround-PT-04a-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 7 CTL EXCL 10/240 2/2000 DLCround-PT-04a-CTLFireability-2024-02 359197 m, 37640 m/sec, 15050639 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2024-08: DISJ true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 7 CTL EXCL 15/240 3/2000 DLCround-PT-04a-CTLFireability-2024-02 538328 m, 35826 m/sec, 22979152 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2024-08: DISJ true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] 7 CTL EXCL 20/240 3/2000 DLCround-PT-04a-CTLFireability-2024-02 720512 m, 36436 m/sec, 30854228 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2024-08: DISJ true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] 7 CTL EXCL 25/240 4/2000 DLCround-PT-04a-CTLFireability-2024-02 900725 m, 36042 m/sec, 38579419 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] 7 CTL EXCL 30/240 5/2000 DLCround-PT-04a-CTLFireability-2024-02 1072228 m, 34300 m/sec, 46253190 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] 7 CTL EXCL 35/240 6/2000 DLCround-PT-04a-CTLFireability-2024-02 1247376 m, 35029 m/sec, 53935387 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] 7 CTL EXCL 40/240 6/2000 DLCround-PT-04a-CTLFireability-2024-02 1418907 m, 34306 m/sec, 61500360 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] 7 CTL EXCL 45/240 7/2000 DLCround-PT-04a-CTLFireability-2024-02 1590259 m, 34270 m/sec, 69031735 t fired, .
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[lola][.] 7 CTL EXCL 50/240 8/2000 DLCround-PT-04a-CTLFireability-2024-02 1760145 m, 33977 m/sec, 76495789 t fired, .
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[lola][.] 7 CTL EXCL 55/240 8/2000 DLCround-PT-04a-CTLFireability-2024-02 1928050 m, 33581 m/sec, 83941629 t fired, .
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[lola][.] 7 CTL EXCL 60/240 9/2000 DLCround-PT-04a-CTLFireability-2024-02 2094882 m, 33366 m/sec, 91331618 t fired, .
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[lola][.] 7 CTL EXCL 65/240 10/2000 DLCround-PT-04a-CTLFireability-2024-02 2258756 m, 32774 m/sec, 98668299 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] 7 CTL EXCL 70/240 10/2000 DLCround-PT-04a-CTLFireability-2024-02 2421959 m, 32640 m/sec, 105945728 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] 7 CTL EXCL 75/240 11/2000 DLCround-PT-04a-CTLFireability-2024-02 2584645 m, 32537 m/sec, 113233690 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] 7 CTL EXCL 80/240 12/2000 DLCround-PT-04a-CTLFireability-2024-02 2745638 m, 32198 m/sec, 120464622 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] 7 CTL EXCL 85/240 12/2000 DLCround-PT-04a-CTLFireability-2024-02 2905568 m, 31986 m/sec, 127638687 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] 7 CTL EXCL 90/240 13/2000 DLCround-PT-04a-CTLFireability-2024-02 3064386 m, 31763 m/sec, 134795004 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] 7 CTL EXCL 95/240 14/2000 DLCround-PT-04a-CTLFireability-2024-02 3221036 m, 31330 m/sec, 141910821 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] 7 CTL EXCL 100/240 14/2000 DLCround-PT-04a-CTLFireability-2024-02 3377565 m, 31305 m/sec, 148990161 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] 7 CTL EXCL 120/240 17/2000 DLCround-PT-04a-CTLFireability-2024-02 3984918 m, 29783 m/sec, 176985868 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] 7 CTL EXCL 125/240 17/2000 DLCround-PT-04a-CTLFireability-2024-02 4131199 m, 29256 m/sec, 183920852 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] DLCround-PT-04a-CTLFireability-2024-08: DISJ true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] 7 CTL EXCL 175/240 19/2000 DLCround-PT-04a-CTLFireability-2024-02 4477032 m, 71 m/sec, 258015944 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
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[lola][.] 7 CTL EXCL 225/240 19/2000 DLCround-PT-04a-CTLFireability-2024-02 4478875 m, 17 m/sec, 338276154 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] DLCround-PT-04a-CTLFireability-2024-10: CONJ false CTL model checker
[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] 32 CTL EXCL 0/336 1/2000 DLCround-PT-04a-CTLFireability-2024-09 15652 m, 3130 m/sec, 328287 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
[lola][.] DLCround-PT-04a-CTLFireability-2023-15: DISJ true CTL model checker
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[lola][.] 32 CTL EXCL 5/336 1/2000 DLCround-PT-04a-CTLFireability-2024-09 240172 m, 44904 m/sec, 5975456 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
[lola][.] DLCround-PT-04a-CTLFireability-2023-15: DISJ true CTL model checker
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[lola][.] 32 CTL EXCL 10/336 2/2000 DLCround-PT-04a-CTLFireability-2024-09 445808 m, 41127 m/sec, 11537653 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
[lola][.] DLCround-PT-04a-CTLFireability-2023-15: DISJ true CTL model checker
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[lola][.] 32 CTL EXCL 15/336 3/2000 DLCround-PT-04a-CTLFireability-2024-09 655311 m, 41900 m/sec, 17353788 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
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[lola][.] DLCround-PT-04a-CTLFireability-2024-10: CONJ false CTL model checker
[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
[lola][.] DLCround-PT-04a-CTLFireability-2023-15: DISJ true CTL model checker
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[lola][.] 32 CTL EXCL 40/336 7/2000 DLCround-PT-04a-CTLFireability-2024-09 1635193 m, 38451 m/sec, 46092775 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2024-10: CONJ false CTL model checker
[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
[lola][.] DLCround-PT-04a-CTLFireability-2023-15: DISJ true CTL model checker
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[lola][.] 32 CTL EXCL 45/336 8/2000 DLCround-PT-04a-CTLFireability-2024-09 1828809 m, 38723 m/sec, 51918861 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2024-10: CONJ false CTL model checker
[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
[lola][.] DLCround-PT-04a-CTLFireability-2023-15: DISJ true CTL model checker
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[lola][.] 32 CTL EXCL 50/336 9/2000 DLCround-PT-04a-CTLFireability-2024-09 2019849 m, 38208 m/sec, 57687085 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2024-10: CONJ false CTL model checker
[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
[lola][.] DLCround-PT-04a-CTLFireability-2023-15: DISJ true CTL model checker
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[lola][.] 32 CTL EXCL 55/336 10/2000 DLCround-PT-04a-CTLFireability-2024-09 2196629 m, 35356 m/sec, 63154813 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2024-10: CONJ false CTL model checker
[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
[lola][.] DLCround-PT-04a-CTLFireability-2023-15: DISJ true CTL model checker
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[lola][.] 32 CTL EXCL 60/336 10/2000 DLCround-PT-04a-CTLFireability-2024-09 2383962 m, 37466 m/sec, 68883578 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2024-10: CONJ false CTL model checker
[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
[lola][.] DLCround-PT-04a-CTLFireability-2023-15: DISJ true CTL model checker
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[lola][.] 32 CTL EXCL 65/336 11/2000 DLCround-PT-04a-CTLFireability-2024-09 2575691 m, 38345 m/sec, 74665233 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
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[lola][.] 32 CTL EXCL 70/336 12/2000 DLCround-PT-04a-CTLFireability-2024-09 2755180 m, 35897 m/sec, 80081738 t fired, .
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[lola][.] 32 CTL EXCL 145/336 23/2000 DLCround-PT-04a-CTLFireability-2024-09 5314932 m, 33617 m/sec, 160174077 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
[lola][.] DLCround-PT-04a-CTLFireability-2023-15: DISJ true CTL model checker
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[lola][.] 32 CTL EXCL 200/336 30/2000 DLCround-PT-04a-CTLFireability-2024-09 7136823 m, 32875 m/sec, 218431462 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2024-10: CONJ false CTL model checker
[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
[lola][.] DLCround-PT-04a-CTLFireability-2023-15: DISJ true CTL model checker
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[lola][.] 32 CTL EXCL 255/336 38/2000 DLCround-PT-04a-CTLFireability-2024-09 8920079 m, 32218 m/sec, 276243957 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
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[lola][.] 22 CTL EXCL 20/335 4/2000 DLCround-PT-04a-CTLFireability-2024-07 858054 m, 40262 m/sec, 22800600 t fired, .
[lola][.] 32 CTL EXCL 20/302 4/5 DLCround-PT-04a-CTLFireability-2024-09 804767 m, 37795 m/sec, 21574023 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2024-10: CONJ false CTL model checker
[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
[lola][.] DLCround-PT-04a-CTLFireability-2023-15: DISJ true CTL model checker
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[lola][.] 32 CTL EXCL 25/302 5/5 DLCround-PT-04a-CTLFireability-2024-09 990574 m, 37161 m/sec, 26934349 t fired, .
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[lola][.] 32 CTL EXCL 30/302 5/5 DLCround-PT-04a-CTLFireability-2024-09 1172120 m, 36309 m/sec, 32268893 t fired, .
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[lola][.] 22 CTL EXCL 35/335 6/2000 DLCround-PT-04a-CTLFireability-2024-07 1440546 m, 39185 m/sec, 39718442 t fired, .
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[lola][.] 22 CTL EXCL 40/335 7/2000 DLCround-PT-04a-CTLFireability-2024-07 1634434 m, 38777 m/sec, 45412498 t fired, .
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[lola][.] 22 CTL EXCL 45/335 8/2000 DLCround-PT-04a-CTLFireability-2024-07 1827222 m, 38557 m/sec, 51188184 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] 22 CTL EXCL 50/335 9/2000 DLCround-PT-04a-CTLFireability-2024-07 2021773 m, 38910 m/sec, 56920005 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
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[lola][.] 22 CTL EXCL 55/335 10/2000 DLCround-PT-04a-CTLFireability-2024-07 2208716 m, 37388 m/sec, 62598913 t fired, .
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[lola][.] 22 CTL EXCL 75/335 13/2000 DLCround-PT-04a-CTLFireability-2024-07 2955659 m, 35851 m/sec, 85207135 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
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[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
[lola][.] DLCround-PT-04a-CTLFireability-2023-15: DISJ true CTL model checker
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[lola][.] 22 CTL EXCL 130/335 21/2000 DLCround-PT-04a-CTLFireability-2024-07 4947226 m, 36474 m/sec, 146545107 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2024-10: CONJ false CTL model checker
[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
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[lola][.] DLCround-PT-04a-CTLFireability-2024-10: CONJ false CTL model checker
[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
[lola][.] DLCround-PT-04a-CTLFireability-2023-15: DISJ true CTL model checker
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[lola][.] 22 CTL EXCL 185/335 29/2000 DLCround-PT-04a-CTLFireability-2024-07 6861096 m, 34327 m/sec, 207141732 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2024-10: CONJ false CTL model checker
[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
[lola][.] DLCround-PT-04a-CTLFireability-2023-15: DISJ true CTL model checker
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[lola][.] DLCround-PT-04a-CTLFireability-2024-10: CONJ false CTL model checker
[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] DLCround-PT-04a-CTLFireability-2024-10: CONJ false CTL model checker
[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
[lola][.] DLCround-PT-04a-CTLFireability-2023-15: DISJ true CTL model checker
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
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[lola][.] DLCround-PT-04a-CTLFireability-2023-15: DISJ true CTL model checker
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[lola][.] 19 CTL EXCL 5/335 1/2000 DLCround-PT-04a-CTLFireability-2024-06 209813 m, 41962 m/sec, 4556839 t fired, .
[lola][.] 22 CTL EXCL 5/2680 1/5 DLCround-PT-04a-CTLFireability-2024-07 230082 m, -2317198 m/sec, 5605155 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2024-10: CONJ false CTL model checker
[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
[lola][.] DLCround-PT-04a-CTLFireability-2023-15: DISJ true CTL model checker
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[lola][.] 19 CTL EXCL 10/335 2/2000 DLCround-PT-04a-CTLFireability-2024-06 415168 m, 41071 m/sec, 9548853 t fired, .
[lola][.] 22 CTL EXCL 10/297 2/5 DLCround-PT-04a-CTLFireability-2024-07 453496 m, 44682 m/sec, 11576001 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
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[lola][.] 22 CTL EXCL 15/297 3/5 DLCround-PT-04a-CTLFireability-2024-07 671907 m, 43682 m/sec, 17572532 t fired, .
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[lola][.] 22 CTL EXCL 20/297 4/5 DLCround-PT-04a-CTLFireability-2024-07 874002 m, 40419 m/sec, 23272177 t fired, .
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[lola][.] 22 CTL EXCL 25/297 5/5 DLCround-PT-04a-CTLFireability-2024-07 1073962 m, 39992 m/sec, 28987315 t fired, .
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[lola][.] DLCround-PT-04a-CTLFireability-2023-12: EF true findpath
[lola][.] DLCround-PT-04a-CTLFireability-2023-13: DISJ true state equation
[lola][.] DLCround-PT-04a-CTLFireability-2023-15: DISJ true CTL model checker
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[lola][.] 19 CTL EXCL 30/335 5/2000 DLCround-PT-04a-CTLFireability-2024-06 1185684 m, 37846 m/sec, 29441392 t fired, .
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 406 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-04a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is DLCround-PT-04a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r115-smll-171624276400130"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-04a.tgz
mv DLCround-PT-04a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;