About the Execution of LoLA for DLCflexbar-PT-8a
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16207.172 | 334087.00 | 619861.00 | 1125.40 | ?F???FFTF???TF?? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r115-smll-171624276400099.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is DLCflexbar-PT-8a, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r115-smll-171624276400099
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 9.2M
-rw-r--r-- 1 mcc users 7.9K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 86K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 48K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Apr 22 14:37 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Apr 22 14:37 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Apr 22 14:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Apr 22 14:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Apr 14 12:51 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 157K Apr 14 12:51 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Apr 14 01:51 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 91K Apr 14 01:51 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:37 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 22 14:37 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 8.7M May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCflexbar-PT-8a-LTLCardinality-00
FORMULA_NAME DLCflexbar-PT-8a-LTLCardinality-01
FORMULA_NAME DLCflexbar-PT-8a-LTLCardinality-02
FORMULA_NAME DLCflexbar-PT-8a-LTLCardinality-03
FORMULA_NAME DLCflexbar-PT-8a-LTLCardinality-04
FORMULA_NAME DLCflexbar-PT-8a-LTLCardinality-05
FORMULA_NAME DLCflexbar-PT-8a-LTLCardinality-06
FORMULA_NAME DLCflexbar-PT-8a-LTLCardinality-07
FORMULA_NAME DLCflexbar-PT-8a-LTLCardinality-08
FORMULA_NAME DLCflexbar-PT-8a-LTLCardinality-09
FORMULA_NAME DLCflexbar-PT-8a-LTLCardinality-10
FORMULA_NAME DLCflexbar-PT-8a-LTLCardinality-11
FORMULA_NAME DLCflexbar-PT-8a-LTLCardinality-12
FORMULA_NAME DLCflexbar-PT-8a-LTLCardinality-13
FORMULA_NAME DLCflexbar-PT-8a-LTLCardinality-14
FORMULA_NAME DLCflexbar-PT-8a-LTLCardinality-15
=== Now, execution of the tool begins
BK_START 1717042141817
FORMULA DLCflexbar-PT-8a-LTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-8a-LTLCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-8a-LTLCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-8a-LTLCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-8a-LTLCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-8a-LTLCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-8a-LTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717042475904
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLCardinality.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 52 (type SKEL/SRCH) for 0 DLCflexbar-PT-8a-LTLCardinality-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 52 (type SKEL/SRCH) for DLCflexbar-PT-8a-LTLCardinality-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-00: LTL/CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-01: LTL/CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-05: INITIAL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-06: INITIAL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-07: INITIAL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-08: LTL/CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-09: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-12: INITIAL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-13: INITIAL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-14: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-15: AG 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 27 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-00: LTL/CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-01: LTL/CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-05: INITIAL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-06: INITIAL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-07: INITIAL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-08: LTL/CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-09: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-12: INITIAL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-13: INITIAL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-14: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-15: AG 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 32 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 53 (type SKEL/SRCH) for 3 DLCflexbar-PT-8a-LTLCardinality-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 53 (type SKEL/SRCH) for DLCflexbar-PT-8a-LTLCardinality-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 4
[[35mlola[0m][I] fired transitions : 4
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 54 (type SKEL/SRCH) for 24 DLCflexbar-PT-8a-LTLCardinality-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 54 (type SKEL/SRCH) for DLCflexbar-PT-8a-LTLCardinality-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 4
[[35mlola[0m][I] fired transitions : 4
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 22 (type CNST) for 21 DLCflexbar-PT-8a-LTLCardinality-07
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 22 (type CNST) for DLCflexbar-PT-8a-LTLCardinality-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 55 (type SKEL/SRCH) for 30 DLCflexbar-PT-8a-LTLCardinality-10
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] planning for DLCflexbar-PT-8a-LTLCardinality-01 stopped (result already fixed).
[[35mlola[0m][I] planning for DLCflexbar-PT-8a-LTLCardinality-08 stopped (result already fixed).
[[35mlola[0m][I] LAUNCH task # 19 (type CNST) for 18 DLCflexbar-PT-8a-LTLCardinality-06
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 37 (type CNST) for 36 DLCflexbar-PT-8a-LTLCardinality-12
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 19 (type CNST) for DLCflexbar-PT-8a-LTLCardinality-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 37 (type CNST) for DLCflexbar-PT-8a-LTLCardinality-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 56 (type SKEL/SRCH) for 33 DLCflexbar-PT-8a-LTLCardinality-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 40 (type CNST) for 39 DLCflexbar-PT-8a-LTLCardinality-13
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 40 (type CNST) for DLCflexbar-PT-8a-LTLCardinality-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 16 (type CNST) for 15 DLCflexbar-PT-8a-LTLCardinality-05
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 57 (type SKEL/SRCH) for 42 DLCflexbar-PT-8a-LTLCardinality-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 16 (type CNST) for DLCflexbar-PT-8a-LTLCardinality-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 64 (type SKEL/FNDP) for 49 DLCflexbar-PT-8a-LTLCardinality-15
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 57 (type SKEL/SRCH) for DLCflexbar-PT-8a-LTLCardinality-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 60 (type SKEL/FNDP) for 42 DLCflexbar-PT-8a-LTLCardinality-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 64 (type SKEL/FNDP) for DLCflexbar-PT-8a-LTLCardinality-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] LAUNCH task # 61 (type SKEL/EQUN) for 42 DLCflexbar-PT-8a-LTLCardinality-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 60 (type SKEL/FNDP) for DLCflexbar-PT-8a-LTLCardinality-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 61 (type EQUN) for DLCflexbar-PT-8a-LTLCardinality-14 (obsolete)
[[35mlola[0m][I] FINISHED task # 61 (type SKEL/EQUN) for DLCflexbar-PT-8a-LTLCardinality-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-8a-LTLCardinality-01: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-8a-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-8a-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-8a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-8a-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-8a-LTLCardinality-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-8a-LTLCardinality-13: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-00: LTL/CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-10: LTL 0 0 1 0 0 0 0 0
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[[35mlola[0m][.] 55 LTL SRCH 1/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-10 161487 m, 32297 m/sec, 514566 t fired, .
[[35mlola[0m][.] 56 LTL SRCH 1/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-11 105117 m, 21023 m/sec, 219737 t fired, .
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[[35mlola[0m][.] 55 LTL SRCH 6/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-10 647848 m, 97272 m/sec, 2020607 t fired, .
[[35mlola[0m][.] 56 LTL SRCH 6/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-11 722139 m, 123404 m/sec, 1573919 t fired, .
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[[35mlola[0m][.] 55 LTL SRCH 11/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-10 1124172 m, 95264 m/sec, 3486260 t fired, .
[[35mlola[0m][.] 56 LTL SRCH 11/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-11 1333141 m, 122200 m/sec, 2971779 t fired, .
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[[35mlola[0m][.] 55 LTL SRCH 16/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-10 1594410 m, 94047 m/sec, 4975477 t fired, .
[[35mlola[0m][.] 56 LTL SRCH 16/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-11 1757683 m, 84908 m/sec, 4377023 t fired, .
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[[35mlola[0m][.] 55 LTL SRCH 21/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-10 2066700 m, 94458 m/sec, 6552479 t fired, .
[[35mlola[0m][.] 56 LTL SRCH 21/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-11 2000200 m, 48503 m/sec, 5761979 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 26/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-11 2242151 m, 48390 m/sec, 7126871 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 31/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-11 2474912 m, 46552 m/sec, 8480177 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 36/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-11 2660166 m, 37050 m/sec, 9529383 t fired, .
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[[35mlola[0m][.] 55 LTL SRCH 41/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-10 3593068 m, 41000 m/sec, 11725797 t fired, .
[[35mlola[0m][.] 56 LTL SRCH 41/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-11 2803609 m, 28688 m/sec, 10424738 t fired, .
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[[35mlola[0m][I] LAUNCH task # 71 (type EXCL) for 42 DLCflexbar-PT-8a-LTLCardinality-14
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[[35mlola[0m][I] LAUNCH task # 69 (type FNDP) for 42 DLCflexbar-PT-8a-LTLCardinality-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 71 (type EXCL) for DLCflexbar-PT-8a-LTLCardinality-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
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[[35mlola[0m][I] result : true
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[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-15: AG 0 0 0 0 1 0 0 2
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[[35mlola[0m][.] 55 LTL SRCH 46/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-10 3769853 m, 35357 m/sec, 12325339 t fired, .
[[35mlola[0m][.] 56 LTL SRCH 46/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-11 2910171 m, 21312 m/sec, 11073366 t fired, .
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[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-15: AG 0 0 0 0 1 0 0 2
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[[35mlola[0m][.] 55 LTL SRCH 51/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-10 3921585 m, 30346 m/sec, 12833203 t fired, .
[[35mlola[0m][.] 56 LTL SRCH 51/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-11 2994333 m, 16832 m/sec, 11557799 t fired, .
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[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-00: LTL/CTL 0 0 0 0 1 0 0 0
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[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-15: AG 0 0 0 0 1 0 0 2
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[[35mlola[0m][.] 55 LTL SRCH 56/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-10 4030728 m, 21828 m/sec, 13199373 t fired, .
[[35mlola[0m][.] 56 LTL SRCH 56/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-11 3070373 m, 15208 m/sec, 12010937 t fired, .
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[[35mlola[0m][.] DLCflexbar-PT-8a-LTLCardinality-00: LTL/CTL 0 0 0 0 1 0 0 0
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[[35mlola[0m][.] 55 LTL SRCH 61/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-10 4167620 m, 27378 m/sec, 13673580 t fired, .
[[35mlola[0m][.] 56 LTL SRCH 61/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-11 3163484 m, 18622 m/sec, 12563936 t fired, .
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[[35mlola[0m][I] LAUNCH task # 75 (type EXCL) for 49 DLCflexbar-PT-8a-LTLCardinality-15
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[[35mlola[0m][I] LAUNCH task # 73 (type FNDP) for 49 DLCflexbar-PT-8a-LTLCardinality-15
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[[35mlola[0m][I] FINISHED task # 75 (type EXCL) for DLCflexbar-PT-8a-LTLCardinality-15
[[35mlola[0m][I] result : true
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[[35mlola[0m][.] 55 LTL SRCH 66/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-10 4289719 m, 24419 m/sec, 14081621 t fired, .
[[35mlola[0m][.] 56 LTL SRCH 66/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-11 3255325 m, 18368 m/sec, 13106851 t fired, .
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[[35mlola[0m][.] 55 LTL SRCH 71/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-10 4423531 m, 26762 m/sec, 14529848 t fired, .
[[35mlola[0m][.] 56 LTL SRCH 71/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-11 3342884 m, 17511 m/sec, 13652446 t fired, .
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[[35mlola[0m][.] 55 LTL SRCH 76/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-10 4558174 m, 26928 m/sec, 15001239 t fired, .
[[35mlola[0m][.] 56 LTL SRCH 76/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-11 3442974 m, 20018 m/sec, 14218511 t fired, .
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[[35mlola[0m][.] 55 LTL SRCH 81/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-10 4712322 m, 30829 m/sec, 15515377 t fired, .
[[35mlola[0m][.] 56 LTL SRCH 81/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-11 3527716 m, 16948 m/sec, 14750096 t fired, .
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[[35mlola[0m][.] 55 LTL SRCH 86/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-10 4851212 m, 27778 m/sec, 15980363 t fired, .
[[35mlola[0m][.] 56 LTL SRCH 86/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-11 3619023 m, 18261 m/sec, 15331720 t fired, .
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[[35mlola[0m][.] 55 LTL SRCH 91/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-10 4998837 m, 29525 m/sec, 16485290 t fired, .
[[35mlola[0m][.] 56 LTL SRCH 91/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-11 3722652 m, 20725 m/sec, 15903063 t fired, .
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[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for DLCflexbar-PT-8a-LTLCardinality-00
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[[35mlola[0m][.] 13 LTL EXCL 0/578 1/2000 DLCflexbar-PT-8a-LTLCardinality-04 464 m, 92 m/sec, 30670 t fired, .
[[35mlola[0m][.] 55 LTL SRCH 96/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-10 5199669 m, 40166 m/sec, 17165193 t fired, .
[[35mlola[0m][.] 56 LTL SRCH 96/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-11 3843667 m, 24203 m/sec, 16608610 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 5/578 1/2000 DLCflexbar-PT-8a-LTLCardinality-04 12481 m, 2403 m/sec, 875338 t fired, .
[[35mlola[0m][.] 55 LTL SRCH 101/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-10 6250343 m, 210134 m/sec, 20347762 t fired, .
[[35mlola[0m][.] 56 LTL SRCH 101/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-11 4297121 m, 90690 m/sec, 19277109 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 10/578 1/2000 DLCflexbar-PT-8a-LTLCardinality-04 29581 m, 3420 m/sec, 1872542 t fired, .
[[35mlola[0m][.] 55 LTL SRCH 106/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-10 7631743 m, 276280 m/sec, 24668391 t fired, .
[[35mlola[0m][.] 56 LTL SRCH 106/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-11 4903588 m, 121293 m/sec, 22875076 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 15/578 1/2000 DLCflexbar-PT-8a-LTLCardinality-04 48781 m, 3840 m/sec, 2854544 t fired, .
[[35mlola[0m][.] 56 LTL SRCH 111/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-11 5500711 m, 119424 m/sec, 26441406 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 20/578 1/2000 DLCflexbar-PT-8a-LTLCardinality-04 68267 m, 3897 m/sec, 3849160 t fired, .
[[35mlola[0m][.] 56 LTL SRCH 116/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-11 6100778 m, 120013 m/sec, 30001604 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 25/578 1/2000 DLCflexbar-PT-8a-LTLCardinality-04 87385 m, 3823 m/sec, 4830454 t fired, .
[[35mlola[0m][.] 56 LTL SRCH 121/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-11 6678068 m, 115458 m/sec, 33498995 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 30/578 1/2000 DLCflexbar-PT-8a-LTLCardinality-04 106709 m, 3864 m/sec, 5826545 t fired, .
[[35mlola[0m][.] 56 LTL SRCH 126/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-11 7261979 m, 116782 m/sec, 36963081 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 35/578 2/2000 DLCflexbar-PT-8a-LTLCardinality-04 127059 m, 4070 m/sec, 6875450 t fired, .
[[35mlola[0m][.] 56 LTL SRCH 131/3564 1/5 DLCflexbar-PT-8a-LTLCardinality-11 7825940 m, 112792 m/sec, 40523336 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 45/578 2/2000 DLCflexbar-PT-8a-LTLCardinality-04 168290 m, 4152 m/sec, 8994622 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 65/578 3/2000 DLCflexbar-PT-8a-LTLCardinality-04 251676 m, 4337 m/sec, 13250221 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 70/578 3/2000 DLCflexbar-PT-8a-LTLCardinality-04 273453 m, 4355 m/sec, 14363523 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 75/578 3/2000 DLCflexbar-PT-8a-LTLCardinality-04 294998 m, 4309 m/sec, 15462848 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 80/578 4/2000 DLCflexbar-PT-8a-LTLCardinality-04 316423 m, 4285 m/sec, 16558454 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 85/578 4/2000 DLCflexbar-PT-8a-LTLCardinality-04 337751 m, 4265 m/sec, 17653997 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 90/578 4/2000 DLCflexbar-PT-8a-LTLCardinality-04 359390 m, 4327 m/sec, 18762520 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 95/578 4/2000 DLCflexbar-PT-8a-LTLCardinality-04 381196 m, 4361 m/sec, 19876227 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 105/578 5/2000 DLCflexbar-PT-8a-LTLCardinality-04 424656 m, 4342 m/sec, 22100218 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 110/578 5/2000 DLCflexbar-PT-8a-LTLCardinality-04 446510 m, 4370 m/sec, 23215746 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 115/578 5/2000 DLCflexbar-PT-8a-LTLCardinality-04 468286 m, 4355 m/sec, 24327876 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 120/578 5/2000 DLCflexbar-PT-8a-LTLCardinality-04 490080 m, 4358 m/sec, 25441719 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 125/578 6/2000 DLCflexbar-PT-8a-LTLCardinality-04 511743 m, 4332 m/sec, 26559183 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 130/578 6/2000 DLCflexbar-PT-8a-LTLCardinality-04 533249 m, 4301 m/sec, 27670226 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 135/578 6/2000 DLCflexbar-PT-8a-LTLCardinality-04 554781 m, 4306 m/sec, 28776808 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 140/578 6/2000 DLCflexbar-PT-8a-LTLCardinality-04 576246 m, 4293 m/sec, 29890996 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 145/578 7/2000 DLCflexbar-PT-8a-LTLCardinality-04 597839 m, 4318 m/sec, 31005276 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 150/578 7/2000 DLCflexbar-PT-8a-LTLCardinality-04 619140 m, 4260 m/sec, 32108983 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 155/578 7/2000 DLCflexbar-PT-8a-LTLCardinality-04 641007 m, 4373 m/sec, 33244550 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 160/578 7/2000 DLCflexbar-PT-8a-LTLCardinality-04 662793 m, 4357 m/sec, 34380016 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 165/578 7/2000 DLCflexbar-PT-8a-LTLCardinality-04 684613 m, 4364 m/sec, 35515929 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 170/578 8/2000 DLCflexbar-PT-8a-LTLCardinality-04 706497 m, 4376 m/sec, 36651766 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 175/578 8/2000 DLCflexbar-PT-8a-LTLCardinality-04 728456 m, 4391 m/sec, 37793393 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 180/578 8/2000 DLCflexbar-PT-8a-LTLCardinality-04 750339 m, 4376 m/sec, 38932705 t fired, .
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[[35mlola[0m][.] 13 LTL EXCL 185/578 8/2000 DLCflexbar-PT-8a-LTLCardinality-04 772285 m, 4389 m/sec, 40075854 t fired, .
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 408 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCflexbar-PT-8a"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is DLCflexbar-PT-8a, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r115-smll-171624276400099"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DLCflexbar-PT-8a.tgz
mv DLCflexbar-PT-8a execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;