About the Execution of LoLA for DLCflexbar-PT-7a
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16207.235 | 360039.00 | 507840.00 | 1820.40 | [undef] | Cannot compute |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r115-smll-171624276300083.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is DLCflexbar-PT-7a, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r115-smll-171624276300083
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 6.7M
-rw-r--r-- 1 mcc users 8.0K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 89K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K May 19 07:08 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K May 19 15:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Apr 22 14:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Apr 22 14:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Apr 13 13:49 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 158K Apr 13 13:49 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.9K Apr 13 04:24 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K Apr 13 04:24 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:37 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 22 14:37 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 6.2M May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCflexbar-PT-7a-LTLCardinality-00
FORMULA_NAME DLCflexbar-PT-7a-LTLCardinality-01
FORMULA_NAME DLCflexbar-PT-7a-LTLCardinality-02
FORMULA_NAME DLCflexbar-PT-7a-LTLCardinality-03
FORMULA_NAME DLCflexbar-PT-7a-LTLCardinality-04
FORMULA_NAME DLCflexbar-PT-7a-LTLCardinality-05
FORMULA_NAME DLCflexbar-PT-7a-LTLCardinality-06
FORMULA_NAME DLCflexbar-PT-7a-LTLCardinality-07
FORMULA_NAME DLCflexbar-PT-7a-LTLCardinality-08
FORMULA_NAME DLCflexbar-PT-7a-LTLCardinality-09
FORMULA_NAME DLCflexbar-PT-7a-LTLCardinality-10
FORMULA_NAME DLCflexbar-PT-7a-LTLCardinality-11
FORMULA_NAME DLCflexbar-PT-7a-LTLCardinality-12
FORMULA_NAME DLCflexbar-PT-7a-LTLCardinality-13
FORMULA_NAME DLCflexbar-PT-7a-LTLCardinality-14
FORMULA_NAME DLCflexbar-PT-7a-LTLCardinality-15
=== Now, execution of the tool begins
BK_START 1717034385037
BK_STOP 1717034745076
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLCardinality.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 52 (type SKEL/SRCH) for 3 DLCflexbar-PT-7a-LTLCardinality-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 52 (type SKEL/SRCH) for DLCflexbar-PT-7a-LTLCardinality-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 53 (type SKEL/SRCH) for 9 DLCflexbar-PT-7a-LTLCardinality-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 53 (type SKEL/SRCH) for DLCflexbar-PT-7a-LTLCardinality-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 54 (type SKEL/SRCH) for 24 DLCflexbar-PT-7a-LTLCardinality-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 54 (type SKEL/SRCH) for DLCflexbar-PT-7a-LTLCardinality-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 3
[[35mlola[0m][I] fired transitions : 3
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 55 (type SKEL/SRCH) for 27 DLCflexbar-PT-7a-LTLCardinality-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 55 (type SKEL/SRCH) for DLCflexbar-PT-7a-LTLCardinality-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 8
[[35mlola[0m][I] fired transitions : 11
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-7a-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-7a-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCflexbar-PT-7a-LTLCardinality-00: INITIAL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-7a-LTLCardinality-01: LTL/CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-7a-LTLCardinality-02: INITIAL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-7a-LTLCardinality-03: LTL/CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-7a-LTLCardinality-04: INITIAL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-7a-LTLCardinality-05: INITIAL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-7a-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-7a-LTLCardinality-07: INITIAL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-7a-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-7a-LTLCardinality-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-7a-LTLCardinality-12: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-7a-LTLCardinality-13: INITIAL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-7a-LTLCardinality-14: INITIAL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-7a-LTLCardinality-15: INITIAL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 17 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] planning for DLCflexbar-PT-7a-LTLCardinality-09 stopped (result already fixed).
[[35mlola[0m][I] planning for DLCflexbar-PT-7a-LTLCardinality-08 stopped (result already fixed).
[[35mlola[0m][I] LAUNCH task # 1 (type CNST) for 0 DLCflexbar-PT-7a-LTLCardinality-00
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 7 (type CNST) for 6 DLCflexbar-PT-7a-LTLCardinality-02
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 13 (type CNST) for 12 DLCflexbar-PT-7a-LTLCardinality-04
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 16 (type CNST) for 15 DLCflexbar-PT-7a-LTLCardinality-05
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 22 (type CNST) for 21 DLCflexbar-PT-7a-LTLCardinality-07
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 44 (type CNST) for 43 DLCflexbar-PT-7a-LTLCardinality-13
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] FINISHED task # 1 (type CNST) for DLCflexbar-PT-7a-LTLCardinality-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 16 (type CNST) for DLCflexbar-PT-7a-LTLCardinality-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 22 (type CNST) for DLCflexbar-PT-7a-LTLCardinality-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 7 (type CNST) for DLCflexbar-PT-7a-LTLCardinality-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 44 (type CNST) for DLCflexbar-PT-7a-LTLCardinality-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 13 (type CNST) for DLCflexbar-PT-7a-LTLCardinality-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 47 (type CNST) for 46 DLCflexbar-PT-7a-LTLCardinality-14
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 56 (type SKEL/SRCH) for 36 DLCflexbar-PT-7a-LTLCardinality-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 47 (type CNST) for DLCflexbar-PT-7a-LTLCardinality-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 50 (type CNST) for 49 DLCflexbar-PT-7a-LTLCardinality-15
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 50 (type CNST) for DLCflexbar-PT-7a-LTLCardinality-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 34 (type EXCL) for 33 DLCflexbar-PT-7a-LTLCardinality-11
[[35mlola[0m][I] time limit : 511 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-7a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-7a-LTLCardinality-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-7a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-7a-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-7a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-7a-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-7a-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-7a-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-7a-LTLCardinality-14: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-7a-LTLCardinality-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] DLCflexbar-PT-7a-LTLCardinality-01: LTL/CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-7a-LTLCardinality-03: LTL/CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-7a-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-7a-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-7a-LTLCardinality-11: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] DLCflexbar-PT-7a-LTLCardinality-12: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 0/511 0/2000 DLCflexbar-PT-7a-LTLCardinality-11 --
[[35mlola[0m][.] 56 LTL SRCH 3/3581 1/5 DLCflexbar-PT-7a-LTLCardinality-12 206832 m, 41366 m/sec, 1438140 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 22 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 34 (type EXCL) for DLCflexbar-PT-7a-LTLCardinality-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 2
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-7a-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-7a-LTLCardinality-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-7a-LTLCardinality-04: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-7a-LTLCardinality-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-7a-LTLCardinality-07: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-7a-LTLCardinality-08: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-7a-LTLCardinality-09: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-7a-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-7a-LTLCardinality-13: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-7a-LTLCardinality-14: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-7a-LTLCardinality-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
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[[35mlola[0m][.] 56 LTL SRCH 8/3581 1/5 DLCflexbar-PT-7a-LTLCardinality-12 537748 m, 66183 m/sec, 3973452 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 13/3581 1/5 DLCflexbar-PT-7a-LTLCardinality-12 734364 m, 39323 m/sec, 5507174 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 18/3581 1/5 DLCflexbar-PT-7a-LTLCardinality-12 861793 m, 25485 m/sec, 6543769 t fired, .
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[[35mlola[0m][I] FINISHED task # 19 (type EXCL) for DLCflexbar-PT-7a-LTLCardinality-06
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[[35mlola[0m][.] 56 LTL SRCH 23/3581 1/5 DLCflexbar-PT-7a-LTLCardinality-12 994593 m, 26560 m/sec, 7605457 t fired, .
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[[35mlola[0m][I] FINISHED task # 31 (type EXCL) for DLCflexbar-PT-7a-LTLCardinality-10
[[35mlola[0m][I] result : false
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[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 DLCflexbar-PT-7a-LTLCardinality-01
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[[35mlola[0m][I] FINISHED task # 4 (type EXCL) for DLCflexbar-PT-7a-LTLCardinality-01
[[35mlola[0m][I] result : true
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[[35mlola[0m][I] LAUNCH task # 41 (type EXCL) for 36 DLCflexbar-PT-7a-LTLCardinality-12
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[[35mlola[0m][.] 41 LTL EXCL 2/1185 1/2000 DLCflexbar-PT-7a-LTLCardinality-12 9032 m, 1806 m/sec, 614424 t fired, .
[[35mlola[0m][.] 56 LTL SRCH 28/3581 1/5 DLCflexbar-PT-7a-LTLCardinality-12 1294788 m, 60039 m/sec, 10074937 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 33/3581 1/5 DLCflexbar-PT-7a-LTLCardinality-12 1805416 m, 102125 m/sec, 14295508 t fired, .
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[[35mlola[0m][.] 41 LTL EXCL 12/1185 1/2000 DLCflexbar-PT-7a-LTLCardinality-12 48745 m, 3904 m/sec, 3366063 t fired, .
[[35mlola[0m][.] 56 LTL SRCH 38/3581 1/5 DLCflexbar-PT-7a-LTLCardinality-12 2284947 m, 95906 m/sec, 18332298 t fired, .
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[[35mlola[0m][.] 41 LTL EXCL 17/1185 1/2000 DLCflexbar-PT-7a-LTLCardinality-12 67563 m, 3763 m/sec, 4689289 t fired, .
[[35mlola[0m][.] 56 LTL SRCH 43/3581 1/5 DLCflexbar-PT-7a-LTLCardinality-12 2752661 m, 93542 m/sec, 22293387 t fired, .
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 407 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCflexbar-PT-7a"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is DLCflexbar-PT-7a, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r115-smll-171624276300083"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DLCflexbar-PT-7a.tgz
mv DLCflexbar-PT-7a execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;