Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r115-smll-171624276300067.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is DLCflexbar-PT-6a, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r115-smll-171624276300067
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 4.7M
-rw-r--r-- 1 mcc users 7.3K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 82K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Apr 22 14:37 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Apr 22 14:37 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Apr 22 14:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 22 14:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Apr 13 02:46 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 134K Apr 13 02:46 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Apr 12 22:26 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 91K Apr 12 22:26 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:37 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:37 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 4.2M May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCflexbar-PT-6a-LTLCardinality-00
FORMULA_NAME DLCflexbar-PT-6a-LTLCardinality-01
FORMULA_NAME DLCflexbar-PT-6a-LTLCardinality-02
FORMULA_NAME DLCflexbar-PT-6a-LTLCardinality-03
FORMULA_NAME DLCflexbar-PT-6a-LTLCardinality-04
FORMULA_NAME DLCflexbar-PT-6a-LTLCardinality-05
FORMULA_NAME DLCflexbar-PT-6a-LTLCardinality-06
FORMULA_NAME DLCflexbar-PT-6a-LTLCardinality-07
FORMULA_NAME DLCflexbar-PT-6a-LTLCardinality-08
FORMULA_NAME DLCflexbar-PT-6a-LTLCardinality-09
FORMULA_NAME DLCflexbar-PT-6a-LTLCardinality-10
FORMULA_NAME DLCflexbar-PT-6a-LTLCardinality-11
FORMULA_NAME DLCflexbar-PT-6a-LTLCardinality-12
FORMULA_NAME DLCflexbar-PT-6a-LTLCardinality-13
FORMULA_NAME DLCflexbar-PT-6a-LTLCardinality-14
FORMULA_NAME DLCflexbar-PT-6a-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1717027671242

FORMULA DLCflexbar-PT-6a-LTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-6a-LTLCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-6a-LTLCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-6a-LTLCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-6a-LTLCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-6a-LTLCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-6a-LTLCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-6a-LTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-6a-LTLCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-6a-LTLCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-6a-LTLCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-6a-LTLCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-6a-LTLCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-6a-LTLCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-6a-LTLCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-6a-LTLCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[lola] FINAL RESULTS
[lola]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola] DLCflexbar-PT-6a-LTLCardinality-00: INITIAL true preprocessing
[lola] DLCflexbar-PT-6a-LTLCardinality-01: CONJ false skeleton: LTL model checker
[lola] DLCflexbar-PT-6a-LTLCardinality-02: F true state space / EG
[lola] DLCflexbar-PT-6a-LTLCardinality-03: INITIAL false preprocessing
[lola] DLCflexbar-PT-6a-LTLCardinality-04: INITIAL true preprocessing
[lola] DLCflexbar-PT-6a-LTLCardinality-05: LTL false LTL model checker
[lola] DLCflexbar-PT-6a-LTLCardinality-06: INITIAL true preprocessing
[lola] DLCflexbar-PT-6a-LTLCardinality-07: LTL false LTL model checker
[lola] DLCflexbar-PT-6a-LTLCardinality-08: LTL/CTL true LTL model checker
[lola] DLCflexbar-PT-6a-LTLCardinality-09: INITIAL true preprocessing
[lola] DLCflexbar-PT-6a-LTLCardinality-10: LTL/CTL true LTL model checker
[lola] DLCflexbar-PT-6a-LTLCardinality-11: LTL false LTL model checker
[lola] DLCflexbar-PT-6a-LTLCardinality-12: LTL false LTL model checker
[lola] DLCflexbar-PT-6a-LTLCardinality-13: LTL true skeleton: LTL model checker
[lola] DLCflexbar-PT-6a-LTLCardinality-14: LTL true LTL model checker
[lola] DLCflexbar-PT-6a-LTLCardinality-15: LTL true LTL model checker
[lola]
[lola] Time elapsed: 64 secs. Pages in use: 2

BK_STOP 1717027735993

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from LTLCardinality.xml
[lola][I] NOTDEADLOCKFREE
[lola][I] NOTDEADLOCKFREE
[lola][I] Rule S: 0 transitions removed,0 places removed
[lola][I] NOTDEADLOCKFREE
[lola][I] LAUNCH task # 52 (type SKEL/SRCH) for 3 DLCflexbar-PT-6a-LTLCardinality-01
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 52 (type SKEL/SRCH) for DLCflexbar-PT-6a-LTLCardinality-01
[lola][I] result : false
[lola][I] markings : 84
[lola][I] fired transitions : 84
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] NOTDEADLOCKFREE
[*** LOG ERROR #0001 ***] [2024-05-30 00:08:04] [status_logger] string pointer is null
[lola][I] LAUNCH task # 17 (type CNST) for 16 DLCflexbar-PT-6a-LTLCardinality-04
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 17 (type CNST) for DLCflexbar-PT-6a-LTLCardinality-04
[lola][I] result : true
[lola][I] LAUNCH task # 1 (type CNST) for 0 DLCflexbar-PT-6a-LTLCardinality-00
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] LAUNCH task # 14 (type CNST) for 13 DLCflexbar-PT-6a-LTLCardinality-03
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 14 (type CNST) for DLCflexbar-PT-6a-LTLCardinality-03
[lola][I] result : false
[lola][I] FINISHED task # 1 (type CNST) for DLCflexbar-PT-6a-LTLCardinality-00
[lola][I] result : true
[lola][I] NOTDEADLOCKFREE
[lola][I] LAUNCH task # 23 (type CNST) for 22 DLCflexbar-PT-6a-LTLCardinality-06
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] LAUNCH task # 32 (type CNST) for 31 DLCflexbar-PT-6a-LTLCardinality-09
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 32 (type CNST) for DLCflexbar-PT-6a-LTLCardinality-09
[lola][I] result : true
[lola][I] FINISHED task # 23 (type CNST) for DLCflexbar-PT-6a-LTLCardinality-06
[lola][I] result : true
[lola][I] NOTDEADLOCKFREE
[lola][I] LAUNCH task # 53 (type SKEL/SRCH) for 37 DLCflexbar-PT-6a-LTLCardinality-11
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] NOTDEADLOCKFREE
[lola][I] NOTDEADLOCKFREE
[lola][I] FINISHED task # 53 (type SKEL/SRCH) for DLCflexbar-PT-6a-LTLCardinality-11
[lola][I] result : false
[lola][I] markings : 3
[lola][I] fired transitions : 3
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] NOTDEADLOCKFREE
[lola][I] LAUNCH task # 54 (type SKEL/SRCH) for 34 DLCflexbar-PT-6a-LTLCardinality-10
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 54 (type SKEL/SRCH) for DLCflexbar-PT-6a-LTLCardinality-10
[lola][I] result : true
[lola][I] markings : 2
[lola][I] fired transitions : 1
[lola][I] time used : 1
[lola][I] memory pages used : 1
[lola][I] NOTDEADLOCKFREE
[lola][I] NOTDEADLOCKFREE
[lola][I] LAUNCH task # 55 (type SKEL/SRCH) for 28 DLCflexbar-PT-6a-LTLCardinality-08
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 55 (type SKEL/SRCH) for DLCflexbar-PT-6a-LTLCardinality-08
[lola][I] result : true
[lola][I] markings : 2
[lola][I] fired transitions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] NOTDEADLOCKFREE
[lola][I] LAUNCH task # 56 (type SKEL/SRCH) for 43 DLCflexbar-PT-6a-LTLCardinality-13
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 56 (type SKEL/SRCH) for DLCflexbar-PT-6a-LTLCardinality-13
[lola][I] result : true
[lola][I] markings : 8
[lola][I] fired transitions : 11
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] DLCflexbar-PT-6a-LTLCardinality-00: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-01: CONJ false skeleton: LTL model checker
[lola][.] DLCflexbar-PT-6a-LTLCardinality-03: INITIAL false preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-04: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-06: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-09: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-13: LTL true skeleton: LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] DLCflexbar-PT-6a-LTLCardinality-05: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-08: LTL/CTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-10: LTL/CTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0
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[lola][.] DLCflexbar-PT-6a-LTLCardinality-00: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-01: CONJ false skeleton: LTL model checker
[lola][.] DLCflexbar-PT-6a-LTLCardinality-03: INITIAL false preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-04: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-06: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-09: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-13: LTL true skeleton: LTL model checker
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] DLCflexbar-PT-6a-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-08: LTL/CTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-10: LTL/CTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0
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[lola][.] DLCflexbar-PT-6a-LTLCardinality-00: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-01: CONJ false skeleton: LTL model checker
[lola][.] DLCflexbar-PT-6a-LTLCardinality-03: INITIAL false preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-04: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-05: LTL false LTL model checker
[lola][.] DLCflexbar-PT-6a-LTLCardinality-06: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-09: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-13: LTL true skeleton: LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCflexbar-PT-6a-LTLCardinality-02: F 0 1 1 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-08: LTL/CTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-10: LTL/CTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 50 LTL EXCL 2/447 1/2000 DLCflexbar-PT-6a-LTLCardinality-15 1137 m, 227 m/sec, 67187 t fired, .
[lola][.] 61 EF STEQ 1/3575 0/5 DLCflexbar-PT-6a-LTLCardinality-02 sara not yet started (preprocessing).
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[lola][.] DLCflexbar-PT-6a-LTLCardinality-00: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-01: CONJ false skeleton: LTL model checker
[lola][.] DLCflexbar-PT-6a-LTLCardinality-03: INITIAL false preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-04: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-05: LTL false LTL model checker
[lola][.] DLCflexbar-PT-6a-LTLCardinality-06: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-09: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-13: LTL true skeleton: LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCflexbar-PT-6a-LTLCardinality-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-08: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 50 LTL EXCL 7/447 1/2000 DLCflexbar-PT-6a-LTLCardinality-15 10902 m, 1953 m/sec, 654265 t fired, .
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[lola][.] DLCflexbar-PT-6a-LTLCardinality-00: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-01: CONJ false skeleton: LTL model checker
[lola][.] DLCflexbar-PT-6a-LTLCardinality-03: INITIAL false preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-04: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-05: LTL false LTL model checker
[lola][.] DLCflexbar-PT-6a-LTLCardinality-06: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-09: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-13: LTL true skeleton: LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCflexbar-PT-6a-LTLCardinality-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-08: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 50 LTL EXCL 12/447 1/2000 DLCflexbar-PT-6a-LTLCardinality-15 33981 m, 4615 m/sec, 2033944 t fired, .
[lola][.]
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[lola][.] DLCflexbar-PT-6a-LTLCardinality-00: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-01: CONJ false skeleton: LTL model checker
[lola][.] DLCflexbar-PT-6a-LTLCardinality-03: INITIAL false preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-04: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-05: LTL false LTL model checker
[lola][.] DLCflexbar-PT-6a-LTLCardinality-06: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-09: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-13: LTL true skeleton: LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCflexbar-PT-6a-LTLCardinality-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-08: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 50 LTL EXCL 17/447 1/2000 DLCflexbar-PT-6a-LTLCardinality-15 56546 m, 4513 m/sec, 3383322 t fired, .
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[lola][.] DLCflexbar-PT-6a-LTLCardinality-00: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-01: CONJ false skeleton: LTL model checker
[lola][.] DLCflexbar-PT-6a-LTLCardinality-03: INITIAL false preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-04: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-05: LTL false LTL model checker
[lola][.] DLCflexbar-PT-6a-LTLCardinality-06: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-09: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-13: LTL true skeleton: LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCflexbar-PT-6a-LTLCardinality-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-08: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 50 LTL EXCL 22/447 1/2000 DLCflexbar-PT-6a-LTLCardinality-15 78965 m, 4483 m/sec, 4731000 t fired, .
[lola][.]
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[lola][.] DLCflexbar-PT-6a-LTLCardinality-00: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-01: CONJ false skeleton: LTL model checker
[lola][.] DLCflexbar-PT-6a-LTLCardinality-03: INITIAL false preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-04: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-05: LTL false LTL model checker
[lola][.] DLCflexbar-PT-6a-LTLCardinality-06: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-09: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-13: LTL true skeleton: LTL model checker
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCflexbar-PT-6a-LTLCardinality-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-08: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 50 LTL EXCL 27/447 1/2000 DLCflexbar-PT-6a-LTLCardinality-15 101631 m, 4533 m/sec, 6094796 t fired, .
[lola][.]
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[lola][.] DLCflexbar-PT-6a-LTLCardinality-00: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-01: CONJ false skeleton: LTL model checker
[lola][.] DLCflexbar-PT-6a-LTLCardinality-03: INITIAL false preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-04: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-05: LTL false LTL model checker
[lola][.] DLCflexbar-PT-6a-LTLCardinality-06: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-09: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-13: LTL true skeleton: LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCflexbar-PT-6a-LTLCardinality-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-08: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 50 LTL EXCL 32/447 1/2000 DLCflexbar-PT-6a-LTLCardinality-15 123151 m, 4304 m/sec, 7388057 t fired, .
[lola][.]
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[lola][I] FINISHED task # 50 (type EXCL) for DLCflexbar-PT-6a-LTLCardinality-15
[lola][I] result : true
[lola][I] markings : 142886
[lola][I] fired transitions : 8587387
[lola][I] time used : 36
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[lola][I] LAUNCH task # 47 (type EXCL) for 46 DLCflexbar-PT-6a-LTLCardinality-14
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[lola][.] DLCflexbar-PT-6a-LTLCardinality-00: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-01: CONJ false skeleton: LTL model checker
[lola][.] DLCflexbar-PT-6a-LTLCardinality-03: INITIAL false preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-04: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-05: LTL false LTL model checker
[lola][.] DLCflexbar-PT-6a-LTLCardinality-06: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-09: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-6a-LTLCardinality-13: LTL true skeleton: LTL model checker
[lola][.] DLCflexbar-PT-6a-LTLCardinality-15: LTL true LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCflexbar-PT-6a-LTLCardinality-02: F 0 1 0 0 2 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-08: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-10: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-6a-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 47 LTL EXCL 1/505 1/2000 DLCflexbar-PT-6a-LTLCardinality-14 5919 m, 1183 m/sec, 55350 t fired, .
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[lola][I] FINISHED task # 47 (type EXCL) for DLCflexbar-PT-6a-LTLCardinality-14
[lola][I] result : true
[lola][I] markings : 36342
[lola][I] fired transitions : 651797
[lola][I] time used : 4
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 41 (type EXCL) for 40 DLCflexbar-PT-6a-LTLCardinality-12
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[lola][I] FINISHED task # 41 (type EXCL) for DLCflexbar-PT-6a-LTLCardinality-12
[lola][I] result : false
[lola][I] markings : 3
[lola][I] fired transitions : 3
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[lola][I] LAUNCH task # 38 (type EXCL) for 37 DLCflexbar-PT-6a-LTLCardinality-11
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[lola][I] FINISHED task # 38 (type EXCL) for DLCflexbar-PT-6a-LTLCardinality-11
[lola][I] result : false
[lola][I] markings : 3
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[lola][I] time limit : 884 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 35 (type EXCL) for DLCflexbar-PT-6a-LTLCardinality-10
[lola][I] result : true
[lola][I] markings : 2
[lola][I] fired transitions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 29 (type EXCL) for 28 DLCflexbar-PT-6a-LTLCardinality-08
[lola][I] time limit : 1178 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 29 (type EXCL) for DLCflexbar-PT-6a-LTLCardinality-08
[lola][I] result : true
[lola][I] markings : 2
[lola][I] fired transitions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 26 (type EXCL) for 25 DLCflexbar-PT-6a-LTLCardinality-07
[lola][I] time limit : 1768 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 26 (type EXCL) for DLCflexbar-PT-6a-LTLCardinality-07
[lola][I] result : false
[lola][I] markings : 3
[lola][I] fired transitions : 3
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 58 (type EXCL) for 10 DLCflexbar-PT-6a-LTLCardinality-02
[lola][I] time limit : 3536 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 58 (type EXCL) for DLCflexbar-PT-6a-LTLCardinality-02
[lola][I] result : false
[lola][I] markings : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] Portfolio finished: no open formulas

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCflexbar-PT-6a"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is DLCflexbar-PT-6a, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r115-smll-171624276300067"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCflexbar-PT-6a.tgz
mv DLCflexbar-PT-6a execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;