MCC'2024- Execution of r115-smll-171624276200034

About the Execution of LoLA for DLCflexbar-PT-4a

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
16209.315	697688.00	647080.00	3318.90	??????F????T????	normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r115-smll-171624276200034.qcow2',
Waiting for the VM to be ready (probing ssh)
.............................................................
=======================================
Generated by BenchKit 2-5568
Executing tool lola
Input is DLCflexbar-PT-4a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r115-smll-171624276200034
=============================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.1M
-rw-r--r-- 1 mcc users 6.8K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 73K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDef
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVer
-rw-r--r-- 1 mcc users 3.3K Apr 22 14:37 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Apr 22 14:37 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Apr 22 14:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 22 14:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Apr 12 17:36 ReachabilityCardinal
-rw-r--r-- 1 mcc users 112K Apr 12 17:36 ReachabilityCardinal
-rw-r--r-- 1 mcc users 7.7K Apr 12 16:51 ReachabilityFireabil
-rw-r--r-- 1 mcc users 62K Apr 12 16:51 ReachabilityFireabil
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:37 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:37 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 1.7M May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-2024-00
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-2024-01
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-2024-02
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-2024-03
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-2024-04
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-2024-05
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-2024-06
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-2024-07
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-2024-08
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-2024-09
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-2024-10
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-2024-11
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-2023-12
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-2023-13
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-2023-14
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717013535980

FORMULA DLCflexbar-PT-4a-CTLFireability-2024-11
FORMULA DLCflexbar-PT-4a-CTLFireability-2024-06

BK_STOP 1717014233668

--------------------
content from stderr:

[[35mlola[0m][I] LoLA will run for 3600 seconds at
[[35mlola[0m][W] [1m[33munknown unit in memory specification:
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mm
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmo
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from
[[35mlola[0m][I] Rule S: 0 transitions removed,0
[[35mlola[0m][I] LAUNCH task # 54 (type SKEL/FNDP)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 55 (type SKEL/EQUN)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 56 (type SKEL/SRCH)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 54 (type SKEL/FNDP)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 55 (type EQUN)
[[35mlola[0m][W] CANCELED task # 56 (type SRCH)
[[35mlola[0m][I] FINISHED task # 55 (type SKEL/EQUN)
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 58 (type SKEL/FNDP)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 59 (type SKEL/EQUN)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 60 (type SKEL/SRCH)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 60 (type SKEL/SRCH)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 5
[[35mlola[0m][I] fired transitions : 4
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 58 (type FNDP)
[[35mlola[0m][W] CANCELED task # 59 (type EQUN)
[[35mlola[0m][I] FINISHED task # 58 (type SKEL/FNDP)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 59 (type SKEL/EQUN)
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 63 (type EXCL) for
[[35mlola[0m][I] time limit : 211 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 61 (type FNDP) for
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 62 (type EQUN) for
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 63 (type EXCL)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 61 (type FNDP)
[[35mlola[0m][W] CANCELED task # 62 (type EQUN)
[[35mlola[0m][I] FINISHED task # 61 (type FNDP)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 62 (type EQUN)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 67 (type EXCL) for
[[35mlola[0m][I] time limit : 224 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 65 (type FNDP) for
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 66 (type EQUN) for
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 66 (type EQUN)
[[35mlola[0m][I] result : true
[[35mlola[0m][W] CANCELED task # 65 (type FNDP)
[[35mlola[0m][W] CANCELED task # 67 (type EXCL)
[[35mlola[0m][I] FINISHED task # 65 (type FNDP)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-4a-CTLFireability-2024-06:
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-4a-CTLFireability-2024-11:
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[[35mlola[0m][.] DLCflexbar-PT-4a-CTLFireability-2023-12:
[[35mlola[0m][.] DLCflexbar-PT-4a-CTLFireability-2023-13:
[[35mlola[0m][.] DLCflexbar-PT-4a-CTLFireability-2023-14:
[[35mlola[0m][.] DLCflexbar-PT-4a-CTLFireability-2023-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 6 secs. Pages
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 71 (type EQUN) for
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 73 (type EQUN) for
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 77 (type EQUN) for
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 71 (type EQUN)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 79 (type EQUN) for
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 77 (type EQUN)
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 73 (type EQUN)
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 79 (type EQUN)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-4a-CTLFireability-2024-06:
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-4a-CTLFireability-2024-11:
[[35mlola[0m][.]
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[[35mlola[0m][.] DLCflexbar-PT-4a-CTLFireability-2023-15:
[[35mlola[0m][.]
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[[35mlola[0m][.] DLCflexbar-PT-4a-CTLFireability-2024-10:
[[35mlola[0m][.] DLCflexbar-PT-4a-CTLFireability-2023-12:
[[35mlola[0m][.] DLCflexbar-PT-4a-CTLFireability-2023-13:
[[35mlola[0m][.] DLCflexbar-PT-4a-CTLFireability-2023-14:
[[35mlola[0m][.] DLCflexbar-PT-4a-CTLFireability-2023-15:
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[[35mlola[0m][.] DLCflexbar-PT-4a-CTLFireability-2024-10:
[[35mlola[0m][.] DLCflexbar-PT-4a-CTLFireability-2023-12:
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[[35mlola[0m][.] [1m PENDING FORMULAS:
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[[35mlola[0m][.] DLCflexbar-PT-4a-CTLFireability-2023-12:
[[35mlola[0m][.] DLCflexbar-PT-4a-CTLFireability-2023-13:
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..................................................................................................................................................................................................................................................................................................................................................... ============================== ======== inition.xml dict.xml ity.txt ity.xml ity.txt ity.xml template) text file) TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT most ([1m[36m--timelimit[0m) using default[0m odel.pnml[0m ) del.pnml[0m [0m) [4m[34mCTLFireability.xml[0m places removed for 18 DLCflexbar-PT-4a-CTLFireability-2024-06 for 18 DLCflexbar-PT-4a-CTLFireability-2024-06 for 18 DLCflexbar-PT-4a-CTLFireability-2024-06 for DLCflexbar-PT-4a-CTLFireability-2024-06 for DLCflexbar-PT-4a-CTLFireability-2024-06 (obsolete) for DLCflexbar-PT-4a-CTLFireability-2024-06 (obsolete) for DLCflexbar-PT-4a-CTLFireability-2024-06 for 33 DLCflexbar-PT-4a-CTLFireability-2024-11 for 33 DLCflexbar-PT-4a-CTLFireability-2024-11 for 33 DLCflexbar-PT-4a-CTLFireability-2024-11 for DLCflexbar-PT-4a-CTLFireability-2024-11 for DLCflexbar-PT-4a-CTLFireability-2024-11 (obsolete) for DLCflexbar-PT-4a-CTLFireability-2024-11 (obsolete) for DLCflexbar-PT-4a-CTLFireability-2024-11 for DLCflexbar-PT-4a-CTLFireability-2024-11 33 DLCflexbar-PT-4a-CTLFireability-2024-11 33 DLCflexbar-PT-4a-CTLFireability-2024-11 33 DLCflexbar-PT-4a-CTLFireability-2024-11 for DLCflexbar-PT-4a-CTLFireability-2024-11 for DLCflexbar-PT-4a-CTLFireability-2024-11 (obsolete) for DLCflexbar-PT-4a-CTLFireability-2024-11 (obsolete) for DLCflexbar-PT-4a-CTLFireability-2024-11 for DLCflexbar-PT-4a-CTLFireability-2024-11 18 DLCflexbar-PT-4a-CTLFireability-2024-06 18 DLCflexbar-PT-4a-CTLFireability-2024-06 18 DLCflexbar-PT-4a-CTLFireability-2024-06 for DLCflexbar-PT-4a-CTLFireability-2024-06 for DLCflexbar-PT-4a-CTLFireability-2024-06 (obsolete) for DLCflexbar-PT-4a-CTLFireability-2024-06 (obsolete) for DLCflexbar-PT-4a-CTLFireability-2024-06 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 0 0 0 1 0 0 0 CTL 1 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 EFAGEF 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 AGEF 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m in use: 1 3 DLCflexbar-PT-4a-CTLFireability-2024-01 21 DLCflexbar-PT-4a-CTLFireability-2024-07 21 DLCflexbar-PT-4a-CTLFireability-2024-07 12 DLCflexbar-PT-4a-CTLFireability-2024-04 for DLCflexbar-PT-4a-CTLFireability-2024-07 12 DLCflexbar-PT-4a-CTLFireability-2024-04 for DLCflexbar-PT-4a-CTLFireability-2024-04 for DLCflexbar-PT-4a-CTLFireability-2024-07 for DLCflexbar-PT-4a-CTLFireability-2024-04 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 1 0 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 1 0 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 71687 m, 14337 m/sec, 1168966 t fired, . in use: 1 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 2/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 254654 m, 36593 m/sec, 4101133 t fired, . in use: 2 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 3/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 458686 m, 40806 m/sec, 7333924 t fired, . in use: 3 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 4/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 655539 m, 39370 m/sec, 10555947 t fired, . in use: 4 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 5/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 856517 m, 40195 m/sec, 13655785 t fired, . in use: 5 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 6/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 1058733 m, 40443 m/sec, 16859555 t fired, . in use: 6 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 7/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 1260627 m, 40378 m/sec, 20047880 t fired, . in use: 7 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 8/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 1466509 m, 41176 m/sec, 23220557 t fired, . in use: 8 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 9/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 1677626 m, 42223 m/sec, 26364771 t fired, . in use: 9 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 11/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 1878583 m, 40191 m/sec, 29511095 t fired, . in use: 11 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 12/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 2084823 m, 41248 m/sec, 32644021 t fired, . in use: 12 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 13/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 2285056 m, 40046 m/sec, 35781531 t fired, . in use: 13 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 14/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 2481996 m, 39388 m/sec, 38919393 t fired, . in use: 14 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 15/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 2677324 m, 39065 m/sec, 42034081 t fired, . in use: 15 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 16/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 2867968 m, 38128 m/sec, 45160291 t fired, . in use: 16 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 17/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 3065552 m, 39516 m/sec, 48284397 t fired, . in use: 17 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 18/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 3269181 m, 40725 m/sec, 51418475 t fired, . in use: 18 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 19/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 3460595 m, 38282 m/sec, 54522697 t fired, . in use: 19 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 20/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 3647952 m, 37471 m/sec, 57636629 t fired, . in use: 20 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 21/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 3854244 m, 41258 m/sec, 60736196 t fired, . in use: 21 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 22/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 4040624 m, 37276 m/sec, 63829658 t fired, . in use: 22 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 23/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 4226084 m, 37092 m/sec, 66927966 t fired, . in use: 23 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 24/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 4435143 m, 41811 m/sec, 70042160 t fired, . in use: 24 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 25/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 4647249 m, 42421 m/sec, 73144735 t fired, . in use: 25 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 26/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 4844818 m, 39513 m/sec, 76250140 t fired, . in use: 26 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 27/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 5031834 m, 37403 m/sec, 79336659 t fired, . in use: 27 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 29/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 5238973 m, 41427 m/sec, 82428884 t fired, . in use: 29 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 30/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 5444613 m, 41128 m/sec, 85518112 t fired, . in use: 30 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 31/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 5646148 m, 40307 m/sec, 88602887 t fired, . in use: 31 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 32/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 5850012 m, 40772 m/sec, 91689225 t fired, . in use: 32 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 33/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 6050890 m, 40175 m/sec, 94775113 t fired, . in use: 33 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 34/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 6257449 m, 41311 m/sec, 97858948 t fired, . in use: 34 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 35/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 6456779 m, 39866 m/sec, 100937367 t fired, . in use: 35 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 36/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 6651531 m, 38950 m/sec, 104027984 t fired, . in use: 36 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 37/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 6845179 m, 38729 m/sec, 107083689 t fired, . in use: 37 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 38/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 7044587 m, 39881 m/sec, 110137256 t fired, . in use: 38 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 39/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 7233287 m, 37740 m/sec, 113173557 t fired, . in use: 39 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 40/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 7427670 m, 38876 m/sec, 116217265 t fired, . in use: 40 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 41/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 7621557 m, 38777 m/sec, 119253066 t fired, . in use: 41 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 42/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 7821988 m, 40086 m/sec, 122288785 t fired, . in use: 42 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 43/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 8018477 m, 39297 m/sec, 125324612 t fired, . in use: 43 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 45/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 8223940 m, 41092 m/sec, 128349555 t fired, . in use: 45 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 46/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 8418710 m, 38954 m/sec, 131378591 t fired, . in use: 46 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 47/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 8625622 m, 41382 m/sec, 134411300 t fired, . in use: 47 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 48/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 8830289 m, 40933 m/sec, 137425071 t fired, . in use: 48 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 49/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 9023514 m, 38645 m/sec, 140454400 t fired, . in use: 49 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 50/2000 DLCflexbar-PT-4a-CTLFireability-2024-01 9225719 m, 40441 m/sec, 143463636 t fired, . in use: 50 DLCflexbar-PT-4a-CTLFireability-2024-01 (local timeout) CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 1 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m in use: 51 49 DLCflexbar-PT-4a-CTLFireability-2023-15 3 DLCflexbar-PT-4a-CTLFireability-2024-01 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 1/5 DLCflexbar-PT-4a-CTLFireability-2024-01 177999 m, -1809544 m/sec, 2907890 t fired, . 1/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 93362 m, 18672 m/sec, 3046126 t fired, . in use: 53 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 3/5 DLCflexbar-PT-4a-CTLFireability-2024-01 384110 m, 41222 m/sec, 6103243 t fired, . 2/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 200095 m, 21346 m/sec, 6349691 t fired, . in use: 56 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 4/5 DLCflexbar-PT-4a-CTLFireability-2024-01 578500 m, 38878 m/sec, 9290908 t fired, . 2/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 306467 m, 21274 m/sec, 9651736 t fired, . in use: 57 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 5/5 DLCflexbar-PT-4a-CTLFireability-2024-01 779656 m, 40231 m/sec, 12488043 t fired, . 3/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 414100 m, 21526 m/sec, 12922168 t fired, . in use: 59 DLCflexbar-PT-4a-CTLFireability-2024-01 (memory limit exceeded) CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 3/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 519932 m, 21166 m/sec, 16197006 t fired, . in use: 59 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 4/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 622236 m, 20460 m/sec, 19467725 t fired, . in use: 59 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 4/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 728055 m, 21163 m/sec, 22751767 t fired, . in use: 59 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 5/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 846203 m, 23629 m/sec, 26044165 t fired, . in use: 59 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 6/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 951904 m, 21140 m/sec, 29288989 t fired, . in use: 59 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 6/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 1059280 m, 21475 m/sec, 32575928 t fired, . in use: 59 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 7/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 1162686 m, 20681 m/sec, 35837668 t fired, . in use: 59 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 7/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 1272193 m, 21901 m/sec, 39101307 t fired, . in use: 59 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 8/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 1383924 m, 22346 m/sec, 42361530 t fired, . in use: 59 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 9/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 1496712 m, 22557 m/sec, 45606659 t fired, . in use: 60 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 9/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 1609468 m, 22551 m/sec, 48829607 t fired, . in use: 60 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 10/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 1722305 m, 22567 m/sec, 52057806 t fired, . in use: 61 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 10/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 1832988 m, 22136 m/sec, 55279714 t fired, . in use: 61 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 11/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 1944955 m, 22393 m/sec, 58489053 t fired, . in use: 62 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 12/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 2054678 m, 21944 m/sec, 61696522 t fired, . in use: 63 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 12/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 2165907 m, 22245 m/sec, 64941353 t fired, . in use: 63 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 13/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 2274397 m, 21698 m/sec, 68176611 t fired, . in use: 64 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 13/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 2379370 m, 20994 m/sec, 71360812 t fired, . in use: 64 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 14/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 2486899 m, 21505 m/sec, 74511178 t fired, . in use: 65 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 14/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 2592568 m, 21133 m/sec, 77672940 t fired, . in use: 65 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 15/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 2700556 m, 21597 m/sec, 80820266 t fired, . in use: 66 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 16/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 2809771 m, 21843 m/sec, 83958929 t fired, . in use: 67 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 16/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 2917606 m, 21567 m/sec, 87144456 t fired, . in use: 67 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 17/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 3046270 m, 25732 m/sec, 90394837 t fired, . in use: 68 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 17/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 3153382 m, 21422 m/sec, 93541165 t fired, . in use: 68 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 18/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 3257142 m, 20752 m/sec, 96671430 t fired, . in use: 69 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 19/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 3360381 m, 20647 m/sec, 99814807 t fired, . in use: 70 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 19/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 3460198 m, 19963 m/sec, 102941448 t fired, . in use: 70 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 20/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 3561942 m, 20348 m/sec, 106080683 t fired, . in use: 71 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 20/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 3665053 m, 20622 m/sec, 109197277 t fired, . in use: 71 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 21/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 3775791 m, 22147 m/sec, 112416891 t fired, . in use: 72 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 21/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 3879783 m, 20798 m/sec, 115557938 t fired, . in use: 72 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 22/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 3980862 m, 20215 m/sec, 118686569 t fired, . in use: 73 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 22/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 4079598 m, 19747 m/sec, 121803833 t fired, . in use: 73 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 23/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 4183275 m, 20735 m/sec, 124936998 t fired, . in use: 74 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 23/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 4281758 m, 19696 m/sec, 128096296 t fired, . in use: 74 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 24/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 4381461 m, 19940 m/sec, 131219039 t fired, . in use: 75 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 25/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 4482113 m, 20130 m/sec, 134335765 t fired, . in use: 76 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 25/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 4582677 m, 20112 m/sec, 137481213 t fired, . in use: 76 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 26/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 4682419 m, 19948 m/sec, 140599670 t fired, . in use: 77 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 26/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 4787913 m, 21098 m/sec, 143729372 t fired, . in use: 77 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 27/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 4906798 m, 23777 m/sec, 146908680 t fired, . in use: 78 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 27/2000 DLCflexbar-PT-4a-CTLFireability-2023-15 5018416 m, 22323 m/sec, 150045004 t fired, . in use: 78 for DLCflexbar-PT-4a-CTLFireability-2023-15 (local timeout) CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 1 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m in use: 79 46 DLCflexbar-PT-4a-CTLFireability-2023-14 49 DLCflexbar-PT-4a-CTLFireability-2023-15 for DLCflexbar-PT-4a-CTLFireability-2023-14 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CTL true CTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 1/5 DLCflexbar-PT-4a-CTLFireability-2023-15 91371 m, -985409 m/sec, 2975576 t fired, . in use: 79 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CTL true CTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 2/5 DLCflexbar-PT-4a-CTLFireability-2023-15 197611 m, 21248 m/sec, 6296150 t fired, . in use: 79 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CTL true CTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 2/5 DLCflexbar-PT-4a-CTLFireability-2023-15 303986 m, 21275 m/sec, 9559021 t fired, . in use: 79 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CTL true CTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 3/5 DLCflexbar-PT-4a-CTLFireability-2023-15 410607 m, 21324 m/sec, 12801267 t fired, . in use: 79 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CTL true CTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 3/5 DLCflexbar-PT-4a-CTLFireability-2023-15 515236 m, 20925 m/sec, 16022886 t fired, . in use: 79 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CTL true CTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 4/5 DLCflexbar-PT-4a-CTLFireability-2023-15 614537 m, 19860 m/sec, 19204795 t fired, . in use: 79 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CTL true CTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 4/5 DLCflexbar-PT-4a-CTLFireability-2023-15 715439 m, 20180 m/sec, 22404765 t fired, . in use: 79 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CTL true CTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 5/5 DLCflexbar-PT-4a-CTLFireability-2023-15 833534 m, 23619 m/sec, 25629206 t fired, . in use: 79 for DLCflexbar-PT-4a-CTLFireability-2023-15 (memory limit exceeded) CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CTL true CTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m in use: 79 39 DLCflexbar-PT-4a-CTLFireability-2023-13 for DLCflexbar-PT-4a-CTLFireability-2023-13 39 DLCflexbar-PT-4a-CTLFireability-2023-13 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CTL true CTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCflexbar-PT-4a-CTLFireability-2023-13 801 m, 160 m/sec, 61931 t fired, . in use: 79 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CTL true CTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCflexbar-PT-4a-CTLFireability-2023-13 1834 m, 206 m/sec, 151416 t fired, . in use: 79 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CTL true CTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCflexbar-PT-4a-CTLFireability-2023-13 2831 m, 199 m/sec, 241609 t fired, . in use: 79 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CTL true CTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCflexbar-PT-4a-CTLFireability-2023-13 3834 m, 200 m/sec, 334765 t fired, . in use: 79 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CTL true CTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCflexbar-PT-4a-CTLFireability-2023-13 4847 m, 202 m/sec, 427421 t fired, . in use: 79 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CTL true CTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCflexbar-PT-4a-CTLFireability-2023-13 5865 m, 203 m/sec, 518329 t fired, . in use: 79 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CTL true CTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCflexbar-PT-4a-CTLFireability-2023-13 6896 m, 206 m/sec, 611790 t fired, . in use: 79 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CTL true CTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCflexbar-PT-4a-CTLFireability-2023-13 7904 m, 201 m/sec, 699007 t fired, . in use: 79 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CTL true CTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCflexbar-PT-4a-CTLFireability-2023-13 8906 m, 200 m/sec, 790379 t fired, . in use: 79 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CTL true CTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCflexbar-PT-4a-CTLFireability-2023-13 9892 m, 197 m/sec, 881355 t fired, . in use: 79 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CTL true CTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCflexbar-PT-4a-CTLFireability-2023-13 10911 m, 203 m/sec, 979873 t fired, . in use: 79 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CTL true CTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCflexbar-PT-4a-CTLFireability-2023-13 11922 m, 202 m/sec, 1076360 t fired, . in use: 79 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CTL true CTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCflexbar-PT-4a-CTLFireability-2023-13 12918 m, 199 m/sec, 1170387 t fired, . in use: 79 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CTL true CTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCflexbar-PT-4a-CTLFireability-2023-13 13244 m, 65 m/sec, 1197631 t fired, . in use: 79 CATEGORY VALUE PRODUCED BY[0m AG false state equation[0m EF true state space[0m CTL true CTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 AGEF 0 1 0 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCflexbar-PT-4a-CTLFireability-2023-13 13247 m, 0 m/sec, 1197846 t fired, . in use: 79 $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCflexbar-PT-4a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is DLCflexbar-PT-4a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r115-smll-171624276200034"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCflexbar-PT-4a.tgz
mv DLCflexbar-PT-4a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;