fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r115-smll-171624276200027
Last Updated
July 7, 2024

About the Execution of LoLA for DLCflexbar-PT-3b

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16207.535 1483775.00 1583409.00 4603.60 TF??????TTFF??T? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r115-smll-171624276200027.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is DLCflexbar-PT-3b, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r115-smll-171624276200027
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 3.0M
-rw-r--r-- 1 mcc users 6.8K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 71K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.9K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 43K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Apr 22 14:37 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Apr 22 14:37 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 19 07:15 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 19 18:09 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Apr 12 13:00 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 138K Apr 12 13:00 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.3K Apr 12 12:59 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 70K Apr 12 12:59 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:37 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 22 14:37 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 2.5M May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCflexbar-PT-3b-LTLCardinality-00
FORMULA_NAME DLCflexbar-PT-3b-LTLCardinality-01
FORMULA_NAME DLCflexbar-PT-3b-LTLCardinality-02
FORMULA_NAME DLCflexbar-PT-3b-LTLCardinality-03
FORMULA_NAME DLCflexbar-PT-3b-LTLCardinality-04
FORMULA_NAME DLCflexbar-PT-3b-LTLCardinality-05
FORMULA_NAME DLCflexbar-PT-3b-LTLCardinality-06
FORMULA_NAME DLCflexbar-PT-3b-LTLCardinality-07
FORMULA_NAME DLCflexbar-PT-3b-LTLCardinality-08
FORMULA_NAME DLCflexbar-PT-3b-LTLCardinality-09
FORMULA_NAME DLCflexbar-PT-3b-LTLCardinality-10
FORMULA_NAME DLCflexbar-PT-3b-LTLCardinality-11
FORMULA_NAME DLCflexbar-PT-3b-LTLCardinality-12
FORMULA_NAME DLCflexbar-PT-3b-LTLCardinality-13
FORMULA_NAME DLCflexbar-PT-3b-LTLCardinality-14
FORMULA_NAME DLCflexbar-PT-3b-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1717010317199

FORMULA DLCflexbar-PT-3b-LTLCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-3b-LTLCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-3b-LTLCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-3b-LTLCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-3b-LTLCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-3b-LTLCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-3b-LTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1717011800974

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from LTLCardinality.xml
[lola][I] Rule S: 0 transitions removed,0 places removed
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCflexbar-PT-3b-LTLCardinality-00: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-01: F 0 0 0 0 0 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-04: LTL/CTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-05: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-08: INITIAL 0 0 0 0 0 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-09: INITIAL 0 0 0 0 0 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-10: INITIAL 0 0 0 0 0 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-11: F 0 0 0 0 0 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-14: INITIAL 0 0 0 0 0 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.]
[lola][.] Time elapsed: 525 secs. Pages in use: 0
[lola][.] # running tasks: 0 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCflexbar-PT-3b-LTLCardinality-00: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-01: F 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-04: LTL/CTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-05: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-08: INITIAL 0 0 0 0 0 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-09: INITIAL 0 0 0 0 0 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-10: INITIAL 0 0 0 0 0 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-11: F 0 0 0 0 0 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-14: INITIAL 0 0 0 0 0 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.]
[lola][.] Time elapsed: 530 secs. Pages in use: 0
[lola][.] # running tasks: 0 of 4. Visible: 16
[lola][I] LAUNCH task # 31 (type CNST) for 30 DLCflexbar-PT-3b-LTLCardinality-10
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 31 (type CNST) for DLCflexbar-PT-3b-LTLCardinality-10
[lola][I] result : false
[lola][I] LAUNCH task # 43 (type CNST) for 42 DLCflexbar-PT-3b-LTLCardinality-14
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] LAUNCH task # 25 (type CNST) for 24 DLCflexbar-PT-3b-LTLCardinality-08
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-08: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-10: INITIAL false preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-14: INITIAL true preprocessing
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-04: LTL/CTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-05: LTL 0 0 0 0 1 0 0 0
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-09: INITIAL 0 0 0 0 0 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-11: F 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-10: INITIAL false preprocessing
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-09: INITIAL 0 0 0 0 0 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-11: F 0 0 0 0 1 0 0 0
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-13: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-00: LTL true LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-01: F false state space / EG
[lola][.] DLCflexbar-PT-3b-LTLCardinality-08: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-09: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-10: INITIAL false preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-11: F false state space / EG
[lola][.] DLCflexbar-PT-3b-LTLCardinality-14: INITIAL true preprocessing
[lola][.]
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-04: LTL/CTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-05: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-13: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 46 LTL EXCL 3/339 1/2000 DLCflexbar-PT-3b-LTLCardinality-15 2362 m, 472 m/sec, 5892 t fired, .
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-00: LTL true LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-01: F false state space / EG
[lola][.] DLCflexbar-PT-3b-LTLCardinality-08: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-09: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-10: INITIAL false preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-11: F false state space / EG
[lola][.] DLCflexbar-PT-3b-LTLCardinality-14: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-15: LTL false LTL model checker
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-04: LTL/CTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-05: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-13: LTL 0 0 0 0 1 0 0 0
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-00: LTL true LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-01: F false state space / EG
[lola][.] DLCflexbar-PT-3b-LTLCardinality-08: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-09: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-10: INITIAL false preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-11: F false state space / EG
[lola][.] DLCflexbar-PT-3b-LTLCardinality-14: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-15: LTL false LTL model checker
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-04: LTL/CTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-05: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
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[lola][I] FINISHED task # 40 (type EXCL) for DLCflexbar-PT-3b-LTLCardinality-13
[lola][I] result : false
[lola][I] markings : 113
[lola][I] fired transitions : 113
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-00: LTL true LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-01: F false state space / EG
[lola][.] DLCflexbar-PT-3b-LTLCardinality-08: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-09: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-10: INITIAL false preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-11: F false state space / EG
[lola][.] DLCflexbar-PT-3b-LTLCardinality-13: LTL false LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-14: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-04: LTL/CTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-05: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 37 LTL EXCL 1/434 1/2000 DLCflexbar-PT-3b-LTLCardinality-12 12799 m, 2559 m/sec, 21137 t fired, .
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-00: LTL true LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-01: F false state space / EG
[lola][.] DLCflexbar-PT-3b-LTLCardinality-08: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-09: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-10: INITIAL false preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-11: F false state space / EG
[lola][.] DLCflexbar-PT-3b-LTLCardinality-13: LTL false LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-14: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-15: LTL false LTL model checker
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 37 LTL EXCL 6/434 4/2000 DLCflexbar-PT-3b-LTLCardinality-12 96275 m, 16695 m/sec, 181023 t fired, .
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-00: LTL true LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-01: F false state space / EG
[lola][.] DLCflexbar-PT-3b-LTLCardinality-08: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-09: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-10: INITIAL false preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-11: F false state space / EG
[lola][.] DLCflexbar-PT-3b-LTLCardinality-13: LTL false LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-14: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-15: LTL false LTL model checker
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 37 LTL EXCL 11/434 6/2000 DLCflexbar-PT-3b-LTLCardinality-12 178448 m, 16434 m/sec, 341260 t fired, .
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-00: LTL true LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-01: F false state space / EG
[lola][.] DLCflexbar-PT-3b-LTLCardinality-08: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-09: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-10: INITIAL false preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-11: F false state space / EG
[lola][.] DLCflexbar-PT-3b-LTLCardinality-13: LTL false LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-14: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-15: LTL false LTL model checker
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 37 LTL EXCL 16/434 7/2000 DLCflexbar-PT-3b-LTLCardinality-12 257464 m, 15803 m/sec, 495699 t fired, .
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-01: F false state space / EG
[lola][.] DLCflexbar-PT-3b-LTLCardinality-08: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-09: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-10: INITIAL false preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-11: F false state space / EG
[lola][.] DLCflexbar-PT-3b-LTLCardinality-13: LTL false LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-14: INITIAL true preprocessing
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[lola][.] 37 LTL EXCL 21/434 7/2000 DLCflexbar-PT-3b-LTLCardinality-12 333551 m, 15217 m/sec, 644313 t fired, .
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[lola][.] 37 LTL EXCL 26/434 8/2000 DLCflexbar-PT-3b-LTLCardinality-12 406488 m, 14587 m/sec, 785778 t fired, .
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[lola][.] 37 LTL EXCL 31/434 9/2000 DLCflexbar-PT-3b-LTLCardinality-12 480957 m, 14893 m/sec, 928931 t fired, .
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[lola][.] 37 LTL EXCL 36/434 12/2000 DLCflexbar-PT-3b-LTLCardinality-12 566692 m, 17147 m/sec, 1093101 t fired, .
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[lola][.] 37 LTL EXCL 41/434 15/2000 DLCflexbar-PT-3b-LTLCardinality-12 656550 m, 17971 m/sec, 1263775 t fired, .
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[lola][.] 37 LTL EXCL 46/434 19/2000 DLCflexbar-PT-3b-LTLCardinality-12 745377 m, 17765 m/sec, 1427898 t fired, .
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[lola][.] 37 LTL EXCL 76/434 36/2000 DLCflexbar-PT-3b-LTLCardinality-12 1269505 m, 17515 m/sec, 2422196 t fired, .
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[lola][.] 37 LTL EXCL 406/434 188/2000 DLCflexbar-PT-3b-LTLCardinality-12 6757618 m, 17285 m/sec, 12930627 t fired, .
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-01: F false state space / EG
[lola][.] DLCflexbar-PT-3b-LTLCardinality-06: LTL true LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-07: LTL false LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-08: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-09: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-10: INITIAL false preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-11: F false state space / EG
[lola][.] DLCflexbar-PT-3b-LTLCardinality-13: LTL false LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-14: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCflexbar-PT-3b-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 16 LTL EXCL 456/648 621/2000 DLCflexbar-PT-3b-LTLCardinality-05 11815120 m, 25896 m/sec, 13270343 t fired, .
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-00: LTL true LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-01: F false state space / EG
[lola][.] DLCflexbar-PT-3b-LTLCardinality-06: LTL true LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-07: LTL false LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-08: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-09: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-10: INITIAL false preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-11: F false state space / EG
[lola][.] DLCflexbar-PT-3b-LTLCardinality-13: LTL false LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-14: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCflexbar-PT-3b-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 16 LTL EXCL 461/648 627/2000 DLCflexbar-PT-3b-LTLCardinality-05 11943828 m, 25741 m/sec, 13416029 t fired, .
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-00: LTL true LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-01: F false state space / EG
[lola][.] DLCflexbar-PT-3b-LTLCardinality-06: LTL true LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-07: LTL false LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-08: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-09: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-10: INITIAL false preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-11: F false state space / EG
[lola][.] DLCflexbar-PT-3b-LTLCardinality-13: LTL false LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-14: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 16 LTL EXCL 466/648 634/2000 DLCflexbar-PT-3b-LTLCardinality-05 12071742 m, 25582 m/sec, 13559934 t fired, .
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-00: LTL true LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-01: F false state space / EG
[lola][.] DLCflexbar-PT-3b-LTLCardinality-06: LTL true LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-07: LTL false LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-08: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-09: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-10: INITIAL false preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-11: F false state space / EG
[lola][.] DLCflexbar-PT-3b-LTLCardinality-13: LTL false LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-14: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] DLCflexbar-PT-3b-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 16 LTL EXCL 471/648 639/2000 DLCflexbar-PT-3b-LTLCardinality-05 12181651 m, 21981 m/sec, 13683812 t fired, .
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-00: LTL true LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-01: F false state space / EG
[lola][.] DLCflexbar-PT-3b-LTLCardinality-06: LTL true LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-07: LTL false LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-08: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-09: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-10: INITIAL false preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-11: F false state space / EG
[lola][.] DLCflexbar-PT-3b-LTLCardinality-13: LTL false LTL model checker
[lola][.] DLCflexbar-PT-3b-LTLCardinality-14: INITIAL true preprocessing
[lola][.] DLCflexbar-PT-3b-LTLCardinality-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] DLCflexbar-PT-3b-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[lola][.] DLCflexbar-PT-3b-LTLCardinality-12: LTL 0 0 0 0 1 0 1 0
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[lola][.] 16 LTL EXCL 476/648 644/2000 DLCflexbar-PT-3b-LTLCardinality-05 12284062 m, 20482 m/sec, 13800193 t fired, .
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 404 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCflexbar-PT-3b"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is DLCflexbar-PT-3b, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r115-smll-171624276200027"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCflexbar-PT-3b.tgz
mv DLCflexbar-PT-3b execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;