MCC'2024- Execution of r115-smll-171624276200019

About the Execution of LoLA for DLCflexbar-PT-3a

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
16208.035	1142287.00	1231758.00	5123.90	[undef]	Cannot compute

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r115-smll-171624276200019.qcow2',
Waiting for the VM to be ready (probing ssh)
.................................................................
===========================================
Generated by BenchKit 2-5568
Executing tool lola
Input is DLCflexbar-PT-3a, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r115-smll-171624276200019
=================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.5M
-rw-r--r-- 1 mcc users 6.1K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 63K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 54K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinit
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict
-rw-r--r-- 1 mcc users 3.3K Apr 22 14:37 LTLCardinality.txt
-rw-r--r-- 1 mcc users 21K Apr 22 14:37 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Apr 22 14:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 22 14:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Apr 12 22:02 ReachabilityCardinality.
-rw-r--r-- 1 mcc users 108K Apr 12 22:02 ReachabilityCardinality.
-rw-r--r-- 1 mcc users 12K Apr 12 19:26 ReachabilityFireability.
-rw-r--r-- 1 mcc users 108K Apr 12 19:26 ReachabilityFireability.
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:37 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:37 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 996K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCflexbar-PT-3a-LTLCardinality-00
FORMULA_NAME DLCflexbar-PT-3a-LTLCardinality-01
FORMULA_NAME DLCflexbar-PT-3a-LTLCardinality-02
FORMULA_NAME DLCflexbar-PT-3a-LTLCardinality-03
FORMULA_NAME DLCflexbar-PT-3a-LTLCardinality-04
FORMULA_NAME DLCflexbar-PT-3a-LTLCardinality-05
FORMULA_NAME DLCflexbar-PT-3a-LTLCardinality-06
FORMULA_NAME DLCflexbar-PT-3a-LTLCardinality-07
FORMULA_NAME DLCflexbar-PT-3a-LTLCardinality-08
FORMULA_NAME DLCflexbar-PT-3a-LTLCardinality-09
FORMULA_NAME DLCflexbar-PT-3a-LTLCardinality-10
FORMULA_NAME DLCflexbar-PT-3a-LTLCardinality-11
FORMULA_NAME DLCflexbar-PT-3a-LTLCardinality-12
FORMULA_NAME DLCflexbar-PT-3a-LTLCardinality-13
FORMULA_NAME DLCflexbar-PT-3a-LTLCardinality-14
FORMULA_NAME DLCflexbar-PT-3a-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1717008219383

BK_STOP 1717009361670

--------------------
content from stderr:

[[35mlola[0m][I] LoLA will run for 3600 seconds at most
[[35mlola[0m][W] [1m[33munknown unit in memory specification:
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mL
[[35mlola[0m][I] LAUNCH task # 58 (type SKEL/FNDP) for
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 59 (type SKEL/EQUN) for
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 60 (type SKEL/SRCH) for
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 60 (type SKEL/SRCH)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 58 (type FNDP) for
[[35mlola[0m][W] CANCELED task # 59 (type EQUN) for
[[35mlola[0m][I] FINISHED task # 58 (type SKEL/FNDP)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 61 (type SKEL/SRCH) for
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 61 (type SKEL/SRCH)
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 38
[[35mlola[0m][I] fired transitions : 38
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] FINISHED task # 59 (type SKEL/EQUN)
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 62 (type SKEL/SRCH) for
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 62 (type SKEL/SRCH)
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 8
[[35mlola[0m][I] fired transitions : 8
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 63 (type SKEL/SRCH) for
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 63 (type SKEL/SRCH)
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 8
[[35mlola[0m][I] fired transitions : 8
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] planning for DLCflexbar-PT-3a-LTLCardinality-01
[[35mlola[0m][I] planning for DLCflexbar-PT-3a-LTLCardinality-03
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 21 (type CNST) for 20
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 36 (type CNST) for 35
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 21 (type CNST) for
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 36 (type CNST) for
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 64 (type SKEL/SRCH) for
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 24 (type CNST) for 23
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 45 (type CNST) for 44
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 45 (type CNST) for
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 24 (type CNST) for
[[35mlola[0m][I] result : false
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 65 (type SKEL/SRCH) for
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 65 (type SKEL/SRCH)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 35
[[35mlola[0m][I] fired transitions : 89
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 66 (type SKEL/SRCH) for
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 67 (type SKEL/SRCH) for
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 67 (type SKEL/SRCH)
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 8
[[35mlola[0m][I] fired transitions : 8
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 30 (type CNST) for 29
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 66 (type SKEL/SRCH)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] FINISHED task # 30 (type CNST) for
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 7 (type EXCL) for 0 DLCflexbar
[[35mlola[0m][I] time limit : 399 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 7 (type EXCL) for DLCflexbar
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 2
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[*** LOG ERROR #0001 ***] [2024-05-29 18:43:42] [status_logger]
[[35mlola[0m][I] planning for DLCflexbar-PT-3a-LTLCardinality-14
[[35mlola[0m][I] planning for DLCflexbar-PT-3a-LTLCardinality-11
[[35mlola[0m][I] LAUNCH task # 48 (type EXCL) for 47
[[35mlola[0m][I] time limit : 599 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 48 (type EXCL) for
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 15 (type EXCL) for 14
[[35mlola[0m][I] time limit : 719 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 15 (type EXCL) for
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 3
[[35mlola[0m][I] fired transitions : 3
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 39 (type EXCL) for 38
[[35mlola[0m][I] time limit : 899 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 39 (type EXCL) for
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 3
[[35mlola[0m][I] fired transitions : 3
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 27 (type EXCL) for 26
[[35mlola[0m][I] time limit : 1198 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 27 (type EXCL) for
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 11
[[35mlola[0m][I] fired transitions : 18
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 54 (type EXCL) for 53
[[35mlola[0m][I] time limit : 1798 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 54 (type EXCL) for
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 33 (type EXCL) for 32
[[35mlola[0m][I] time limit : 3596 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-00:
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-01: LTL/CTL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-02:
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-03: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-05: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-06:
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-07: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-09: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-10:
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-13:
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-14:
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-15: LTL/CTL
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY
[[35mlola[0m][.] DLCflexbar-PT-3a-LTLCardinality-08:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT
[[35mlola[0m][.] 33 LTL EXCL 3/3596
[[35mlola[0m][.] 64 LTL SRCH 4/3597
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 7 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-00:
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-01: LTL/CTL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-02:
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-03: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-05: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-06:
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-07: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-09: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-10:
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-13:
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-14:
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-15: LTL/CTL
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY
[[35mlola[0m][.] DLCflexbar-PT-3a-LTLCardinality-08:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT
[[35mlola[0m][.] 33 LTL EXCL 8/3596
[[35mlola[0m][.] 64 LTL SRCH 9/3597
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 12 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-00:
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-01: LTL/CTL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-02:
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-03: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-05: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-06:
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-07: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-09: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-10:
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-13:
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-14:
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-15: LTL/CTL
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY
[[35mlola[0m][.] DLCflexbar-PT-3a-LTLCardinality-08:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT
[[35mlola[0m][.] 33 LTL EXCL 13/3596
[[35mlola[0m][.] 64 LTL SRCH 14/3597
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 17 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-00:
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-01: LTL/CTL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-02:
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-03: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-05: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-06:
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-07: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-09: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-10:
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-13:
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-14:
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-15: LTL/CTL
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY
[[35mlola[0m][.] DLCflexbar-PT-3a-LTLCardinality-08:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT
[[35mlola[0m][.] 33 LTL EXCL 18/3596
[[35mlola[0m][.] 64 LTL SRCH 19/3597
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 22 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-00:
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-01: LTL/CTL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-02:
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-03: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-05: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-07: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-10:
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-13:
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-14:
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-15: LTL/CTL
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY
[[35mlola[0m][.] DLCflexbar-PT-3a-LTLCardinality-08:
[[35mlola[0m][.]
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[[35mlola[0m][.] 33 LTL EXCL 23/3596
[[35mlola[0m][.] 64 LTL SRCH 24/3597
[[35mlola[0m][.]
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-00:
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-01: LTL/CTL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-02:
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-03: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-05: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-07: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-13:
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-14:
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-15: LTL/CTL
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[[35mlola[0m][.] DLCflexbar-PT-3a-LTLCardinality-08:
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[[35mlola[0m][.] 33 LTL EXCL 28/3596
[[35mlola[0m][.] 64 LTL SRCH 29/3597
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-01: LTL/CTL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-03: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-05: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-07: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-13:
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-15: LTL/CTL
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[[35mlola[0m][.] 33 LTL EXCL 33/3596
[[35mlola[0m][.] 64 LTL SRCH 34/3597
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-01: LTL/CTL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-03: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-05: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-07: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-13:
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-14:
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-15: LTL/CTL
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[[35mlola[0m][.] 33 LTL EXCL 38/3596
[[35mlola[0m][.] 64 LTL SRCH 39/3597
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-01: LTL/CTL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-03: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-05: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-07: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-13:
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-15: LTL/CTL
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[[35mlola[0m][.] 33 LTL EXCL 43/3596
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-01: LTL/CTL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-03: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-05: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-07: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-13:
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-15: LTL/CTL
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[[35mlola[0m][.] 33 LTL EXCL 48/3596
[[35mlola[0m][.] 64 LTL SRCH 49/3597
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-01: LTL/CTL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-03: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-05: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-07: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-13:
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-15: LTL/CTL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-03: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-05: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-07: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-13:
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-15: LTL/CTL
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[[35mlola[0m][.] 64 LTL SRCH 59/3597
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-03: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-05: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-07: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-03: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-05: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-07: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-07: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-13:
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-14:
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-15: LTL/CTL
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[[35mlola[0m][.] 33 LTL EXCL 73/3596
[[35mlola[0m][.] 64 LTL SRCH 74/3597
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-03: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-05: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-13:
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-13:
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-07: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-13:
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-07: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
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[[35mlola[0m][.] 33 LTL EXCL 603/3596
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] 33 LTL EXCL 658/3596
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-13:
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-14:
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[[35mlola[0m][.]
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[[35mlola[0m][.]
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[[35mlola[0m][.] 33 LTL EXCL 1029/3596
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-03: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-05: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-13:
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-14:
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[[35mlola[0m][.] 33 LTL EXCL 1034/3596
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-13:
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[[35mlola[0m][.] 33 LTL EXCL 1039/3596
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-05: INITIAL
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-07: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-10:
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-13:
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[[35mlola[0m][.] 33 LTL EXCL 1044/3596
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-13:
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[[35mlola[0m][.] 33 LTL EXCL 1049/3596
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-10:
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-13:
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[[35mlola[0m][.] 33 LTL EXCL 1054/3596
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-13:
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[[35mlola[0m][.] 33 LTL EXCL 1059/3596
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-10:
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-13:
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[[35mlola[0m][.] 33 LTL EXCL 1064/3596
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-10:
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-13:
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[[35mlola[0m][.]
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[[35mlola[0m][.] 33 LTL EXCL 1069/3596
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-13:
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-15: LTL/CTL
[[35mlola[0m][.]
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[[35mlola[0m][.] 33 LTL EXCL 1074/3596
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-04: INITIAL
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[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-10:
[[35mlola[0m][.] [1m[31mDLCflexbar-PT-3a-LTLCardinality-11: LTL/CTL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-12: INITIAL
[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-13:
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[[35mlola[0m][.] [1m[32mDLCflexbar-PT-3a-LTLCardinality-15: LTL/CTL
[[35mlola[0m][.]
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[[35mlola[0m][.] 33 LTL EXCL 1079/3596
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========================== ==== ion.xml .xml txt xml txt xml template) ([1m[36m--timelimit[0m) using default[0m .pnml[0m pnml[0m TLCardinality.xml[0m 0 DLCflexbar-PT-3a-LTLCardinality-00 0 DLCflexbar-PT-3a-LTLCardinality-00 0 DLCflexbar-PT-3a-LTLCardinality-00 for DLCflexbar-PT-3a-LTLCardinality-00 DLCflexbar-PT-3a-LTLCardinality-00 (obsolete) DLCflexbar-PT-3a-LTLCardinality-00 (obsolete) for DLCflexbar-PT-3a-LTLCardinality-00 0 DLCflexbar-PT-3a-LTLCardinality-00 for DLCflexbar-PT-3a-LTLCardinality-00 for DLCflexbar-PT-3a-LTLCardinality-00 11 DLCflexbar-PT-3a-LTLCardinality-01 for DLCflexbar-PT-3a-LTLCardinality-01 removed 17 DLCflexbar-PT-3a-LTLCardinality-03 for DLCflexbar-PT-3a-LTLCardinality-03 stopped (result already fixed). stopped (result already fixed). DLCflexbar-PT-3a-LTLCardinality-04 DLCflexbar-PT-3a-LTLCardinality-09 DLCflexbar-PT-3a-LTLCardinality-04 DLCflexbar-PT-3a-LTLCardinality-09 32 DLCflexbar-PT-3a-LTLCardinality-08 DLCflexbar-PT-3a-LTLCardinality-05 DLCflexbar-PT-3a-LTLCardinality-12 DLCflexbar-PT-3a-LTLCardinality-12 DLCflexbar-PT-3a-LTLCardinality-05 50 DLCflexbar-PT-3a-LTLCardinality-14 for DLCflexbar-PT-3a-LTLCardinality-14 53 DLCflexbar-PT-3a-LTLCardinality-15 41 DLCflexbar-PT-3a-LTLCardinality-11 for DLCflexbar-PT-3a-LTLCardinality-11 DLCflexbar-PT-3a-LTLCardinality-07 for DLCflexbar-PT-3a-LTLCardinality-15 DLCflexbar-PT-3a-LTLCardinality-07 -PT-3a-LTLCardinality-00 -PT-3a-LTLCardinality-00 string pointer is null stopped (result already fixed). stopped (result already fixed). DLCflexbar-PT-3a-LTLCardinality-13 DLCflexbar-PT-3a-LTLCardinality-13 DLCflexbar-PT-3a-LTLCardinality-02 DLCflexbar-PT-3a-LTLCardinality-02 DLCflexbar-PT-3a-LTLCardinality-10 DLCflexbar-PT-3a-LTLCardinality-10 DLCflexbar-PT-3a-LTLCardinality-06 DLCflexbar-PT-3a-LTLCardinality-06 DLCflexbar-PT-3a-LTLCardinality-15 DLCflexbar-PT-3a-LTLCardinality-15 DLCflexbar-PT-3a-LTLCardinality-08 VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 2 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCflexbar-PT-3a-LTLCardinality-08 37182 m, 7436 m/sec, 2703511 t fired, . 1/5 DLCflexbar-PT-3a-LTLCardinality-08 364881 m, 72976 m/sec, 4750462 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 2 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 DLCflexbar-PT-3a-LTLCardinality-08 97324 m, 12028 m/sec, 6887698 t fired, . 1/5 DLCflexbar-PT-3a-LTLCardinality-08 819546 m, 90933 m/sec, 11063287 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 2 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 2/2000 DLCflexbar-PT-3a-LTLCardinality-08 169636 m, 14462 m/sec, 10873133 t fired, . 1/5 DLCflexbar-PT-3a-LTLCardinality-08 1249430 m, 85976 m/sec, 17229675 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 2 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 2/2000 DLCflexbar-PT-3a-LTLCardinality-08 236836 m, 13440 m/sec, 14942949 t fired, . 1/5 DLCflexbar-PT-3a-LTLCardinality-08 1666984 m, 83510 m/sec, 23201098 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 2 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 3/2000 DLCflexbar-PT-3a-LTLCardinality-08 294472 m, 11527 m/sec, 19053384 t fired, . 1/5 DLCflexbar-PT-3a-LTLCardinality-08 2068081 m, 80219 m/sec, 29137112 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 2 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 3/2000 DLCflexbar-PT-3a-LTLCardinality-08 350524 m, 11210 m/sec, 23119262 t fired, . 1/5 DLCflexbar-PT-3a-LTLCardinality-08 2461905 m, 78764 m/sec, 34964206 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 2 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 4/2000 DLCflexbar-PT-3a-LTLCardinality-08 407248 m, 11344 m/sec, 27130013 t fired, . 1/5 DLCflexbar-PT-3a-LTLCardinality-08 2845666 m, 76752 m/sec, 40676063 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 2 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 4/2000 DLCflexbar-PT-3a-LTLCardinality-08 463359 m, 11222 m/sec, 31149804 t fired, . 1/5 DLCflexbar-PT-3a-LTLCardinality-08 3231014 m, 77069 m/sec, 46420603 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 2 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 4/2000 DLCflexbar-PT-3a-LTLCardinality-08 519643 m, 11256 m/sec, 35206123 t fired, . 1/5 DLCflexbar-PT-3a-LTLCardinality-08 3599239 m, 73645 m/sec, 52115635 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 2 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 5/2000 DLCflexbar-PT-3a-LTLCardinality-08 575318 m, 11135 m/sec, 39286085 t fired, . 1/5 DLCflexbar-PT-3a-LTLCardinality-08 3977686 m, 75689 m/sec, 57936701 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 2 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 5/2000 DLCflexbar-PT-3a-LTLCardinality-08 632190 m, 11374 m/sec, 43361683 t fired, . 1/5 DLCflexbar-PT-3a-LTLCardinality-08 4347608 m, 73984 m/sec, 63499781 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 2 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 6/2000 DLCflexbar-PT-3a-LTLCardinality-08 687538 m, 11069 m/sec, 47424612 t fired, . 1/5 DLCflexbar-PT-3a-LTLCardinality-08 4709053 m, 72289 m/sec, 68997447 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 2 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 6/2000 DLCflexbar-PT-3a-LTLCardinality-08 744804 m, 11453 m/sec, 51501919 t fired, . 1/5 DLCflexbar-PT-3a-LTLCardinality-08 5072408 m, 72671 m/sec, 74560976 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 2 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 7/2000 DLCflexbar-PT-3a-LTLCardinality-08 802171 m, 11473 m/sec, 55581707 t fired, . 1/5 DLCflexbar-PT-3a-LTLCardinality-08 5428320 m, 71182 m/sec, 80017534 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 2 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 7/2000 DLCflexbar-PT-3a-LTLCardinality-08 858741 m, 11314 m/sec, 59650649 t fired, . 1/5 DLCflexbar-PT-3a-LTLCardinality-08 5772055 m, 68747 m/sec, 85331691 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 2 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 7/2000 DLCflexbar-PT-3a-LTLCardinality-08 916075 m, 11466 m/sec, 63719338 t fired, . 1/5 DLCflexbar-PT-3a-LTLCardinality-08 6134380 m, 72465 m/sec, 90836298 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 2 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 8/2000 DLCflexbar-PT-3a-LTLCardinality-08 971398 m, 11064 m/sec, 67758157 t fired, . 1/5 DLCflexbar-PT-3a-LTLCardinality-08 6485772 m, 70278 m/sec, 96347794 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 2 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 8/2000 DLCflexbar-PT-3a-LTLCardinality-08 1030308 m, 11782 m/sec, 71831471 t fired, . 1/5 DLCflexbar-PT-3a-LTLCardinality-08 6834437 m, 69733 m/sec, 101763010 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 2 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 9/2000 DLCflexbar-PT-3a-LTLCardinality-08 1086621 m, 11262 m/sec, 75876565 t fired, . 1/5 DLCflexbar-PT-3a-LTLCardinality-08 7174147 m, 67942 m/sec, 107051809 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 2 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 9/2000 DLCflexbar-PT-3a-LTLCardinality-08 1144085 m, 11492 m/sec, 79939202 t fired, . 1/5 DLCflexbar-PT-3a-LTLCardinality-08 7523502 m, 69871 m/sec, 112353218 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 2 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 10/2000 DLCflexbar-PT-3a-LTLCardinality-08 1200985 m, 11380 m/sec, 83963816 t fired, . 1/5 DLCflexbar-PT-3a-LTLCardinality-08 7861912 m, 67682 m/sec, 117614769 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 2 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 10/2000 DLCflexbar-PT-3a-LTLCardinality-08 1257954 m, 11393 m/sec, 88036986 t fired, . 4/5 DLCflexbar-PT-3a-LTLCardinality-08 8192757 m, 66169 m/sec, 122703299 t fired, . DLCflexbar-PT-3a-LTLCardinality-08 (memory limit exceeded) VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 11/2000 DLCflexbar-PT-3a-LTLCardinality-08 1313935 m, 11196 m/sec, 92112303 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 11/2000 DLCflexbar-PT-3a-LTLCardinality-08 1369092 m, 11031 m/sec, 96179624 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 11/2000 DLCflexbar-PT-3a-LTLCardinality-08 1425189 m, 11219 m/sec, 100122772 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 12/2000 DLCflexbar-PT-3a-LTLCardinality-08 1481991 m, 11360 m/sec, 104223932 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 12/2000 DLCflexbar-PT-3a-LTLCardinality-08 1539077 m, 11417 m/sec, 108330193 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 13/2000 DLCflexbar-PT-3a-LTLCardinality-08 1603617 m, 12908 m/sec, 112381474 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 13/2000 DLCflexbar-PT-3a-LTLCardinality-08 1660903 m, 11457 m/sec, 116480794 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 14/2000 DLCflexbar-PT-3a-LTLCardinality-08 1717845 m, 11388 m/sec, 120601324 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 14/2000 DLCflexbar-PT-3a-LTLCardinality-08 1780768 m, 12584 m/sec, 124598239 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 15/2000 DLCflexbar-PT-3a-LTLCardinality-08 1844331 m, 12712 m/sec, 128628367 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 15/2000 DLCflexbar-PT-3a-LTLCardinality-08 1901421 m, 11418 m/sec, 132724740 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 15/2000 DLCflexbar-PT-3a-LTLCardinality-08 1960628 m, 11841 m/sec, 136886069 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 16/2000 DLCflexbar-PT-3a-LTLCardinality-08 2021273 m, 12129 m/sec, 140981787 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 16/2000 DLCflexbar-PT-3a-LTLCardinality-08 2077962 m, 11337 m/sec, 145054332 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 17/2000 DLCflexbar-PT-3a-LTLCardinality-08 2132950 m, 10997 m/sec, 149109306 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 17/2000 DLCflexbar-PT-3a-LTLCardinality-08 2190210 m, 11452 m/sec, 153177990 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 18/2000 DLCflexbar-PT-3a-LTLCardinality-08 2248308 m, 11619 m/sec, 157230005 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 18/2000 DLCflexbar-PT-3a-LTLCardinality-08 2306058 m, 11550 m/sec, 161336983 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 19/2000 DLCflexbar-PT-3a-LTLCardinality-08 2363376 m, 11463 m/sec, 165407741 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 19/2000 DLCflexbar-PT-3a-LTLCardinality-08 2420664 m, 11457 m/sec, 169425042 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 19/2000 DLCflexbar-PT-3a-LTLCardinality-08 2477861 m, 11439 m/sec, 173434666 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 20/2000 DLCflexbar-PT-3a-LTLCardinality-08 2535117 m, 11451 m/sec, 177459622 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 20/2000 DLCflexbar-PT-3a-LTLCardinality-08 2593717 m, 11720 m/sec, 181498394 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 21/2000 DLCflexbar-PT-3a-LTLCardinality-08 2653627 m, 11982 m/sec, 185501245 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 21/2000 DLCflexbar-PT-3a-LTLCardinality-08 2709645 m, 11203 m/sec, 189532413 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 22/2000 DLCflexbar-PT-3a-LTLCardinality-08 2765801 m, 11231 m/sec, 193565797 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 22/2000 DLCflexbar-PT-3a-LTLCardinality-08 2823302 m, 11500 m/sec, 197564432 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 23/2000 DLCflexbar-PT-3a-LTLCardinality-08 2888273 m, 12994 m/sec, 201812482 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 23/2000 DLCflexbar-PT-3a-LTLCardinality-08 2947821 m, 11909 m/sec, 205890240 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 23/2000 DLCflexbar-PT-3a-LTLCardinality-08 3003982 m, 11232 m/sec, 209929610 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 24/2000 DLCflexbar-PT-3a-LTLCardinality-08 3067361 m, 12675 m/sec, 213891049 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 24/2000 DLCflexbar-PT-3a-LTLCardinality-08 3123572 m, 11242 m/sec, 217880974 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 25/2000 DLCflexbar-PT-3a-LTLCardinality-08 3183913 m, 12068 m/sec, 221843619 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 25/2000 DLCflexbar-PT-3a-LTLCardinality-08 3239803 m, 11178 m/sec, 225934936 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 26/2000 DLCflexbar-PT-3a-LTLCardinality-08 3295822 m, 11203 m/sec, 229935252 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 26/2000 DLCflexbar-PT-3a-LTLCardinality-08 3350562 m, 10948 m/sec, 233926507 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 27/2000 DLCflexbar-PT-3a-LTLCardinality-08 3407565 m, 11400 m/sec, 237876564 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 27/2000 DLCflexbar-PT-3a-LTLCardinality-08 3466258 m, 11738 m/sec, 241820263 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 27/2000 DLCflexbar-PT-3a-LTLCardinality-08 3522823 m, 11313 m/sec, 245796789 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 28/2000 DLCflexbar-PT-3a-LTLCardinality-08 3578509 m, 11137 m/sec, 249740016 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 28/2000 DLCflexbar-PT-3a-LTLCardinality-08 3633978 m, 11093 m/sec, 253704722 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 29/2000 DLCflexbar-PT-3a-LTLCardinality-08 3688279 m, 10860 m/sec, 257666064 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 29/2000 DLCflexbar-PT-3a-LTLCardinality-08 3744827 m, 11309 m/sec, 261618275 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 30/2000 DLCflexbar-PT-3a-LTLCardinality-08 3800308 m, 11096 m/sec, 265583987 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 30/2000 DLCflexbar-PT-3a-LTLCardinality-08 3860121 m, 11962 m/sec, 269702917 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 30/2000 DLCflexbar-PT-3a-LTLCardinality-08 3916097 m, 11195 m/sec, 273654030 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 31/2000 DLCflexbar-PT-3a-LTLCardinality-08 3971106 m, 11001 m/sec, 277621414 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 31/2000 DLCflexbar-PT-3a-LTLCardinality-08 4028471 m, 11473 m/sec, 281445737 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 32/2000 DLCflexbar-PT-3a-LTLCardinality-08 4083022 m, 10910 m/sec, 285326114 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 32/2000 DLCflexbar-PT-3a-LTLCardinality-08 4137584 m, 10912 m/sec, 289223177 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 33/2000 DLCflexbar-PT-3a-LTLCardinality-08 4192109 m, 10905 m/sec, 293086365 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 33/2000 DLCflexbar-PT-3a-LTLCardinality-08 4250048 m, 11587 m/sec, 296922612 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 33/2000 DLCflexbar-PT-3a-LTLCardinality-08 4307316 m, 11453 m/sec, 300809329 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 34/2000 DLCflexbar-PT-3a-LTLCardinality-08 4364495 m, 11435 m/sec, 304636090 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 34/2000 DLCflexbar-PT-3a-LTLCardinality-08 4419959 m, 11092 m/sec, 308518091 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 35/2000 DLCflexbar-PT-3a-LTLCardinality-08 4479215 m, 11851 m/sec, 312347757 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 35/2000 DLCflexbar-PT-3a-LTLCardinality-08 4535440 m, 11245 m/sec, 316217584 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 36/2000 DLCflexbar-PT-3a-LTLCardinality-08 4597112 m, 12334 m/sec, 320305671 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 36/2000 DLCflexbar-PT-3a-LTLCardinality-08 4657161 m, 12009 m/sec, 324299957 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 37/2000 DLCflexbar-PT-3a-LTLCardinality-08 4717852 m, 12138 m/sec, 328355766 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 37/2000 DLCflexbar-PT-3a-LTLCardinality-08 4775127 m, 11455 m/sec, 332296049 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 37/2000 DLCflexbar-PT-3a-LTLCardinality-08 4832097 m, 11394 m/sec, 336173335 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 38/2000 DLCflexbar-PT-3a-LTLCardinality-08 4887024 m, 10985 m/sec, 340030729 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 38/2000 DLCflexbar-PT-3a-LTLCardinality-08 4947666 m, 12128 m/sec, 343841704 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 39/2000 DLCflexbar-PT-3a-LTLCardinality-08 5007953 m, 12057 m/sec, 347801066 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 39/2000 DLCflexbar-PT-3a-LTLCardinality-08 5065306 m, 11470 m/sec, 351600456 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 40/2000 DLCflexbar-PT-3a-LTLCardinality-08 5122769 m, 11492 m/sec, 355375509 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 40/2000 DLCflexbar-PT-3a-LTLCardinality-08 5179237 m, 11293 m/sec, 359288843 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 41/2000 DLCflexbar-PT-3a-LTLCardinality-08 5239375 m, 12027 m/sec, 363316792 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 41/2000 DLCflexbar-PT-3a-LTLCardinality-08 5294925 m, 11110 m/sec, 367294940 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 41/2000 DLCflexbar-PT-3a-LTLCardinality-08 5352783 m, 11571 m/sec, 371277656 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 42/2000 DLCflexbar-PT-3a-LTLCardinality-08 5409198 m, 11283 m/sec, 375118886 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 42/2000 DLCflexbar-PT-3a-LTLCardinality-08 5469854 m, 12131 m/sec, 379022694 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 43/2000 DLCflexbar-PT-3a-LTLCardinality-08 5529507 m, 11930 m/sec, 383017126 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 43/2000 DLCflexbar-PT-3a-LTLCardinality-08 5588525 m, 11803 m/sec, 387015846 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 44/2000 DLCflexbar-PT-3a-LTLCardinality-08 5648006 m, 11896 m/sec, 390881175 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 44/2000 DLCflexbar-PT-3a-LTLCardinality-08 5702496 m, 10898 m/sec, 394750611 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 44/2000 DLCflexbar-PT-3a-LTLCardinality-08 5760084 m, 11517 m/sec, 398702368 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 45/2000 DLCflexbar-PT-3a-LTLCardinality-08 5819260 m, 11835 m/sec, 402694623 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 45/2000 DLCflexbar-PT-3a-LTLCardinality-08 5874406 m, 11029 m/sec, 406565069 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 46/2000 DLCflexbar-PT-3a-LTLCardinality-08 5931635 m, 11445 m/sec, 410523453 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 46/2000 DLCflexbar-PT-3a-LTLCardinality-08 5989056 m, 11484 m/sec, 414305346 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 47/2000 DLCflexbar-PT-3a-LTLCardinality-08 6043477 m, 10884 m/sec, 418186250 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 47/2000 DLCflexbar-PT-3a-LTLCardinality-08 6097885 m, 10881 m/sec, 421972197 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 47/2000 DLCflexbar-PT-3a-LTLCardinality-08 6153775 m, 11178 m/sec, 425920737 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 48/2000 DLCflexbar-PT-3a-LTLCardinality-08 6210757 m, 11396 m/sec, 429784096 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 48/2000 DLCflexbar-PT-3a-LTLCardinality-08 6270328 m, 11914 m/sec, 433767332 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 49/2000 DLCflexbar-PT-3a-LTLCardinality-08 6331070 m, 12148 m/sec, 437784783 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 49/2000 DLCflexbar-PT-3a-LTLCardinality-08 6390260 m, 11838 m/sec, 441709526 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 50/2000 DLCflexbar-PT-3a-LTLCardinality-08 6451409 m, 12229 m/sec, 445747603 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 50/2000 DLCflexbar-PT-3a-LTLCardinality-08 6507388 m, 11195 m/sec, 449550324 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 51/2000 DLCflexbar-PT-3a-LTLCardinality-08 6564149 m, 11352 m/sec, 453512933 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 51/2000 DLCflexbar-PT-3a-LTLCardinality-08 6617440 m, 10658 m/sec, 457275561 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 51/2000 DLCflexbar-PT-3a-LTLCardinality-08 6673178 m, 11147 m/sec, 461126997 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 52/2000 DLCflexbar-PT-3a-LTLCardinality-08 6726960 m, 10756 m/sec, 464880652 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 52/2000 DLCflexbar-PT-3a-LTLCardinality-08 6783186 m, 11245 m/sec, 468665935 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 53/2000 DLCflexbar-PT-3a-LTLCardinality-08 6836905 m, 10743 m/sec, 472487308 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 53/2000 DLCflexbar-PT-3a-LTLCardinality-08 6893548 m, 11328 m/sec, 476271034 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 54/2000 DLCflexbar-PT-3a-LTLCardinality-08 6949738 m, 11238 m/sec, 480107591 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 54/2000 DLCflexbar-PT-3a-LTLCardinality-08 7006764 m, 11405 m/sec, 483848895 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 54/2000 DLCflexbar-PT-3a-LTLCardinality-08 7063733 m, 11393 m/sec, 487753736 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 55/2000 DLCflexbar-PT-3a-LTLCardinality-08 7121358 m, 11525 m/sec, 491690030 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 55/2000 DLCflexbar-PT-3a-LTLCardinality-08 7176548 m, 11038 m/sec, 495501319 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 56/2000 DLCflexbar-PT-3a-LTLCardinality-08 7235190 m, 11728 m/sec, 499464243 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 56/2000 DLCflexbar-PT-3a-LTLCardinality-08 7291604 m, 11282 m/sec, 503352180 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 57/2000 DLCflexbar-PT-3a-LTLCardinality-08 7348154 m, 11310 m/sec, 507230270 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 57/2000 DLCflexbar-PT-3a-LTLCardinality-08 7405212 m, 11411 m/sec, 511157354 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 57/2000 DLCflexbar-PT-3a-LTLCardinality-08 7462064 m, 11370 m/sec, 515085774 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 58/2000 DLCflexbar-PT-3a-LTLCardinality-08 7517661 m, 11119 m/sec, 518874906 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 58/2000 DLCflexbar-PT-3a-LTLCardinality-08 7572828 m, 11033 m/sec, 522629175 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 59/2000 DLCflexbar-PT-3a-LTLCardinality-08 7627837 m, 11001 m/sec, 526436532 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 59/2000 DLCflexbar-PT-3a-LTLCardinality-08 7685030 m, 11438 m/sec, 530392092 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 60/2000 DLCflexbar-PT-3a-LTLCardinality-08 7740224 m, 11038 m/sec, 534167073 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 60/2000 DLCflexbar-PT-3a-LTLCardinality-08 7796437 m, 11242 m/sec, 538003728 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 60/2000 DLCflexbar-PT-3a-LTLCardinality-08 7851864 m, 11085 m/sec, 541803981 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 61/2000 DLCflexbar-PT-3a-LTLCardinality-08 7908827 m, 11392 m/sec, 545556081 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 61/2000 DLCflexbar-PT-3a-LTLCardinality-08 7966181 m, 11470 m/sec, 549422419 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 62/2000 DLCflexbar-PT-3a-LTLCardinality-08 8021920 m, 11147 m/sec, 553186059 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 62/2000 DLCflexbar-PT-3a-LTLCardinality-08 8075491 m, 10714 m/sec, 556955136 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 63/2000 DLCflexbar-PT-3a-LTLCardinality-08 8129647 m, 10831 m/sec, 560774902 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 63/2000 DLCflexbar-PT-3a-LTLCardinality-08 8183994 m, 10869 m/sec, 564578223 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 63/2000 DLCflexbar-PT-3a-LTLCardinality-08 8238386 m, 10878 m/sec, 568396494 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 64/2000 DLCflexbar-PT-3a-LTLCardinality-08 8291819 m, 10686 m/sec, 572150551 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 64/2000 DLCflexbar-PT-3a-LTLCardinality-08 8347699 m, 11176 m/sec, 576027171 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 65/2000 DLCflexbar-PT-3a-LTLCardinality-08 8402297 m, 10919 m/sec, 579865400 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 65/2000 DLCflexbar-PT-3a-LTLCardinality-08 8457124 m, 10965 m/sec, 583755069 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 65/2000 DLCflexbar-PT-3a-LTLCardinality-08 8510460 m, 10667 m/sec, 587502379 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 66/2000 DLCflexbar-PT-3a-LTLCardinality-08 8563637 m, 10635 m/sec, 591317219 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 66/2000 DLCflexbar-PT-3a-LTLCardinality-08 8618665 m, 11005 m/sec, 595191889 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 67/2000 DLCflexbar-PT-3a-LTLCardinality-08 8672968 m, 10860 m/sec, 599030526 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 67/2000 DLCflexbar-PT-3a-LTLCardinality-08 8725713 m, 10549 m/sec, 602731798 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 68/2000 DLCflexbar-PT-3a-LTLCardinality-08 8777066 m, 10270 m/sec, 606509747 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 68/2000 DLCflexbar-PT-3a-LTLCardinality-08 8834217 m, 11430 m/sec, 610341268 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 68/2000 DLCflexbar-PT-3a-LTLCardinality-08 8886639 m, 10484 m/sec, 613993054 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 69/2000 DLCflexbar-PT-3a-LTLCardinality-08 8942639 m, 11200 m/sec, 617794429 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 69/2000 DLCflexbar-PT-3a-LTLCardinality-08 8997452 m, 10962 m/sec, 621645525 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 70/2000 DLCflexbar-PT-3a-LTLCardinality-08 9052485 m, 11006 m/sec, 625424420 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 70/2000 DLCflexbar-PT-3a-LTLCardinality-08 9107020 m, 10907 m/sec, 629222800 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 70/2000 DLCflexbar-PT-3a-LTLCardinality-08 9163897 m, 11375 m/sec, 633122894 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 71/2000 DLCflexbar-PT-3a-LTLCardinality-08 9217369 m, 10694 m/sec, 636899563 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 71/2000 DLCflexbar-PT-3a-LTLCardinality-08 9276162 m, 11758 m/sec, 640875738 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 72/2000 DLCflexbar-PT-3a-LTLCardinality-08 9332469 m, 11261 m/sec, 644737168 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 72/2000 DLCflexbar-PT-3a-LTLCardinality-08 9385387 m, 10583 m/sec, 648497651 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 73/2000 DLCflexbar-PT-3a-LTLCardinality-08 9440962 m, 11115 m/sec, 652339036 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 73/2000 DLCflexbar-PT-3a-LTLCardinality-08 9498899 m, 11587 m/sec, 656253225 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 73/2000 DLCflexbar-PT-3a-LTLCardinality-08 9554743 m, 11168 m/sec, 659971732 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 74/2000 DLCflexbar-PT-3a-LTLCardinality-08 9610981 m, 11247 m/sec, 663859558 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 74/2000 DLCflexbar-PT-3a-LTLCardinality-08 9668802 m, 11564 m/sec, 667749547 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 75/2000 DLCflexbar-PT-3a-LTLCardinality-08 9722462 m, 10732 m/sec, 671565003 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 75/2000 DLCflexbar-PT-3a-LTLCardinality-08 9775556 m, 10618 m/sec, 675323511 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 76/2000 DLCflexbar-PT-3a-LTLCardinality-08 9832589 m, 11406 m/sec, 679098097 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 76/2000 DLCflexbar-PT-3a-LTLCardinality-08 9885940 m, 10670 m/sec, 682851313 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 76/2000 DLCflexbar-PT-3a-LTLCardinality-08 9941313 m, 11074 m/sec, 686699607 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 77/2000 DLCflexbar-PT-3a-LTLCardinality-08 9996029 m, 10943 m/sec, 690506926 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 77/2000 DLCflexbar-PT-3a-LTLCardinality-08 10050782 m, 10950 m/sec, 694276472 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 78/2000 DLCflexbar-PT-3a-LTLCardinality-08 10106619 m, 11167 m/sec, 698073059 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 78/2000 DLCflexbar-PT-3a-LTLCardinality-08 10160589 m, 10794 m/sec, 701899446 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 78/2000 DLCflexbar-PT-3a-LTLCardinality-08 10214362 m, 10754 m/sec, 705798156 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 79/2000 DLCflexbar-PT-3a-LTLCardinality-08 10270066 m, 11140 m/sec, 709592356 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 79/2000 DLCflexbar-PT-3a-LTLCardinality-08 10325055 m, 10997 m/sec, 713411299 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 80/2000 DLCflexbar-PT-3a-LTLCardinality-08 10380176 m, 11024 m/sec, 717209272 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 80/2000 DLCflexbar-PT-3a-LTLCardinality-08 10436870 m, 11338 m/sec, 721041420 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 81/2000 DLCflexbar-PT-3a-LTLCardinality-08 10496124 m, 11850 m/sec, 724966738 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 81/2000 DLCflexbar-PT-3a-LTLCardinality-08 10555048 m, 11784 m/sec, 728943139 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 82/2000 DLCflexbar-PT-3a-LTLCardinality-08 10609871 m, 10964 m/sec, 732734314 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 82/2000 DLCflexbar-PT-3a-LTLCardinality-08 10664515 m, 10928 m/sec, 736525560 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 82/2000 DLCflexbar-PT-3a-LTLCardinality-08 10722222 m, 11541 m/sec, 740400474 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 83/2000 DLCflexbar-PT-3a-LTLCardinality-08 10776631 m, 10881 m/sec, 744226559 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 83/2000 DLCflexbar-PT-3a-LTLCardinality-08 10831195 m, 10912 m/sec, 748088838 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 84/2000 DLCflexbar-PT-3a-LTLCardinality-08 10885919 m, 10944 m/sec, 751829028 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 84/2000 DLCflexbar-PT-3a-LTLCardinality-08 10939917 m, 10799 m/sec, 755547000 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 84/2000 DLCflexbar-PT-3a-LTLCardinality-08 10995895 m, 11195 m/sec, 759304115 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 85/2000 DLCflexbar-PT-3a-LTLCardinality-08 11049287 m, 10678 m/sec, 763090601 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 85/2000 DLCflexbar-PT-3a-LTLCardinality-08 11105002 m, 11143 m/sec, 766880034 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 86/2000 DLCflexbar-PT-3a-LTLCardinality-08 11158933 m, 10786 m/sec, 770720255 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 86/2000 DLCflexbar-PT-3a-LTLCardinality-08 11213424 m, 10898 m/sec, 774502406 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 87/2000 DLCflexbar-PT-3a-LTLCardinality-08 11267914 m, 10898 m/sec, 778265268 t fired, . VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 87/2000 DLCflexbar-PT-3a-LTLCardinality-08 11323027 m, 11022 m/sec, 782010451 t fired, . in use: 87 VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 87/2000 DLCflexbar-PT-3a-LTLCardinality-08 11378484 m, 11091 m/sec, 785732702 t fired, . in use: 87 VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 88/2000 DLCflexbar-PT-3a-LTLCardinality-08 11431735 m, 10650 m/sec, 789449256 t fired, . in use: 88 VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 88/2000 DLCflexbar-PT-3a-LTLCardinality-08 11490665 m, 11786 m/sec, 793314071 t fired, . in use: 88 VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 89/2000 DLCflexbar-PT-3a-LTLCardinality-08 11544372 m, 10741 m/sec, 797085382 t fired, . in use: 89 VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 89/2000 DLCflexbar-PT-3a-LTLCardinality-08 11597179 m, 10561 m/sec, 800897511 t fired, . in use: 89 VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 89/2000 DLCflexbar-PT-3a-LTLCardinality-08 11654071 m, 11378 m/sec, 804792040 t fired, . in use: 89 VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 90/2000 DLCflexbar-PT-3a-LTLCardinality-08 11708795 m, 10944 m/sec, 808597966 t fired, . in use: 90 VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 90/2000 DLCflexbar-PT-3a-LTLCardinality-08 11767319 m, 11704 m/sec, 812504724 t fired, . in use: 90 VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 91/2000 DLCflexbar-PT-3a-LTLCardinality-08 11824294 m, 11395 m/sec, 816338615 t fired, . in use: 91 VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 91/2000 DLCflexbar-PT-3a-LTLCardinality-08 11877983 m, 10737 m/sec, 820059982 t fired, . in use: 91 VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 92/2000 DLCflexbar-PT-3a-LTLCardinality-08 11937320 m, 11867 m/sec, 823883921 t fired, . in use: 92 VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 92/2000 DLCflexbar-PT-3a-LTLCardinality-08 11998132 m, 12162 m/sec, 827635754 t fired, . in use: 92 VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 93/2000 DLCflexbar-PT-3a-LTLCardinality-08 12052990 m, 10971 m/sec, 831422424 t fired, . in use: 93 VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 93/2000 DLCflexbar-PT-3a-LTLCardinality-08 12108366 m, 11075 m/sec, 835237577 t fired, . in use: 93 VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 93/2000 DLCflexbar-PT-3a-LTLCardinality-08 12161416 m, 10610 m/sec, 839002375 t fired, . in use: 93 VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 94/2000 DLCflexbar-PT-3a-LTLCardinality-08 12212197 m, 10156 m/sec, 842656600 t fired, . in use: 94 VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 94/2000 DLCflexbar-PT-3a-LTLCardinality-08 12266007 m, 10762 m/sec, 846319378 t fired, . in use: 94 VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 95/2000 DLCflexbar-PT-3a-LTLCardinality-08 12317640 m, 10326 m/sec, 850015351 t fired, . in use: 95 VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 95/2000 DLCflexbar-PT-3a-LTLCardinality-08 12372143 m, 10900 m/sec, 853766161 t fired, . in use: 95 VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 95/2000 DLCflexbar-PT-3a-LTLCardinality-08 12423901 m, 10351 m/sec, 857268042 t fired, . in use: 95 VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 95/2000 DLCflexbar-PT-3a-LTLCardinality-08 12425688 m, 357 m/sec, 857366887 t fired, . in use: 95 VALUE PRODUCED BY[0m CONJ false LTL model checker[0m false skeleton: LTL model checker[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m true preprocessing[0m false preprocessing[0m LTL false LTL model checker[0m false skeleton: LTL model checker[0m true preprocessing[0m LTL true LTL model checker[0m LTL true skeleton: LTL model checker[0m true LTL model checker[0m IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 1 0 0 0 1 0 MEM PG/PGLIMIT FORMULA STATUS[0m 95/2000 DLCflexbar-PT-3a-LTLCardinality-08 12426408 m, 144 m/sec, 857415743 t fired, . in use: 95 $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCflexbar-PT-3a"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is DLCflexbar-PT-3a, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r115-smll-171624276200019"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCflexbar-PT-3a.tgz
mv DLCflexbar-PT-3a execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;