MCC'2024- Execution of r071-tall-171620506900316

About the Execution of LoLA for CircadianClock-PT-100000

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
16207.508	132182.00	125548.00	742.60	[undef]	Cannot compute

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r071-tall-171620506900316.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is CircadianClock-PT-100000, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r071-tall-171620506900316
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 484K
-rw-r--r-- 1 mcc users 6.9K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 69K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K May 19 07:07 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K May 19 15:35 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Apr 22 14:32 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 22 14:32 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K May 14 13:22 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 126K May 14 13:22 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K May 14 13:22 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 97K May 14 13:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 22 14:32 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 22 14:32 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 7 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 11K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CircadianClock-PT-100000-LTLFireability-00
FORMULA_NAME CircadianClock-PT-100000-LTLFireability-01
FORMULA_NAME CircadianClock-PT-100000-LTLFireability-02
FORMULA_NAME CircadianClock-PT-100000-LTLFireability-03
FORMULA_NAME CircadianClock-PT-100000-LTLFireability-04
FORMULA_NAME CircadianClock-PT-100000-LTLFireability-05
FORMULA_NAME CircadianClock-PT-100000-LTLFireability-06
FORMULA_NAME CircadianClock-PT-100000-LTLFireability-07
FORMULA_NAME CircadianClock-PT-100000-LTLFireability-08
FORMULA_NAME CircadianClock-PT-100000-LTLFireability-09
FORMULA_NAME CircadianClock-PT-100000-LTLFireability-10
FORMULA_NAME CircadianClock-PT-100000-LTLFireability-11
FORMULA_NAME CircadianClock-PT-100000-LTLFireability-12
FORMULA_NAME CircadianClock-PT-100000-LTLFireability-13
FORMULA_NAME CircadianClock-PT-100000-LTLFireability-14
FORMULA_NAME CircadianClock-PT-100000-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1717040577293

BK_STOP 1717040709475

--------------------
content from stderr:

[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 25 (type EXCL) for 24 CircadianClock-PT-100000-LTLFireability-08
[[35mlola[0m][I] time limit : 116 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 46 (type CNST) for 43 CircadianClock-PT-100000-LTLFireability-13
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 46 (type CNST) for CircadianClock-PT-100000-LTLFireability-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 25 (type EXCL) for CircadianClock-PT-100000-LTLFireability-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 100002
[[35mlola[0m][I] fired transitions : 100002
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 60 (type EXCL) for 57 CircadianClock-PT-100000-LTLFireability-15
[[35mlola[0m][I] time limit : 225 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 60 (type EXCL) for CircadianClock-PT-100000-LTLFireability-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 100002
[[35mlola[0m][I] fired transitions : 100002
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 55 (type EXCL) for 54 CircadianClock-PT-100000-LTLFireability-14
[[35mlola[0m][I] time limit : 257 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 55 (type EXCL) for CircadianClock-PT-100000-LTLFireability-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 200003
[[35mlola[0m][I] fired transitions : 200004
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 2
[[35mlola[0m][I] LAUNCH task # 41 (type EXCL) for 40 CircadianClock-PT-100000-LTLFireability-12
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 41 (type EXCL) for CircadianClock-PT-100000-LTLFireability-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 100004
[[35mlola[0m][I] fired transitions : 100004
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 38 (type EXCL) for 33 CircadianClock-PT-100000-LTLFireability-11
[[35mlola[0m][I] time limit : 300 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 38 (type EXCL) for CircadianClock-PT-100000-LTLFireability-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 100002
[[35mlola[0m][I] fired transitions : 100002
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 19 (type EXCL) for 18 CircadianClock-PT-100000-LTLFireability-06
[[35mlola[0m][I] time limit : 360 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 19 (type EXCL) for CircadianClock-PT-100000-LTLFireability-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 100002
[[35mlola[0m][I] fired transitions : 100002
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 13 (type EXCL) for 12 CircadianClock-PT-100000-LTLFireability-04
[[35mlola[0m][I] time limit : 399 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 13 (type EXCL) for CircadianClock-PT-100000-LTLFireability-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 100004
[[35mlola[0m][I] fired transitions : 100004
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 CircadianClock-PT-100000-LTLFireability-01
[[35mlola[0m][I] time limit : 449 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
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[[35mlola[0m][.] CircadianClock-PT-100000-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-100000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-100000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-100000-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-100000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-100000-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-100000-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-100000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 4/449 25/2000 CircadianClock-PT-100000-LTLFireability-01 3742354 m, 748470 m/sec, 5584687 t fired, .
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[[35mlola[0m][.] CircadianClock-PT-100000-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-100000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-100000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-100000-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-100000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-100000-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-100000-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-100000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 9/449 51/2000 CircadianClock-PT-100000-LTLFireability-01 7790826 m, 809694 m/sec, 11681611 t fired, .
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[[35mlola[0m][.] CircadianClock-PT-100000-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-100000-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-100000-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 14/449 77/2000 CircadianClock-PT-100000-LTLFireability-01 11793869 m, 800608 m/sec, 17687677 t fired, .
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[[35mlola[0m][.] 4 LTL EXCL 19/449 103/2000 CircadianClock-PT-100000-LTLFireability-01 15773293 m, 795884 m/sec, 23646505 t fired, .
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[[35mlola[0m][.] 4 LTL EXCL 24/449 128/2000 CircadianClock-PT-100000-LTLFireability-01 19711661 m, 787673 m/sec, 29523222 t fired, .
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[[35mlola[0m][.] CircadianClock-PT-100000-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-100000-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-100000-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-100000-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-100000-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 LTL EXCL 119/449 591/2000 CircadianClock-PT-100000-LTLFireability-01 90985721 m, 710881 m/sec, 136470985 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 120 secs. Pages in use: 591
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 417 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CircadianClock-PT-100000"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is CircadianClock-PT-100000, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r071-tall-171620506900316"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/CircadianClock-PT-100000.tgz
mv CircadianClock-PT-100000 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;