About the Execution of LoLA for CircadianClock-PT-001000
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
16208.943 | 230275.00 | 202571.00 | 676.30 | ?????????????F?? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r071-tall-171620506900298.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is CircadianClock-PT-001000, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r071-tall-171620506900298
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 540K
-rw-r--r-- 1 mcc users 7.0K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 75K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 46K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Apr 22 14:32 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Apr 22 14:32 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Apr 22 14:32 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 22 14:32 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Apr 12 03:25 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 159K Apr 12 03:25 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Apr 12 03:23 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 103K Apr 12 03:23 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 22 14:32 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 22 14:32 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 7 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 11K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-2024-00
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-2024-01
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-2024-02
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-2024-03
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-2024-04
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-2024-05
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-2024-06
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-2024-07
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-2024-08
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-2024-09
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-2024-10
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-2024-11
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-2023-12
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-2023-13
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-2023-14
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-2023-15
=== Now, execution of the tool begins
BK_START 1717039839166
FORMULA CircadianClock-PT-001000-CTLFireability-2023-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717040069441
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 48 (type EXCL) for 47 CircadianClock-PT-001000-CTLFireability-2023-13
[[35mlola[0m][I] time limit : 138 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 48 (type EXCL) for CircadianClock-PT-001000-CTLFireability-2023-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 10 (type EXCL) for 9 CircadianClock-PT-001000-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 180 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 59 (type EQUN) for 24 CircadianClock-PT-001000-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 61 (type EQUN) for 24 CircadianClock-PT-001000-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 59 (type EQUN) for CircadianClock-PT-001000-CTLFireability-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 61 (type EQUN) for CircadianClock-PT-001000-CTLFireability-2024-08
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 5/211 14/2000 CircadianClock-PT-001000-CTLFireability-2024-03 3287865 m, 657573 m/sec, 9360372 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 10/211 27/2000 CircadianClock-PT-001000-CTLFireability-2024-03 6369454 m, 616317 m/sec, 18603449 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs. Pages in use: 27
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 15/211 40/2000 CircadianClock-PT-001000-CTLFireability-2024-03 9384876 m, 603084 m/sec, 27647812 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 15 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 20/211 52/2000 CircadianClock-PT-001000-CTLFireability-2024-03 12335274 m, 590079 m/sec, 36498029 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 20 secs. Pages in use: 52
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 25/211 64/2000 CircadianClock-PT-001000-CTLFireability-2024-03 15265268 m, 585998 m/sec, 45285894 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 25 secs. Pages in use: 64
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 30/211 76/2000 CircadianClock-PT-001000-CTLFireability-2024-03 18131957 m, 573337 m/sec, 53884080 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 30 secs. Pages in use: 76
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 35/211 88/2000 CircadianClock-PT-001000-CTLFireability-2024-03 20972063 m, 568021 m/sec, 62404610 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 35 secs. Pages in use: 88
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 40/211 100/2000 CircadianClock-PT-001000-CTLFireability-2024-03 23795842 m, 564755 m/sec, 70874947 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 40 secs. Pages in use: 100
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 45/211 112/2000 CircadianClock-PT-001000-CTLFireability-2024-03 26596654 m, 560162 m/sec, 79275379 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 45 secs. Pages in use: 112
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 50/211 123/2000 CircadianClock-PT-001000-CTLFireability-2024-03 29350755 m, 550820 m/sec, 87535487 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 50 secs. Pages in use: 123
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 55/211 135/2000 CircadianClock-PT-001000-CTLFireability-2024-03 32174505 m, 564750 m/sec, 96005124 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 55 secs. Pages in use: 135
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 60/211 147/2000 CircadianClock-PT-001000-CTLFireability-2024-03 34954190 m, 555937 m/sec, 104344020 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 60 secs. Pages in use: 147
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 65/211 158/2000 CircadianClock-PT-001000-CTLFireability-2024-03 37671763 m, 543514 m/sec, 112495373 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 65 secs. Pages in use: 158
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 70/211 170/2000 CircadianClock-PT-001000-CTLFireability-2024-03 40430773 m, 551802 m/sec, 120770536 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 70 secs. Pages in use: 170
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 75/211 181/2000 CircadianClock-PT-001000-CTLFireability-2024-03 43145891 m, 543023 m/sec, 128914069 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 75 secs. Pages in use: 181
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 80/211 192/2000 CircadianClock-PT-001000-CTLFireability-2024-03 45778363 m, 526494 m/sec, 136811322 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 80 secs. Pages in use: 192
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 85/211 204/2000 CircadianClock-PT-001000-CTLFireability-2024-03 48522374 m, 548802 m/sec, 145041044 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 85 secs. Pages in use: 204
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 90/211 215/2000 CircadianClock-PT-001000-CTLFireability-2024-03 51228563 m, 541237 m/sec, 153157889 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 90 secs. Pages in use: 215
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 95/211 226/2000 CircadianClock-PT-001000-CTLFireability-2024-03 53854573 m, 525202 m/sec, 161035843 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 95 secs. Pages in use: 226
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 100/211 238/2000 CircadianClock-PT-001000-CTLFireability-2024-03 56536927 m, 536470 m/sec, 169081238 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 100 secs. Pages in use: 238
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 105/211 249/2000 CircadianClock-PT-001000-CTLFireability-2024-03 59181793 m, 528973 m/sec, 177013656 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 105 secs. Pages in use: 249
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 110/211 259/2000 CircadianClock-PT-001000-CTLFireability-2024-03 61755542 m, 514749 m/sec, 184734501 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 110 secs. Pages in use: 259
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 115/211 271/2000 CircadianClock-PT-001000-CTLFireability-2024-03 64509804 m, 550852 m/sec, 192995270 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 115 secs. Pages in use: 271
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 120/211 282/2000 CircadianClock-PT-001000-CTLFireability-2024-03 67229840 m, 544007 m/sec, 201153874 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 120 secs. Pages in use: 282
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 125/211 294/2000 CircadianClock-PT-001000-CTLFireability-2024-03 69871805 m, 528393 m/sec, 209079687 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 125 secs. Pages in use: 294
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 130/211 305/2000 CircadianClock-PT-001000-CTLFireability-2024-03 72540538 m, 533746 m/sec, 217083611 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 130 secs. Pages in use: 305
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 135/211 316/2000 CircadianClock-PT-001000-CTLFireability-2024-03 75183967 m, 528685 m/sec, 225012277 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 135 secs. Pages in use: 316
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 140/211 327/2000 CircadianClock-PT-001000-CTLFireability-2024-03 77754467 m, 514100 m/sec, 232723445 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 140 secs. Pages in use: 327
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 145/211 338/2000 CircadianClock-PT-001000-CTLFireability-2024-03 80429365 m, 534979 m/sec, 240746249 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 145 secs. Pages in use: 338
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 150/211 349/2000 CircadianClock-PT-001000-CTLFireability-2024-03 83066896 m, 527506 m/sec, 248658779 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 150 secs. Pages in use: 349
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 155/211 360/2000 CircadianClock-PT-001000-CTLFireability-2024-03 85644270 m, 515474 m/sec, 256388872 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 155 secs. Pages in use: 360
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 160/211 371/2000 CircadianClock-PT-001000-CTLFireability-2024-03 88262087 m, 523563 m/sec, 264239427 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 160 secs. Pages in use: 371
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 165/211 381/2000 CircadianClock-PT-001000-CTLFireability-2024-03 90825575 m, 512697 m/sec, 271930249 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 165 secs. Pages in use: 381
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 170/211 392/2000 CircadianClock-PT-001000-CTLFireability-2024-03 93373026 m, 509490 m/sec, 279569967 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 170 secs. Pages in use: 392
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 175/211 403/2000 CircadianClock-PT-001000-CTLFireability-2024-03 96009607 m, 527316 m/sec, 287479979 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 175 secs. Pages in use: 403
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 180/211 414/2000 CircadianClock-PT-001000-CTLFireability-2024-03 98637862 m, 525651 m/sec, 295362528 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 180 secs. Pages in use: 414
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 185/211 425/2000 CircadianClock-PT-001000-CTLFireability-2024-03 101257043 m, 523836 m/sec, 303217813 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 185 secs. Pages in use: 425
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 190/211 436/2000 CircadianClock-PT-001000-CTLFireability-2024-03 103839491 m, 516489 m/sec, 310965216 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 190 secs. Pages in use: 436
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 213/211 444/2000 CircadianClock-PT-001000-CTLFireability-2024-03 105637275 m, 359556 m/sec, 316357041 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 214 secs. Pages in use: 444
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 10 (type EXCL) for CircadianClock-PT-001000-CTLFireability-2024-03 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mCircadianClock-PT-001000-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-03: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-08: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2024-11: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CircadianClock-PT-001000-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 223 secs. Pages in use: 444
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 51 (type EXCL) for 50 CircadianClock-PT-001000-CTLFireability-2023-14
[[35mlola[0m][I] time limit : 211 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 10 (type EXCL) for 9 CircadianClock-PT-001000-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 3374 sec
[[35mlola[0m][I] memory limit: 5 pages
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 410 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CircadianClock-PT-001000"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is CircadianClock-PT-001000, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r071-tall-171620506900298"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/CircadianClock-PT-001000.tgz
mv CircadianClock-PT-001000 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;