About the Execution of LoLA for CANInsertWithFailure-PT-100
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16186.619 | 510739.00 | 1343666.00 | 871.40 | [undef] | Cannot compute |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r071-tall-171620506600172.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is CANInsertWithFailure-PT-100, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r071-tall-171620506600172
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 61M
-rw-r--r-- 1 mcc users 8.9K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 74K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.8K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.8K May 19 07:07 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K May 19 15:35 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K May 19 07:13 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 19 17:58 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K May 14 13:22 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 113K May 14 13:22 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.3K May 14 13:22 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 34K May 14 13:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K May 19 07:10 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K May 19 15:24 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 60M May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME CANInsertWithFailure-PT-100-LTLFireability-00
FORMULA_NAME CANInsertWithFailure-PT-100-LTLFireability-01
FORMULA_NAME CANInsertWithFailure-PT-100-LTLFireability-02
FORMULA_NAME CANInsertWithFailure-PT-100-LTLFireability-03
FORMULA_NAME CANInsertWithFailure-PT-100-LTLFireability-04
FORMULA_NAME CANInsertWithFailure-PT-100-LTLFireability-05
FORMULA_NAME CANInsertWithFailure-PT-100-LTLFireability-06
FORMULA_NAME CANInsertWithFailure-PT-100-LTLFireability-07
FORMULA_NAME CANInsertWithFailure-PT-100-LTLFireability-08
FORMULA_NAME CANInsertWithFailure-PT-100-LTLFireability-09
FORMULA_NAME CANInsertWithFailure-PT-100-LTLFireability-10
FORMULA_NAME CANInsertWithFailure-PT-100-LTLFireability-11
FORMULA_NAME CANInsertWithFailure-PT-100-LTLFireability-12
FORMULA_NAME CANInsertWithFailure-PT-100-LTLFireability-13
FORMULA_NAME CANInsertWithFailure-PT-100-LTLFireability-14
FORMULA_NAME CANInsertWithFailure-PT-100-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1717029865438
BK_STOP 1717030376177
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-09: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-11: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-13: F 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-15: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 68 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-09: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-11: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-13: F 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-15: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 73 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-09: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-11: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-13: F 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-15: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 78 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
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[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-09: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-11: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-13: F 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-15: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 83 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
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[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-09: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-11: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-13: F 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-15: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 88 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
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[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-09: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-11: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-13: F 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-15: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
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[[35mlola[0m][.] Time elapsed: 93 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
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[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-09: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-11: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-13: F 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-15: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
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[[35mlola[0m][.] Time elapsed: 98 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
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[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-09: LTL 0 0 0 0 0 0 0 0
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[[35mlola[0m][I] LAUNCH task # 59 (type SKEL/FNDP) for 46 CANInsertWithFailure-PT-100-LTLFireability-14
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-11: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-13: F 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] 56 LTL SRCH 15/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 197655 m, 6063 m/sec, 588150 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 2/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 61581 m, 12316 m/sec, 117384 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-11: CONJ 0 0 0 0 2 0 0 0
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
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[[35mlola[0m][.] 56 LTL SRCH 20/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 214321 m, 3333 m/sec, 735672 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 7/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 143189 m, 16321 m/sec, 278045 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
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[[35mlola[0m][.] 56 LTL SRCH 25/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 240570 m, 5249 m/sec, 885312 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 12/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 281948 m, 27751 m/sec, 558970 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
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[[35mlola[0m][.] 56 LTL SRCH 30/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 277196 m, 7325 m/sec, 1088375 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 17/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 382762 m, 20162 m/sec, 758682 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
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[[35mlola[0m][.] 56 LTL SRCH 35/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 298604 m, 4281 m/sec, 1295319 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 22/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 491336 m, 21714 m/sec, 975114 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
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[[35mlola[0m][.] 56 LTL SRCH 40/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 329516 m, 6182 m/sec, 1489891 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 27/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 666937 m, 35120 m/sec, 1341679 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
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[[35mlola[0m][.] 56 LTL SRCH 45/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 358310 m, 5758 m/sec, 1672859 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 32/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 861951 m, 39002 m/sec, 1723771 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 50/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 378734 m, 4084 m/sec, 1858618 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 37/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 1000153 m, 27640 m/sec, 1995637 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 55/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 411673 m, 6587 m/sec, 2037757 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 42/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 1143648 m, 28699 m/sec, 2286319 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-11: CONJ 0 0 0 0 2 0 0 0
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-13: F 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
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[[35mlola[0m][.] 56 LTL SRCH 60/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 431232 m, 3911 m/sec, 2211755 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 47/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 1284806 m, 28231 m/sec, 2562424 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 65/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 465334 m, 6820 m/sec, 2401167 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 52/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 1391413 m, 21321 m/sec, 2776269 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 70/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 505307 m, 7994 m/sec, 2680712 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 57/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 1524732 m, 26663 m/sec, 3058239 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 75/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 548265 m, 8591 m/sec, 2987697 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 62/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 1618290 m, 18711 m/sec, 3257389 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 80/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 560053 m, 2357 m/sec, 3057729 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 67/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 1659184 m, 8178 m/sec, 3344347 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 85/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 585271 m, 5043 m/sec, 3249857 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 72/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 1719369 m, 12037 m/sec, 3466244 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 90/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 602069 m, 3359 m/sec, 3361005 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 77/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 1788879 m, 13902 m/sec, 3605051 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 95/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 610220 m, 1630 m/sec, 3451871 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 82/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 1844555 m, 11135 m/sec, 3716353 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 100/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 625545 m, 3065 m/sec, 3537909 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 87/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 1897489 m, 10586 m/sec, 3819161 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-11: CONJ 0 0 0 0 2 0 0 0
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-13: F 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] 56 LTL SRCH 105/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 637287 m, 2348 m/sec, 3624632 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 92/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 1946553 m, 9812 m/sec, 3916163 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
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[[35mlola[0m][.] 56 LTL SRCH 111/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 648806 m, 2303 m/sec, 3726884 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 98/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 2011896 m, 13068 m/sec, 4041534 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 116/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 667241 m, 3687 m/sec, 3833228 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 103/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 2073466 m, 12314 m/sec, 4158876 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 121/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 672856 m, 1123 m/sec, 3918131 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 108/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 2119507 m, 9208 m/sec, 4250396 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 126/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 705411 m, 6511 m/sec, 4152531 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 113/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 2201723 m, 16443 m/sec, 4409389 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 131/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 751405 m, 9198 m/sec, 4447128 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 118/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 2314080 m, 22471 m/sec, 4636444 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 136/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 777209 m, 5160 m/sec, 4635563 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 123/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 2475088 m, 32201 m/sec, 4949561 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 141/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 792075 m, 2973 m/sec, 4783880 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 128/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 2568637 m, 18709 m/sec, 5122597 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 146/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 800350 m, 1655 m/sec, 5002967 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 133/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 2707432 m, 27759 m/sec, 5405110 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-11: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-13: F 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] 56 LTL SRCH 151/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 800421 m, 14 m/sec, 5159973 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 138/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 2828528 m, 24219 m/sec, 5646099 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
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[[35mlola[0m][.] 56 LTL SRCH 156/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 847557 m, 9427 m/sec, 5517529 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 143/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 2957209 m, 25736 m/sec, 5896661 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
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[[35mlola[0m][.] 56 LTL SRCH 161/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 894444 m, 9377 m/sec, 5870502 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 148/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 3056264 m, 19811 m/sec, 6077769 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 166/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 939755 m, 9062 m/sec, 6152223 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 153/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 3204616 m, 29670 m/sec, 6366540 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 171/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 970581 m, 6165 m/sec, 6365423 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 158/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 3294581 m, 17993 m/sec, 6547571 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 176/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 983994 m, 2682 m/sec, 6529174 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 163/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 3441768 m, 29437 m/sec, 6849414 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 181/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 1030038 m, 9208 m/sec, 6783226 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 168/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 3571311 m, 25908 m/sec, 7113290 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 186/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 1052340 m, 4460 m/sec, 6995369 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 173/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 3684952 m, 22728 m/sec, 7346859 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 191/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 1087927 m, 7117 m/sec, 7192932 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 178/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 3839024 m, 30814 m/sec, 7667526 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-11: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-13: F 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] 56 LTL SRCH 196/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 1118939 m, 6202 m/sec, 7454719 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 183/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 3929872 m, 18169 m/sec, 7860184 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-11: CONJ 0 0 0 0 2 0 0 0
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-13: F 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
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[[35mlola[0m][.] 56 LTL SRCH 201/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 1163149 m, 8842 m/sec, 7708835 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 188/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 4045710 m, 23167 m/sec, 8104728 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
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[[35mlola[0m][.] 56 LTL SRCH 206/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 1201731 m, 7716 m/sec, 8010659 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 193/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 4198577 m, 30573 m/sec, 8426312 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
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[[35mlola[0m][.] 56 LTL SRCH 211/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 1233238 m, 6301 m/sec, 8268537 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 198/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 4367205 m, 33725 m/sec, 8765896 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
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[[35mlola[0m][.] 56 LTL SRCH 216/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 1273110 m, 7974 m/sec, 8508813 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 203/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 4509950 m, 28549 m/sec, 9047542 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-13: F 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
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[[35mlola[0m][.] 56 LTL SRCH 221/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 1313111 m, 8000 m/sec, 8805086 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 208/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 4633511 m, 24712 m/sec, 9285228 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
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[[35mlola[0m][.] 56 LTL SRCH 226/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 1337848 m, 4947 m/sec, 9018655 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 213/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 4751888 m, 23675 m/sec, 9509711 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
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[[35mlola[0m][.] 56 LTL SRCH 231/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 1374247 m, 7279 m/sec, 9310179 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 218/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 4875787 m, 24779 m/sec, 9750187 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 236/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 1410366 m, 7223 m/sec, 9593926 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 223/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 5027106 m, 30263 m/sec, 10040382 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-11: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-13: F 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] 56 LTL SRCH 241/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 1453672 m, 8661 m/sec, 9847693 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 228/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 5165956 m, 27770 m/sec, 10323518 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-11: CONJ 0 0 0 0 2 0 0 0
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-13: F 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] 56 LTL SRCH 246/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 1479868 m, 5239 m/sec, 10022105 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 233/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 5281622 m, 23133 m/sec, 10550708 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] 56 LTL SRCH 251/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 1513069 m, 6640 m/sec, 10263444 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 238/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 5379384 m, 19552 m/sec, 10722131 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-13: F 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
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[[35mlola[0m][.] 56 LTL SRCH 256/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 1544966 m, 6379 m/sec, 10590443 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 243/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 5473291 m, 18781 m/sec, 10902245 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
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[[35mlola[0m][.] 56 LTL SRCH 261/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 1614617 m, 13930 m/sec, 11621126 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 248/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 5537832 m, 12908 m/sec, 11034501 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-13: F 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
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[[35mlola[0m][.] 56 LTL SRCH 266/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 1668449 m, 10766 m/sec, 12021092 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 253/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 5626658 m, 17765 m/sec, 11213124 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
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[[35mlola[0m][.] 56 LTL SRCH 271/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 1717979 m, 9906 m/sec, 12407455 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 258/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 5720498 m, 18768 m/sec, 11399692 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
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[[35mlola[0m][.] 56 LTL SRCH 276/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 1784233 m, 13250 m/sec, 12968165 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 263/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 5822846 m, 20469 m/sec, 11608922 t fired, .
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[[35mlola[0m][.] 56 LTL SRCH 281/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 1845561 m, 12265 m/sec, 13429380 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 268/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 5933582 m, 22147 m/sec, 11815812 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-10: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-11: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-13: F 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 2 0 0 1
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 56 LTL SRCH 286/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 1901278 m, 11143 m/sec, 13906320 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 273/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 6031765 m, 19636 m/sec, 12002215 t fired, .
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[[35mlola[0m][I] result : true
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-10: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-11: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-13: F 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 56 LTL SRCH 291/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 1968010 m, 13346 m/sec, 14458489 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 278/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 6164659 m, 26578 m/sec, 12232538 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-10: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-11: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-13: F 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 56 LTL SRCH 296/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 2041375 m, 14673 m/sec, 15027288 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 283/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 6309213 m, 28910 m/sec, 12505367 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-10: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-11: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-13: F 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 56 LTL SRCH 301/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 2142963 m, 20317 m/sec, 16159439 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 288/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 6427629 m, 23683 m/sec, 12739599 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-10: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-11: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-13: F 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] 56 LTL SRCH 306/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 2253966 m, 22200 m/sec, 16972656 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 293/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 6551688 m, 24811 m/sec, 12987342 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-10: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-11: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-13: F 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] 56 LTL SRCH 311/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 2371577 m, 23522 m/sec, 17804174 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 298/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 6691133 m, 27889 m/sec, 13271640 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-10: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-11: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-13: F 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] 56 LTL SRCH 316/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 2462524 m, 18189 m/sec, 18436850 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 303/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 6895241 m, 40821 m/sec, 13676953 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
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[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-10: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-11: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-13: F 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-14: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-100-LTLFireability-15: CONJ 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] 56 LTL SRCH 321/3412 1/5 CANInsertWithFailure-PT-100-LTLFireability-10 2569208 m, 21336 m/sec, 19584164 t fired, .
[[35mlola[0m][.] 62 LTL SRCH 308/3399 1/5 CANInsertWithFailure-PT-100-LTLFireability-15 7035666 m, 28085 m/sec, 13957938 t fired, .
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 408 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CANInsertWithFailure-PT-100"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is CANInsertWithFailure-PT-100, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r071-tall-171620506600172"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/CANInsertWithFailure-PT-100.tgz
mv CANInsertWithFailure-PT-100 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;