About the Execution of LoLA for CANInsertWithFailure-PT-040
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 0.000 | 1804791.00 | 0.00 | 0.00 | ?????T?????TT??? | normal |
Execution Chart
Sorry, for this execution, no execution chart could be reported.
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r071-tall-171620506500122.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is CANInsertWithFailure-PT-040, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r071-tall-171620506500122
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 11M
-rw-r--r-- 1 mcc users 8.6K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 74K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.6K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 54K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 5.0K May 19 07:07 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K May 19 15:33 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.1K May 19 07:13 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 19 17:57 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K May 14 13:22 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 100K May 14 13:22 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 15K May 14 13:22 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 98K May 14 13:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K May 19 07:10 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K May 19 15:24 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 9.8M May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME CANInsertWithFailure-PT-040-CTLFireability-2024-00
FORMULA_NAME CANInsertWithFailure-PT-040-CTLFireability-2024-01
FORMULA_NAME CANInsertWithFailure-PT-040-CTLFireability-2024-02
FORMULA_NAME CANInsertWithFailure-PT-040-CTLFireability-2024-03
FORMULA_NAME CANInsertWithFailure-PT-040-CTLFireability-2024-04
FORMULA_NAME CANInsertWithFailure-PT-040-CTLFireability-2024-05
FORMULA_NAME CANInsertWithFailure-PT-040-CTLFireability-2024-06
FORMULA_NAME CANInsertWithFailure-PT-040-CTLFireability-2024-07
FORMULA_NAME CANInsertWithFailure-PT-040-CTLFireability-2024-08
FORMULA_NAME CANInsertWithFailure-PT-040-CTLFireability-2024-09
FORMULA_NAME CANInsertWithFailure-PT-040-CTLFireability-2024-10
FORMULA_NAME CANInsertWithFailure-PT-040-CTLFireability-2024-11
FORMULA_NAME CANInsertWithFailure-PT-040-CTLFireability-2023-12
FORMULA_NAME CANInsertWithFailure-PT-040-CTLFireability-2023-13
FORMULA_NAME CANInsertWithFailure-PT-040-CTLFireability-2023-14
FORMULA_NAME CANInsertWithFailure-PT-040-CTLFireability-2023-15
=== Now, execution of the tool begins
BK_START 1717019310176
FORMULA CANInsertWithFailure-PT-040-CTLFireability-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CANInsertWithFailure-PT-040-CTLFireability-2023-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CANInsertWithFailure-PT-040-CTLFireability-2024-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717021114967
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 73 (type SKEL/FNDP) for 19 CANInsertWithFailure-PT-040-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 74 (type SKEL/EQUN) for 19 CANInsertWithFailure-PT-040-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 75 (type SKEL/SRCH) for 19 CANInsertWithFailure-PT-040-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 75 (type SKEL/SRCH) for CANInsertWithFailure-PT-040-CTLFireability-2024-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 12
[[35mlola[0m][I] fired transitions : 11
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 73 (type FNDP) for CANInsertWithFailure-PT-040-CTLFireability-2024-05 (obsolete)
[[35mlola[0m][W] CANCELED task # 74 (type EQUN) for CANInsertWithFailure-PT-040-CTLFireability-2024-05 (obsolete)
[[35mlola[0m][I] FINISHED task # 73 (type SKEL/FNDP) for CANInsertWithFailure-PT-040-CTLFireability-2024-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] LAUNCH task # 77 (type SKEL/FNDP) for 60 CANInsertWithFailure-PT-040-CTLFireability-2023-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 78 (type SKEL/EQUN) for 60 CANInsertWithFailure-PT-040-CTLFireability-2023-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 79 (type SKEL/SRCH) for 60 CANInsertWithFailure-PT-040-CTLFireability-2023-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 79 (type SKEL/SRCH) for CANInsertWithFailure-PT-040-CTLFireability-2023-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 7
[[35mlola[0m][I] fired transitions : 6
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 77 (type FNDP) for CANInsertWithFailure-PT-040-CTLFireability-2023-12 (obsolete)
[[35mlola[0m][W] CANCELED task # 78 (type EQUN) for CANInsertWithFailure-PT-040-CTLFireability-2023-12 (obsolete)
[[35mlola[0m][I] FINISHED task # 77 (type SKEL/FNDP) for CANInsertWithFailure-PT-040-CTLFireability-2023-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] LAUNCH task # 81 (type SKEL/FNDP) for 53 CANInsertWithFailure-PT-040-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 82 (type SKEL/EQUN) for 53 CANInsertWithFailure-PT-040-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 83 (type SKEL/SRCH) for 53 CANInsertWithFailure-PT-040-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 81 (type SKEL/FNDP) for CANInsertWithFailure-PT-040-CTLFireability-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 82 (type EQUN) for CANInsertWithFailure-PT-040-CTLFireability-2024-11 (obsolete)
[[35mlola[0m][W] CANCELED task # 83 (type SRCH) for CANInsertWithFailure-PT-040-CTLFireability-2024-11 (obsolete)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-04: EFEG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-05: DISJ 0 0 0 0 5 0 0 1
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-07: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-11: DISJ 0 0 0 0 2 0 0 2
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-12: EF 0 0 0 0 2 0 0 1
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 49 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-04: EFEG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-05: DISJ 0 0 0 0 5 0 0 1
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-07: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-11: DISJ 0 0 0 0 2 0 0 2
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-12: EF 0 0 0 0 2 0 0 1
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 54 secs. Pages in use: 1
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[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-04: EFEG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-05: DISJ 0 0 0 0 5 0 0 1
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-07: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-11: DISJ 0 0 0 0 2 0 0 2
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-12: EF 0 0 0 0 2 0 0 1
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
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[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-04: EFEG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-05: DISJ 0 0 0 0 5 0 0 1
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-07: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-11: DISJ 0 0 0 0 2 0 0 2
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-12: EF 0 0 0 0 2 0 0 1
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
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[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-04: EFEG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-05: DISJ 0 0 0 0 5 0 0 1
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-07: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-11: DISJ 0 0 0 0 2 0 0 2
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-12: EF 0 0 0 0 2 0 0 1
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
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[[35mlola[0m][I] FINISHED task # 78 (type SKEL/EQUN) for CANInsertWithFailure-PT-040-CTLFireability-2023-12
[[35mlola[0m][I] result : true
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[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-01: CONJ 1 0 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-04: EFEG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-05: DISJ 0 0 0 0 5 0 0 1
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-07: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
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[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-11: DISJ 0 0 0 0 2 0 0 2
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-12: EF 0 0 0 0 3 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-15: CTL 0 0 0 0 1 0 0 0
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[[35mlola[0m][I] LAUNCH task # 6 (type EXCL) for 3 CANInsertWithFailure-PT-040-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 167 sec
[[35mlola[0m][I] memory limit: 2000 pages
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[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-01: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-04: EFEG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-05: DISJ 1 1 0 0 5 0 0 1
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-07: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-11: DISJ 1 0 0 0 2 0 0 2
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-12: EF 0 0 0 0 3 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 6 CTL EXCL 1/167 1/2000 CANInsertWithFailure-PT-040-CTLFireability-2024-01 13114 m, 2622 m/sec, 52705 t fired, .
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[[35mlola[0m][I] LAUNCH task # 87 (type FNDP) for 19 CANInsertWithFailure-PT-040-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 91 (type EQUN) for 19 CANInsertWithFailure-PT-040-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 32000000 sec
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[[35mlola[0m][I] LAUNCH task # 90 (type EQUN) for 53 CANInsertWithFailure-PT-040-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 87 (type FNDP) for CANInsertWithFailure-PT-040-CTLFireability-2024-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 91 (type EQUN) for CANInsertWithFailure-PT-040-CTLFireability-2024-05 (obsolete)
[[35mlola[0m][I] LAUNCH task # 94 (type EQUN) for 53 CANInsertWithFailure-PT-040-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 90 (type EQUN) for CANInsertWithFailure-PT-040-CTLFireability-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 94 (type EQUN) for CANInsertWithFailure-PT-040-CTLFireability-2024-11
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] LAUNCH task # 95 (type FNDP) for 53 CANInsertWithFailure-PT-040-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 96 (type EQUN) for 53 CANInsertWithFailure-PT-040-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
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[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-01: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-04: EFEG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-07: DISJ 1 1 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-11: DISJ 0 2 2 0 4 0 0 2
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-12: EF 0 0 0 0 3 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 6 CTL EXCL 6/195 2/2000 CANInsertWithFailure-PT-040-CTLFireability-2024-01 52844 m, 7946 m/sec, 269685 t fired, .
[[35mlola[0m][.] 95 EF FNDP 0/3515 0/5 CANInsertWithFailure-PT-040-CTLFireability-2024-11 --
[[35mlola[0m][.] 96 EF STEQ 0/3515 0/5 CANInsertWithFailure-PT-040-CTLFireability-2024-11 --
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[[35mlola[0m][I] LAUNCH task # 98 (type FNDP) for 60 CANInsertWithFailure-PT-040-CTLFireability-2023-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 98 (type FNDP) for CANInsertWithFailure-PT-040-CTLFireability-2023-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] LAUNCH task # 104 (type EQUN) for 16 CANInsertWithFailure-PT-040-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 95 (type FNDP) for CANInsertWithFailure-PT-040-CTLFireability-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 96 (type EQUN) for CANInsertWithFailure-PT-040-CTLFireability-2024-11 (obsolete)
[[35mlola[0m][I] LAUNCH task # 106 (type EQUN) for 16 CANInsertWithFailure-PT-040-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 106 (type EQUN) for CANInsertWithFailure-PT-040-CTLFireability-2024-04
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 96 (type EQUN) for CANInsertWithFailure-PT-040-CTLFireability-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mCANInsertWithFailure-PT-040-CTLFireability-2024-05: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mCANInsertWithFailure-PT-040-CTLFireability-2024-11: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mCANInsertWithFailure-PT-040-CTLFireability-2023-12: EF true findpath[0m
[[35mlola[0m][.]
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[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-01: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-04: EFEG 0 1 1 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-07: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 6 CTL EXCL 11/234 2/2000 CANInsertWithFailure-PT-040-CTLFireability-2024-01 77510 m, 4933 m/sec, 430257 t fired, .
[[35mlola[0m][.] 104 EF STEQ 5/3515 0/5 CANInsertWithFailure-PT-040-CTLFireability-2024-04 sara not yet started (preprocessing).
[[35mlola[0m][.]
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[[35mlola[0m][.] [1m[32mCANInsertWithFailure-PT-040-CTLFireability-2024-05: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mCANInsertWithFailure-PT-040-CTLFireability-2024-11: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mCANInsertWithFailure-PT-040-CTLFireability-2023-12: EF true findpath[0m
[[35mlola[0m][.]
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[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-01: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-04: EFEG 0 1 1 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-07: DISJ 0 2 0 0 2 0 0 0
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[[35mlola[0m][.] 6 CTL EXCL 181/234 28/2000 CANInsertWithFailure-PT-040-CTLFireability-2024-01 1284232 m, 8114 m/sec, 9011104 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-07: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 6 CTL EXCL 231/234 34/2000 CANInsertWithFailure-PT-040-CTLFireability-2024-01 1606303 m, 6619 m/sec, 11568937 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-01: CONJ 0 1 0 0 2 1 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-04: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-07: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][I] LAUNCH task # 67 (type EXCL) for 66 CANInsertWithFailure-PT-040-CTLFireability-2023-14
[[35mlola[0m][I] time limit : 234 sec
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[[35mlola[0m][I] LAUNCH task # 6 (type EXCL) for 3 CANInsertWithFailure-PT-040-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 3285 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 67 (type EXCL) for CANInsertWithFailure-PT-040-CTLFireability-2023-14
[[35mlola[0m][I] result : true
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[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-01: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-04: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-07: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 6 CTL EXCL 5/234 2/5 CANInsertWithFailure-PT-040-CTLFireability-2024-01 47732 m, -311714 m/sec, 239503 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-01: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-04: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-07: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 6 CTL EXCL 10/234 3/5 CANInsertWithFailure-PT-040-CTLFireability-2024-01 87748 m, 8003 m/sec, 494470 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-01: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-04: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-07: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 6 CTL EXCL 15/234 4/5 CANInsertWithFailure-PT-040-CTLFireability-2024-01 134192 m, 9288 m/sec, 746860 t fired, .
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[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-01: CONJ 0 1 1 0 2 0 0 0
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[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-04: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-01: CONJ 0 1 0 0 2 0 1 0
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[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-04: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] CANInsertWithFailure-PT-040-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 64 CTL EXCL 10/250 4/2000 CANInsertWithFailure-PT-040-CTLFireability-2023-13 137392 m, 13281 m/sec, 476106 t fired, .
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[[35mlola[0m][I] result : false
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 410 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CANInsertWithFailure-PT-040"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is CANInsertWithFailure-PT-040, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r071-tall-171620506500122"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/CANInsertWithFailure-PT-040.tgz
mv CANInsertWithFailure-PT-040 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;