fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r069-tall-171620504000218
Last Updated
July 7, 2024

About the Execution of GreatSPN+red for CSRepetitions-COL-10

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
11674.859 3600000.00 8373161.00 8261.80 ????????????T??? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r069-tall-171620504000218.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool greatspnxred
Input is CSRepetitions-COL-10, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r069-tall-171620504000218
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 484K
-rw-r--r-- 1 mcc users 6.8K Apr 12 10:45 CTLCardinality.txt
-rw-r--r-- 1 mcc users 58K Apr 12 10:45 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.3K Apr 12 10:28 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K Apr 12 10:28 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.3K Apr 22 14:32 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Apr 22 14:32 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Apr 22 14:32 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 22 14:32 LTLFireability.xml
-rw-r--r-- 1 mcc users 16K Apr 12 12:25 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 138K Apr 12 12:25 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Apr 12 12:04 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 76K Apr 12 12:04 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 22 14:32 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Apr 22 14:32 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_pt
-rw-r--r-- 1 mcc users 3 May 18 16:42 instance
-rw-r--r-- 1 mcc users 5 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 18K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CSRepetitions-COL-10-CTLFireability-2024-00
FORMULA_NAME CSRepetitions-COL-10-CTLFireability-2024-01
FORMULA_NAME CSRepetitions-COL-10-CTLFireability-2024-02
FORMULA_NAME CSRepetitions-COL-10-CTLFireability-2024-03
FORMULA_NAME CSRepetitions-COL-10-CTLFireability-2024-04
FORMULA_NAME CSRepetitions-COL-10-CTLFireability-2024-05
FORMULA_NAME CSRepetitions-COL-10-CTLFireability-2024-06
FORMULA_NAME CSRepetitions-COL-10-CTLFireability-2024-07
FORMULA_NAME CSRepetitions-COL-10-CTLFireability-2024-08
FORMULA_NAME CSRepetitions-COL-10-CTLFireability-2024-09
FORMULA_NAME CSRepetitions-COL-10-CTLFireability-2024-10
FORMULA_NAME CSRepetitions-COL-10-CTLFireability-2024-11
FORMULA_NAME CSRepetitions-COL-10-CTLFireability-2024-12
FORMULA_NAME CSRepetitions-COL-10-CTLFireability-2024-13
FORMULA_NAME CSRepetitions-COL-10-CTLFireability-2024-14
FORMULA_NAME CSRepetitions-COL-10-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1716416515154

Invoking MCC driver with
BK_TOOL=greatspnxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=CSRepetitions-COL-10
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool greatspn
Invoking reducer
Running Version 202405141337
[2024-05-22 22:21:56] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-05-22 22:21:56] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-22 22:21:56] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2024-05-22 22:21:56] [WARNING] Using fallBack plugin, rng conformance not checked
[2024-05-22 22:21:56] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 584 ms
[2024-05-22 22:21:56] [INFO ] Imported 6 HL places and 5 HL transitions for a total of 1311 PT places and 2300.0 transition bindings in 14 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 16 ms.
[2024-05-22 22:21:57] [INFO ] Built PT skeleton of HLPN with 6 places and 5 transitions 15 arcs in 4 ms.
[2024-05-22 22:21:57] [INFO ] Skeletonized 16 HLPN properties in 3 ms.
Computed a total of 0 stabilizing places and 1 stable transitions
Remains 4 properties that can be checked using skeleton over-approximation.
Computed a total of 0 stabilizing places and 1 stable transitions
RANDOM walk for 824 steps (3 resets) in 10 ms. (74 steps per ms) remains 0/5 properties
[2024-05-22 22:21:57] [INFO ] Flatten gal took : 13 ms
[2024-05-22 22:21:57] [INFO ] Flatten gal took : 2 ms
Transition Send_Answer forces synchronizations/join behavior on parameter c of sort Client
Symmetric sort wr.t. initial and guards and successors and join/free detected :Server
Symmetric sort wr.t. initial detected :Server
Symmetric sort wr.t. initial and guards detected :Server
Applying symmetric unfolding of full symmetric sort :Server domain size was 10
[2024-05-22 22:21:57] [INFO ] Unfolded HLPN to a Petri net with 402 places and 500 transitions 1500 arcs in 26 ms.
[2024-05-22 22:21:57] [INFO ] Unfolded 16 HLPN properties in 2 ms.
Support contains 402 out of 402 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 402/402 places, 500/500 transitions.
Applied a total of 0 rules in 9 ms. Remains 402 /402 variables (removed 0) and now considering 500/500 (removed 0) transitions.
// Phase 1: matrix 500 rows 402 cols
[2024-05-22 22:21:57] [INFO ] Computed 101 invariants in 30 ms
[2024-05-22 22:21:57] [INFO ] Implicit Places using invariants in 339 ms returned []
[2024-05-22 22:21:57] [INFO ] Invariant cache hit.
[2024-05-22 22:21:57] [INFO ] State equation strengthened by 100 read => feed constraints.
[2024-05-22 22:21:57] [INFO ] Implicit Places using invariants and state equation in 277 ms returned []
Implicit Place search using SMT with State Equation took 642 ms to find 0 implicit places.
Running 400 sub problems to find dead transitions.
[2024-05-22 22:21:58] [INFO ] Invariant cache hit.
[2024-05-22 22:21:58] [INFO ] State equation strengthened by 100 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/302 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 400 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/302 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 400 unsolved
At refinement iteration 2 (OVERLAPS) 100/402 variables, 100/101 constraints. Problems are: Problem set: 0 solved, 400 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/402 variables, 0/101 constraints. Problems are: Problem set: 0 solved, 400 unsolved
At refinement iteration 4 (OVERLAPS) 500/902 variables, 402/503 constraints. Problems are: Problem set: 0 solved, 400 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/902 variables, 100/603 constraints. Problems are: Problem set: 0 solved, 400 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/902 variables, 0/603 constraints. Problems are: Problem set: 0 solved, 400 unsolved
At refinement iteration 7 (OVERLAPS) 0/902 variables, 0/603 constraints. Problems are: Problem set: 0 solved, 400 unsolved
No progress, stopping.
After SMT solving in domain Real declared 902/902 variables, and 603 constraints, problems are : Problem set: 0 solved, 400 unsolved in 29187 ms.
Refiners :[Positive P Invariants (semi-flows): 101/101 constraints, State Equation: 402/402 constraints, ReadFeed: 100/100 constraints, PredecessorRefiner: 400/400 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 400 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/302 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 400 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/302 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 400 unsolved
At refinement iteration 2 (OVERLAPS) 100/402 variables, 100/101 constraints. Problems are: Problem set: 0 solved, 400 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/402 variables, 0/101 constraints. Problems are: Problem set: 0 solved, 400 unsolved
At refinement iteration 4 (OVERLAPS) 500/902 variables, 402/503 constraints. Problems are: Problem set: 0 solved, 400 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/902 variables, 100/603 constraints. Problems are: Problem set: 0 solved, 400 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/902 variables, 400/1003 constraints. Problems are: Problem set: 0 solved, 400 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/902 variables, 0/1003 constraints. Problems are: Problem set: 0 solved, 400 unsolved
At refinement iteration 8 (OVERLAPS) 0/902 variables, 0/1003 constraints. Problems are: Problem set: 0 solved, 400 unsolved
No progress, stopping.
After SMT solving in domain Int declared 902/902 variables, and 1003 constraints, problems are : Problem set: 0 solved, 400 unsolved in 29199 ms.
Refiners :[Positive P Invariants (semi-flows): 101/101 constraints, State Equation: 402/402 constraints, ReadFeed: 100/100 constraints, PredecessorRefiner: 400/400 constraints, Known Traps: 0/0 constraints]
After SMT, in 59329ms problems are : Problem set: 0 solved, 400 unsolved
Search for dead transitions found 0 dead transitions in 59368ms
Finished structural reductions in LTL mode , in 1 iterations and 60037 ms. Remains : 402/402 places, 500/500 transitions.
Support contains 402 out of 402 places after structural reductions.
[2024-05-22 22:22:57] [INFO ] Flatten gal took : 143 ms
[2024-05-22 22:22:58] [INFO ] Flatten gal took : 88 ms
[2024-05-22 22:22:58] [INFO ] Input system was already deterministic with 500 transitions.
Reduction of identical properties reduced properties to check from 22 to 16
RANDOM walk for 1794 steps (10 resets) in 588 ms. (3 steps per ms) remains 0/16 properties
[2024-05-22 22:22:59] [INFO ] Flatten gal took : 54 ms
[2024-05-22 22:23:00] [INFO ] Flatten gal took : 84 ms
[2024-05-22 22:23:00] [INFO ] Input system was already deterministic with 500 transitions.
Computed a total of 0 stabilizing places and 100 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 402/402 places, 500/500 transitions.
Applied a total of 0 rules in 3 ms. Remains 402 /402 variables (removed 0) and now considering 500/500 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 402/402 places, 500/500 transitions.
[2024-05-22 22:23:00] [INFO ] Flatten gal took : 20 ms
[2024-05-22 22:23:00] [INFO ] Flatten gal took : 22 ms
[2024-05-22 22:23:00] [INFO ] Input system was already deterministic with 500 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 402/402 places, 500/500 transitions.
Applied a total of 0 rules in 22 ms. Remains 402 /402 variables (removed 0) and now considering 500/500 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 22 ms. Remains : 402/402 places, 500/500 transitions.
[2024-05-22 22:23:00] [INFO ] Flatten gal took : 23 ms
[2024-05-22 22:23:00] [INFO ] Flatten gal took : 21 ms
[2024-05-22 22:23:00] [INFO ] Input system was already deterministic with 500 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 402/402 places, 500/500 transitions.
Applied a total of 0 rules in 17 ms. Remains 402 /402 variables (removed 0) and now considering 500/500 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 17 ms. Remains : 402/402 places, 500/500 transitions.
[2024-05-22 22:23:01] [INFO ] Flatten gal took : 17 ms
[2024-05-22 22:23:01] [INFO ] Flatten gal took : 21 ms
[2024-05-22 22:23:01] [INFO ] Input system was already deterministic with 500 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 402/402 places, 500/500 transitions.
Applied a total of 0 rules in 45 ms. Remains 402 /402 variables (removed 0) and now considering 500/500 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 45 ms. Remains : 402/402 places, 500/500 transitions.
[2024-05-22 22:23:01] [INFO ] Flatten gal took : 14 ms
[2024-05-22 22:23:01] [INFO ] Flatten gal took : 16 ms
[2024-05-22 22:23:01] [INFO ] Input system was already deterministic with 500 transitions.
Starting structural reductions in LTL mode, iteration 0 : 402/402 places, 500/500 transitions.
Applied a total of 0 rules in 2 ms. Remains 402 /402 variables (removed 0) and now considering 500/500 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 402/402 places, 500/500 transitions.
[2024-05-22 22:23:01] [INFO ] Flatten gal took : 19 ms
[2024-05-22 22:23:01] [INFO ] Flatten gal took : 25 ms
[2024-05-22 22:23:01] [INFO ] Input system was already deterministic with 500 transitions.
Starting structural reductions in LTL mode, iteration 0 : 402/402 places, 500/500 transitions.
Applied a total of 0 rules in 2 ms. Remains 402 /402 variables (removed 0) and now considering 500/500 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 15 ms. Remains : 402/402 places, 500/500 transitions.
[2024-05-22 22:23:01] [INFO ] Flatten gal took : 25 ms
[2024-05-22 22:23:01] [INFO ] Flatten gal took : 52 ms
[2024-05-22 22:23:01] [INFO ] Input system was already deterministic with 500 transitions.
Starting structural reductions in LTL mode, iteration 0 : 402/402 places, 500/500 transitions.
Applied a total of 0 rules in 2 ms. Remains 402 /402 variables (removed 0) and now considering 500/500 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 402/402 places, 500/500 transitions.
[2024-05-22 22:23:01] [INFO ] Flatten gal took : 32 ms
[2024-05-22 22:23:01] [INFO ] Flatten gal took : 24 ms
[2024-05-22 22:23:01] [INFO ] Input system was already deterministic with 500 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 402/402 places, 500/500 transitions.
Applied a total of 0 rules in 19 ms. Remains 402 /402 variables (removed 0) and now considering 500/500 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 19 ms. Remains : 402/402 places, 500/500 transitions.
[2024-05-22 22:23:01] [INFO ] Flatten gal took : 11 ms
[2024-05-22 22:23:01] [INFO ] Flatten gal took : 12 ms
[2024-05-22 22:23:01] [INFO ] Input system was already deterministic with 500 transitions.
Starting structural reductions in LTL mode, iteration 0 : 402/402 places, 500/500 transitions.
Applied a total of 0 rules in 4 ms. Remains 402 /402 variables (removed 0) and now considering 500/500 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 402/402 places, 500/500 transitions.
[2024-05-22 22:23:01] [INFO ] Flatten gal took : 12 ms
[2024-05-22 22:23:01] [INFO ] Flatten gal took : 14 ms
[2024-05-22 22:23:01] [INFO ] Input system was already deterministic with 500 transitions.
Starting structural reductions in LTL mode, iteration 0 : 402/402 places, 500/500 transitions.
Applied a total of 0 rules in 2 ms. Remains 402 /402 variables (removed 0) and now considering 500/500 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 402/402 places, 500/500 transitions.
[2024-05-22 22:23:01] [INFO ] Flatten gal took : 13 ms
[2024-05-22 22:23:01] [INFO ] Flatten gal took : 16 ms
[2024-05-22 22:23:01] [INFO ] Input system was already deterministic with 500 transitions.
Starting structural reductions in LTL mode, iteration 0 : 402/402 places, 500/500 transitions.
Applied a total of 0 rules in 4 ms. Remains 402 /402 variables (removed 0) and now considering 500/500 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 402/402 places, 500/500 transitions.
[2024-05-22 22:23:01] [INFO ] Flatten gal took : 11 ms
[2024-05-22 22:23:01] [INFO ] Flatten gal took : 36 ms
[2024-05-22 22:23:01] [INFO ] Input system was already deterministic with 500 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 402/402 places, 500/500 transitions.
Applied a total of 0 rules in 11 ms. Remains 402 /402 variables (removed 0) and now considering 500/500 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 11 ms. Remains : 402/402 places, 500/500 transitions.
[2024-05-22 22:23:01] [INFO ] Flatten gal took : 13 ms
[2024-05-22 22:23:01] [INFO ] Flatten gal took : 14 ms
[2024-05-22 22:23:01] [INFO ] Input system was already deterministic with 500 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 402/402 places, 500/500 transitions.
Applied a total of 0 rules in 15 ms. Remains 402 /402 variables (removed 0) and now considering 500/500 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 16 ms. Remains : 402/402 places, 500/500 transitions.
[2024-05-22 22:23:01] [INFO ] Flatten gal took : 11 ms
[2024-05-22 22:23:01] [INFO ] Flatten gal took : 12 ms
[2024-05-22 22:23:02] [INFO ] Input system was already deterministic with 500 transitions.
RANDOM walk for 488 steps (0 resets) in 11 ms. (40 steps per ms) remains 0/1 properties
FORMULA CSRepetitions-COL-10-CTLFireability-2024-12 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 402/402 places, 500/500 transitions.
Applied a total of 0 rules in 3 ms. Remains 402 /402 variables (removed 0) and now considering 500/500 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 402/402 places, 500/500 transitions.
[2024-05-22 22:23:02] [INFO ] Flatten gal took : 14 ms
[2024-05-22 22:23:02] [INFO ] Flatten gal took : 28 ms
[2024-05-22 22:23:02] [INFO ] Input system was already deterministic with 500 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 402/402 places, 500/500 transitions.
Applied a total of 0 rules in 11 ms. Remains 402 /402 variables (removed 0) and now considering 500/500 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 12 ms. Remains : 402/402 places, 500/500 transitions.
[2024-05-22 22:23:02] [INFO ] Flatten gal took : 11 ms
[2024-05-22 22:23:02] [INFO ] Flatten gal took : 13 ms
[2024-05-22 22:23:02] [INFO ] Input system was already deterministic with 500 transitions.
Starting structural reductions in LTL mode, iteration 0 : 402/402 places, 500/500 transitions.
Applied a total of 0 rules in 5 ms. Remains 402 /402 variables (removed 0) and now considering 500/500 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 402/402 places, 500/500 transitions.
[2024-05-22 22:23:02] [INFO ] Flatten gal took : 11 ms
[2024-05-22 22:23:02] [INFO ] Flatten gal took : 12 ms
[2024-05-22 22:23:02] [INFO ] Input system was already deterministic with 500 transitions.
[2024-05-22 22:23:02] [INFO ] Flatten gal took : 75 ms
[2024-05-22 22:23:02] [INFO ] Flatten gal took : 74 ms
[2024-05-22 22:23:03] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 42 ms.
[2024-05-22 22:23:03] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 402 places, 500 transitions and 1500 arcs took 5 ms.
Total runtime 67205 ms.
There are residual formulas that ITS could not solve within timeout
----------------------------------------------------------------------
GreatSPN-meddly tool, MCC 2023
----------------------------------------------------------------------

Running CSRepetitions-COL-10

IS_COLORED=
IS_NUPN=

LOADING PETRI NET FILE /home/mcc/execution/407/model.pnml (PNML) ...
PNML VERSION 2009, P/T NET.
COLOR CLASSES: 0
CONSTANTS: 0
PLACES: 402
TRANSITIONS: 500
COLOR VARS: 0
MEASURES: 0
LOADING TIME: [User 0.010s, Sys 0.000s]


SAVING FILE /home/mcc/execution/407/model (.net / .def) ...
EXPORT TIME: [User 0.001s, Sys 0.000s]


----------------------------------------------------------------------
GreatSPN/Meddly.
Copyright (C) 1987-2022, University of Torino, Italy.
website: https://github.com/greatspn/SOURCES

Based on MEDDLY version 0.16.0
Copyright (C) 2009, Iowa State University Research Foundation, Inc.
website: http://meddly.sourceforge.net

Process ID: 554
MODEL NAME: /home/mcc/execution/407/model
402 places, 500 transitions.

Creating all event NSFs..
Creating all event NSFs..
Creating all event NSFs..
Creating all event NSFs..
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
MEDDLY ERROR: Insufficient memory

MEDDLY ERROR: Insufficient memory

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CSRepetitions-COL-10"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="greatspnxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool greatspnxred"
echo " Input is CSRepetitions-COL-10, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r069-tall-171620504000218"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/CSRepetitions-COL-10.tgz
mv CSRepetitions-COL-10 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;