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Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r065-tajo-171620414400109
Last Updated
July 7, 2024

About the Execution of 2023-gold for BridgeAndVehicles-PT-V10P10N10

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
312.720 18769.00 59736.00 255.20 TFFTTTFTTTFTTFTT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2024-input.r065-tajo-171620414400109.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2024-input.qcow2' backing_fmt='qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.......................
=====================================================================
Generated by BenchKit 2-5568
Executing tool gold2023
Input is BridgeAndVehicles-PT-V10P10N10, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r065-tajo-171620414400109
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.5M
-rw-r--r-- 1 mcc users 12K Apr 13 01:20 CTLCardinality.txt
-rw-r--r-- 1 mcc users 88K Apr 13 01:20 CTLCardinality.xml
-rw-r--r-- 1 mcc users 52K Apr 13 01:18 CTLFireability.txt
-rw-r--r-- 1 mcc users 238K Apr 13 01:18 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 5.6K Apr 22 14:29 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K Apr 22 14:29 LTLCardinality.xml
-rw-r--r-- 1 mcc users 22K Apr 22 14:29 LTLFireability.txt
-rw-r--r-- 1 mcc users 74K Apr 22 14:29 LTLFireability.xml
-rw-r--r-- 1 mcc users 18K Apr 13 01:27 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 127K Apr 13 01:27 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 97K Apr 13 01:26 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 417K Apr 13 01:26 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.4K Apr 22 14:29 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.1K Apr 22 14:29 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 10 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 223K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-00
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-01
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-02
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-03
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-04
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-05
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-06
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-07
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-08
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-09
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-10
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-11
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-12
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-13
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-14
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-15

=== Now, execution of the tool begins

BK_START 1716629977758

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=gold2023
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=BridgeAndVehicles-PT-V10P10N10
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2024-05-25 09:39:40] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2024-05-25 09:39:40] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-25 09:39:40] [INFO ] Load time of PNML (sax parser for PT used): 81 ms
[2024-05-25 09:39:40] [INFO ] Transformed 48 places.
[2024-05-25 09:39:40] [INFO ] Transformed 288 transitions.
[2024-05-25 09:39:40] [INFO ] Parsed PT model containing 48 places and 288 transitions and 2090 arcs in 217 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 38 ms.
Working with output stream class java.io.PrintStream
Incomplete random walk after 10000 steps, including 111 resets, run finished after 598 ms. (steps per millisecond=16 ) properties (out of 16) seen :3
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-12 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-10 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-03 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10000 steps, including 45 resets, run finished after 129 ms. (steps per millisecond=77 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 45 resets, run finished after 119 ms. (steps per millisecond=84 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 38 resets, run finished after 103 ms. (steps per millisecond=97 ) properties (out of 13) seen :1
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-02 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10000 steps, including 41 resets, run finished after 154 ms. (steps per millisecond=64 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 36 resets, run finished after 214 ms. (steps per millisecond=46 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 42 resets, run finished after 119 ms. (steps per millisecond=84 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10000 steps, including 48 resets, run finished after 119 ms. (steps per millisecond=84 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10000 steps, including 37 resets, run finished after 252 ms. (steps per millisecond=39 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10000 steps, including 36 resets, run finished after 156 ms. (steps per millisecond=64 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 42 resets, run finished after 165 ms. (steps per millisecond=60 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10000 steps, including 41 resets, run finished after 190 ms. (steps per millisecond=52 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 46 resets, run finished after 222 ms. (steps per millisecond=45 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 42 resets, run finished after 153 ms. (steps per millisecond=65 ) properties (out of 12) seen :0
Running SMT prover for 12 properties.
[2024-05-25 09:39:43] [INFO ] Flow matrix only has 90 transitions (discarded 198 similar events)
// Phase 1: matrix 90 rows 48 cols
[2024-05-25 09:39:43] [INFO ] Computed 7 invariants in 6 ms
[2024-05-25 09:39:43] [INFO ] [Real]Absence check using 7 positive place invariants in 4 ms returned sat
[2024-05-25 09:39:43] [INFO ] After 602ms SMT Verify possible using all constraints in real domain returned unsat :6 sat :0 real:6
[2024-05-25 09:39:44] [INFO ] [Nat]Absence check using 7 positive place invariants in 2 ms returned sat
[2024-05-25 09:39:44] [INFO ] After 142ms SMT Verify possible using all constraints in natural domain returned unsat :12 sat :0
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-15 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-14 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-13 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-11 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-09 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-08 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-07 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-06 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-05 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-04 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-01 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-00 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 12 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
All properties solved without resorting to model-checking.
Total runtime 4017 ms.
starting LoLA
BK_INPUT BridgeAndVehicles-PT-V10P10N10
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1716629996527

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ perl -pe 's/.*\.//g'
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 16 (type CNST) for 15 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-05
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 16 (type CNST) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-05
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 56 (type EXCL) for 33 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-11
lola: time limit : 240 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 52 (type FNDP) for 33 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type EQUN) for 33 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 55 (type SRCH) for 33 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-53.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 55 (type SRCH) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-11
lola: result : false
lola: markings : 250982
lola: fired transitions : 777053
lola: time used : 5.000000
lola: memory pages used : 1
lola: CANCELED task # 52 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-11 (obsolete)
lola: CANCELED task # 53 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-11 (obsolete)
lola: CANCELED task # 56 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-11 (obsolete)
lola: LAUNCH task # 146 (type EXCL) for 27 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-09
lola: time limit : 256 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 127 (type FNDP) for 24 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 128 (type EQUN) for 24 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 130 (type SRCH) for 24 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 53 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-11
lola: result : unknown
lola: FINISHED task # 52 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-11
lola: result : unknown
lola: fired transitions : 167262
lola: tried executions : 2520
lola: time used : 5.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-128.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-05: INITIAL true preprocessing
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-11: AG true tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-00: AG 0 5 0 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-01: EF 0 5 0 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-02: AG 0 5 0 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-03: EF 0 5 0 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-04: AG 0 5 0 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-06: EF 0 5 0 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-07: AG 0 5 0 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-08: AG 0 2 3 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-09: AG 0 4 1 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-10: AG 0 5 0 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-12: EF 0 5 0 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-13: EF 0 5 0 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-14: AG 0 5 0 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-15: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
127 EF FNDP 0/189 0/5 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-08 19305 t fired, 250 attempts, .
128 EF STEQ 0/189 0/5 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-08 sara is running.
130 EF SRCH 0/199 1/5 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-08 32793 m, 6558 m/sec, 93310 t fired, .
146 EF EXCL 0/256 1/32 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-09 17705 m, 3541 m/sec, 34738 t fired, .

Time elapsed: 5 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 130 (type SRCH) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-08
lola: result : false
lola: markings : 164516
lola: fired transitions : 497956
lola: time used : 3.000000
lola: memory pages used : 1
lola: CANCELED task # 127 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-08 (obsolete)
lola: CANCELED task # 128 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-08 (obsolete)
lola: LAUNCH task # 67 (type FNDP) for 42 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 68 (type EQUN) for 42 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 70 (type SRCH) for 42 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 127 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-08
lola: result : unknown
lola: fired transitions : 230153
lola: tried executions : 2991
lola: time used : 3.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 128 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-08
lola: result : unknown
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-68.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 68 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-14
lola: result : false
lola: CANCELED task # 67 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-14 (obsolete)
lola: CANCELED task # 70 (type SRCH) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-14 (obsolete)
lola: LAUNCH task # 60 (type FNDP) for 36 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type EQUN) for 36 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 63 (type SRCH) for 36 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 67 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-14
lola: result : unknown
lola: fired transitions : 45463
lola: tried executions : 615
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 60 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-12
lola: result : true
lola: fired transitions : 103
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 61 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-12 (obsolete)
lola: CANCELED task # 63 (type SRCH) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-12 (obsolete)
lola: LAUNCH task # 83 (type FNDP) for 3 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 84 (type EQUN) for 3 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 86 (type SRCH) for 3 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-61.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-84.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 84 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-01
lola: result : false
lola: CANCELED task # 83 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-01 (obsolete)
lola: CANCELED task # 86 (type SRCH) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-01 (obsolete)
lola: LAUNCH task # 134 (type FNDP) for 30 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 135 (type EQUN) for 30 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 137 (type SRCH) for 30 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 83 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-01
lola: result : unknown
lola: fired transitions : 3005
lola: tried executions : 32
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 146 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-09
lola: result : false
lola: markings : 54854
lola: fired transitions : 111745
lola: time used : 4.000000
lola: memory pages used : 1
lola: FINISHED task # 134 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-10
lola: result : true
lola: fired transitions : 30
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 135 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-10 (obsolete)
lola: CANCELED task # 137 (type SRCH) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-10 (obsolete)
lola: LAUNCH task # 93 (type EXCL) for 21 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-07
lola: time limit : 448 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 95 (type FNDP) for 39 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 96 (type EQUN) for 39 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 98 (type SRCH) for 39 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-135.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-96.sara.
sara: place or transition ordering is non-deterministic

sara: place or transition ordering is non-deterministic
lola: FINISHED task # 96 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-13
lola: result : false
lola: CANCELED task # 95 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-13 (obsolete)
lola: CANCELED task # 98 (type SRCH) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-13 (obsolete)
lola: LAUNCH task # 115 (type FNDP) for 12 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 116 (type EQUN) for 12 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 120 (type SRCH) for 12 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 95 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-13
lola: result : unknown
lola: fired transitions : 3784
lola: tried executions : 126
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-116.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 116 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-04
lola: result : false
lola: CANCELED task # 115 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-04 (obsolete)
lola: CANCELED task # 120 (type SRCH) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-04 (obsolete)
lola: LAUNCH task # 119 (type FNDP) for 9 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 122 (type EQUN) for 9 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 124 (type SRCH) for 9 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 115 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-04
lola: result : unknown
lola: fired transitions : 8296
lola: tried executions : 94
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-122.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-01: EF false state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-04: AG true state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-05: INITIAL true preprocessing
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-08: AG true tandem / insertion
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-09: AG true tandem / relaxed
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-10: AG false findpath
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-11: AG true tandem / insertion
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-12: EF true findpath
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-13: EF false state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-14: AG true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-00: AG 0 5 0 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-02: AG 0 5 0 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-03: EF 0 2 3 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-06: EF 0 5 0 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-07: AG 0 4 1 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-15: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
93 EF EXCL 1/598 1/32 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-07 22210 m, 4442 m/sec, 37209 t fired, .
119 EF FNDP 0/448 0/5 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-03 --
122 EF STEQ 0/448 0/5 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-03 sara is running.
124 EF SRCH 0/448 1/5 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-03 29 m, 5 m/sec, 28 t fired, .

Time elapsed: 10 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 119 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-03
lola: result : true
lola: fired transitions : 30
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 122 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-03 (obsolete)
lola: CANCELED task # 124 (type SRCH) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-03 (obsolete)
lola: LAUNCH task # 76 (type FNDP) for 45 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 79 (type EQUN) for 45 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 81 (type SRCH) for 45 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 122 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-03
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-79.sara.
lola: result : unknown
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 79 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-15
lola: result : false
lola: CANCELED task # 76 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-15 (obsolete)
lola: CANCELED task # 81 (type SRCH) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-15 (obsolete)
lola: LAUNCH task # 100 (type FNDP) for 0 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 103 (type EQUN) for 0 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 106 (type SRCH) for 0 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 76 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-15
lola: result : unknown
lola: fired transitions : 6453
lola: tried executions : 158
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-103.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 103 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-00
lola: result : false
lola: CANCELED task # 100 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-00 (obsolete)
lola: CANCELED task # 106 (type SRCH) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-00 (obsolete)
lola: LAUNCH task # 102 (type FNDP) for 18 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 109 (type EQUN) for 18 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 111 (type SRCH) for 18 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 100 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-00
lola: result : unknown
lola: fired transitions : 14931
lola: tried executions : 217
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-109.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 109 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-06
lola: result : false
lola: CANCELED task # 102 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-06 (obsolete)
lola: CANCELED task # 111 (type SRCH) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-06 (obsolete)
lola: LAUNCH task # 49 (type FNDP) for 6 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type EQUN) for 6 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SRCH) for 6 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 59 (type SRCH) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-02
lola: result : true
lola: markings : 20
lola: fired transitions : 19
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 49 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-02 (obsolete)
lola: CANCELED task # 51 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-02 (obsolete)
lola: LAUNCH task # 89 (type FNDP) for 21 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-51.sara.
lola: LAUNCH task # 90 (type EQUN) for 21 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: place or transition ordering is non-deterministic
lola: LAUNCH task # 92 (type SRCH) for 21 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 102 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-06
lola: result : unknown
lola: fired transitions : 14307
lola: tried executions : 199
lola: time used : 1.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-90.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 49 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-02
lola: result : true
lola: fired transitions : 18
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 90 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-07
lola: result : false
lola: CANCELED task # 89 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-07 (obsolete)
lola: CANCELED task # 92 (type SRCH) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-07 (obsolete)
lola: CANCELED task # 93 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-07 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-00: AG true state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-01: EF false state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-02: AG false tandem / insertion
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-03: EF true findpath
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-04: AG true state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-05: INITIAL true preprocessing
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-06: EF false state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-07: AG true state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-08: AG true tandem / insertion
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-09: AG true tandem / relaxed
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-10: AG false findpath
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-11: AG true tandem / insertion
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-12: EF true findpath
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-13: EF false state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-14: AG true state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-2024-15: AG true state equation


Time elapsed: 12 secs. Pages in use: 3

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-PT-V10P10N10"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="gold2023"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool gold2023"
echo " Input is BridgeAndVehicles-PT-V10P10N10, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r065-tajo-171620414400109"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-PT-V10P10N10.tgz
mv BridgeAndVehicles-PT-V10P10N10 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;