fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r049-tajo-171620400500294
Last Updated
July 7, 2024

About the Execution of LoLA for BridgeAndVehicles-PT-V80P20N50

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
4158.787 64491.00 76699.00 35.00 FFTTTTFTFTTFTFTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2024-input.r049-tajo-171620400500294.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2024-input.qcow2' backing_fmt='qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
...............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is BridgeAndVehicles-PT-V80P20N50, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r049-tajo-171620400500294
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 17M
-rw-r--r-- 1 mcc users 21K Apr 13 02:49 CTLCardinality.txt
-rw-r--r-- 1 mcc users 120K Apr 13 02:49 CTLCardinality.xml
-rw-r--r-- 1 mcc users 687K Apr 13 02:35 CTLFireability.txt
-rw-r--r-- 1 mcc users 2.7M Apr 13 02:35 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 21K Apr 22 14:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 77K Apr 22 14:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 562K Apr 22 14:30 LTLFireability.txt
-rw-r--r-- 1 mcc users 1.6M Apr 22 14:30 LTLFireability.xml
-rw-r--r-- 1 mcc users 33K Apr 13 05:52 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 180K Apr 13 05:52 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 850K Apr 13 05:43 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 3.0M Apr 13 05:43 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 3.4K Apr 22 14:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 7.1K Apr 22 14:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 10 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 7.1M May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-00
FORMULA_NAME BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-01
FORMULA_NAME BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-02
FORMULA_NAME BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-03
FORMULA_NAME BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-04
FORMULA_NAME BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-05
FORMULA_NAME BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-06
FORMULA_NAME BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-07
FORMULA_NAME BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-08
FORMULA_NAME BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-09
FORMULA_NAME BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-10
FORMULA_NAME BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-11
FORMULA_NAME BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-12
FORMULA_NAME BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-13
FORMULA_NAME BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-14
FORMULA_NAME BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-15

=== Now, execution of the tool begins

BK_START 1717016618210

FORMULA BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[lola] FINAL RESULTS
[lola]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing
[lola] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-01: AG false state space
[lola] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing
[lola] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-03: INITIAL true preprocessing
[lola] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-04: INITIAL true preprocessing
[lola] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-05: INITIAL true preprocessing
[lola] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing
[lola] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-07: INITIAL true preprocessing
[lola] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-08: INITIAL false preprocessing
[lola] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-09: INITIAL true preprocessing
[lola] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-10: INITIAL true preprocessing
[lola] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-11: INITIAL false preprocessing
[lola] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-12: AG true state equation
[lola] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-13: INITIAL false preprocessing
[lola] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-14: INITIAL true preprocessing
[lola] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-15: AG false state equation
[lola]
[lola] Time elapsed: 64 secs. Pages in use: 1

BK_STOP 1717016682701

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from ReachabilityCardinality.xml
[lola][I] Rule S: 0 transitions removed,0 places removed
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-00: INITIAL 0 0 0 0 0 0 0 0
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-01: AG 0 0 0 0 1 0 0 0
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-02: INITIAL 0 0 0 0 0 0 0 0
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-03: INITIAL 0 0 0 0 0 0 0 0
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-04: INITIAL 0 0 0 0 0 0 0 0
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-05: INITIAL 0 0 0 0 0 0 0 0
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-06: INITIAL 0 0 0 0 0 0 0 0
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-07: INITIAL 0 0 0 0 0 0 0 0
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-08: INITIAL 0 0 0 0 0 0 0 0
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-09: INITIAL 0 0 0 0 0 0 0 0
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-10: INITIAL 0 0 0 0 0 0 0 0
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-11: INITIAL 0 0 0 0 0 0 0 0
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-12: AG 0 0 0 0 1 0 0 0
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-13: INITIAL 0 0 0 0 0 0 0 0
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-14: INITIAL 0 0 0 0 0 0 0 0
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-15: AG 0 0 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.]
[lola][.] Time elapsed: 58 secs. Pages in use: 0
[lola][.] # running tasks: 0 of 4. Visible: 16
[lola][I] LAUNCH task # 22 (type CNST) for 21 BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-07
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] LAUNCH task # 28 (type CNST) for 27 BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-09
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] LAUNCH task # 10 (type CNST) for 9 BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-03
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] LAUNCH task # 25 (type CNST) for 24 BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-08
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] LAUNCH task # 1 (type CNST) for 0 BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-00
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] LAUNCH task # 19 (type CNST) for 18 BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-06
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] LAUNCH task # 13 (type CNST) for 12 BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-04
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 22 (type CNST) for BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-07
[lola][I] result : true
[lola][I] FINISHED task # 1 (type CNST) for BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-00
[lola][I] result : false
[lola][I] FINISHED task # 10 (type CNST) for BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-03
[lola][I] result : true
[lola][I] FINISHED task # 25 (type CNST) for BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-08
[lola][I] result : false
[lola][I] FINISHED task # 19 (type CNST) for BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-06
[lola][I] result : false
[lola][I] FINISHED task # 13 (type CNST) for BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-04
[lola][I] result : true
[lola][I] LAUNCH task # 34 (type CNST) for 33 BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-11
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 28 (type CNST) for BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-09
[lola][I] result : true
[lola][I] FINISHED task # 34 (type CNST) for BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-11
[lola][I] result : false
[lola][I] LAUNCH task # 40 (type CNST) for 39 BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-13
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 40 (type CNST) for BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-13
[lola][I] result : false
[lola][I] LAUNCH task # 7 (type CNST) for 6 BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-02
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 7 (type CNST) for BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-02
[lola][I] result : true
[lola][I] LAUNCH task # 16 (type CNST) for 15 BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-05
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] LAUNCH task # 31 (type CNST) for 30 BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-10
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 31 (type CNST) for BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-10
[lola][I] result : true
[lola][I] LAUNCH task # 43 (type CNST) for 42 BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-14
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 16 (type CNST) for BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-05
[lola][I] result : true
[lola][I] FINISHED task # 43 (type CNST) for BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-14
[lola][I] result : true
[lola][I] LAUNCH task # 51 (type EXCL) for 3 BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-01
[lola][I] time limit : 1179 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 49 (type FNDP) for 3 BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-01
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 50 (type EQUN) for 3 BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-01
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 51 (type EXCL) for BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-01
[lola][I] result : true
[lola][I] markings : 185
[lola][I] fired transitions : 184
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][W] CANCELED task # 49 (type FNDP) for BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-01 (obsolete)
[lola][W] CANCELED task # 50 (type EQUN) for BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-01 (obsolete)
[lola][I] FINISHED task # 49 (type FNDP) for BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-01
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][I] FINISHED task # 50 (type EQUN) for BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-01
[lola][I] result : unknown
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-01: AG false state space
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-03: INITIAL true preprocessing
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-04: INITIAL true preprocessing
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-05: INITIAL true preprocessing
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-07: INITIAL true preprocessing
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-08: INITIAL false preprocessing
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-09: INITIAL true preprocessing
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-10: INITIAL true preprocessing
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-11: INITIAL false preprocessing
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-13: INITIAL false preprocessing
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-14: INITIAL true preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-12: AG 0 0 0 0 1 0 0 0
[lola][.] BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-15: AG 0 0 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.]
[lola][.] Time elapsed: 63 secs. Pages in use: 1
[lola][.] # running tasks: 0 of 4. Visible: 16
[lola][I] LAUNCH task # 55 (type EXCL) for 45 BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-15
[lola][I] time limit : 1768 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 53 (type FNDP) for 45 BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-15
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 54 (type EQUN) for 45 BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-15
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 54 (type EQUN) for BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-15
[lola][I] result : true
[lola][W] CANCELED task # 53 (type FNDP) for BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-15 (obsolete)
[lola][W] CANCELED task # 55 (type EXCL) for BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-15 (obsolete)
[lola][I] FINISHED task # 53 (type FNDP) for BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-15
[lola][I] result : unknown
[lola][I] tried executions : 2
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][I] LAUNCH task # 59 (type EXCL) for 36 BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-12
[lola][I] time limit : 3537 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 57 (type FNDP) for 36 BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-12
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 58 (type EQUN) for 36 BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-12
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 58 (type EQUN) for BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-12
[lola][I] result : false
[lola][W] CANCELED task # 57 (type FNDP) for BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-12 (obsolete)
[lola][W] CANCELED task # 59 (type EXCL) for BridgeAndVehicles-PT-V80P20N50-ReachabilityCardinality-2024-12 (obsolete)
[lola][I] Portfolio finished: no open formulas

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-PT-V80P20N50"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is BridgeAndVehicles-PT-V80P20N50, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r049-tajo-171620400500294"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-PT-V80P20N50.tgz
mv BridgeAndVehicles-PT-V80P20N50 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;