About the Execution of LoLA for BridgeAndVehicles-PT-V20P20N50
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 2297.323 | 493595.00 | 1396022.00 | 104.50 | FFTFTFFFFFFTFTTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2024-input.r049-tajo-171620400300222.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2024-input.qcow2' backing_fmt='qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is BridgeAndVehicles-PT-V20P20N50, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r049-tajo-171620400300222
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 11M
-rw-r--r-- 1 mcc users 9.6K Apr 13 02:33 CTLCardinality.txt
-rw-r--r-- 1 mcc users 71K Apr 13 02:33 CTLCardinality.xml
-rw-r--r-- 1 mcc users 435K Apr 13 02:28 CTLFireability.txt
-rw-r--r-- 1 mcc users 1.7M Apr 13 02:28 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 11K Apr 22 14:29 LTLCardinality.txt
-rw-r--r-- 1 mcc users 48K Apr 22 14:29 LTLCardinality.xml
-rw-r--r-- 1 mcc users 256K Apr 22 14:29 LTLFireability.txt
-rw-r--r-- 1 mcc users 787K Apr 22 14:29 LTLFireability.xml
-rw-r--r-- 1 mcc users 29K Apr 13 04:00 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 213K Apr 13 04:00 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 1.1M Apr 13 03:55 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 4.3M Apr 13 03:55 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.3K Apr 22 14:29 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.8K Apr 22 14:29 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 10 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 1.9M May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00
FORMULA_NAME BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01
FORMULA_NAME BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02
FORMULA_NAME BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03
FORMULA_NAME BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04
FORMULA_NAME BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05
FORMULA_NAME BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06
FORMULA_NAME BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07
FORMULA_NAME BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08
FORMULA_NAME BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09
FORMULA_NAME BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10
FORMULA_NAME BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11
FORMULA_NAME BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12
FORMULA_NAME BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13
FORMULA_NAME BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14
FORMULA_NAME BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15
=== Now, execution of the tool begins
BK_START 1717010647175
FORMULA BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF false state space[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG true state space[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 493 secs. Pages in use: 34
BK_STOP 1717011140770
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mReachabilityCardinality.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 22 (type CNST) for 21 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 10 (type CNST) for 9 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 19 (type CNST) for 18 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 19 (type CNST) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 34 (type CNST) for 33 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 37 (type CNST) for 36 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 37 (type CNST) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 22 (type CNST) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 7 (type CNST) for 6 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 34 (type CNST) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 10 (type CNST) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 7 (type CNST) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 4 (type CNST) for 3 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 31 (type CNST) for 30 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 46 (type CNST) for 45 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 16 (type CNST) for 15 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 31 (type CNST) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 1 (type CNST) for 0 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 46 (type CNST) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 16 (type CNST) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 4 (type CNST) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 1 (type CNST) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 51 (type EXCL) for 24 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08
[[35mlola[0m][I] time limit : 717 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 49 (type FNDP) for 24 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 50 (type EQUN) for 24 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 51 (type EXCL) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 43
[[35mlola[0m][I] fired transitions : 42
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 49 (type FNDP) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08 (obsolete)
[[35mlola[0m][W] CANCELED task # 50 (type EQUN) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08 (obsolete)
[[35mlola[0m][I] FINISHED task # 49 (type FNDP) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] LAUNCH task # 55 (type EXCL) for 39 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13
[[35mlola[0m][I] time limit : 896 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 53 (type FNDP) for 39 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 54 (type EQUN) for 39 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 56 (type FNDP) for 27 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 54 (type EQUN) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13
[[35mlola[0m][I] result : false
[[35mlola[0m][W] CANCELED task # 53 (type FNDP) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13 (obsolete)
[[35mlola[0m][W] CANCELED task # 55 (type EXCL) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13 (obsolete)
[[35mlola[0m][I] LAUNCH task # 58 (type EXCL) for 27 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09
[[35mlola[0m][I] time limit : 1194 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 57 (type EQUN) for 27 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 59 (type FNDP) for 12 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 53 (type FNDP) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] tried executions : 24
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 59 (type FNDP) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] LAUNCH task # 63 (type FNDP) for 42 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 57 (type EQUN) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] LAUNCH task # 64 (type EQUN) for 42 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 64 (type EQUN) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 50 (type EQUN) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 4/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 123 attempts, .
[[35mlola[0m][.] 58 EF EXCL 3/1792 1/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 19317 m, 3863 m/sec, 47501 t fired, .
[[35mlola[0m][.] 63 EF FNDP 3/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 125 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 19 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 9/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 926 attempts, .
[[35mlola[0m][.] 58 EF EXCL 8/1792 1/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 119487 m, 20034 m/sec, 336436 t fired, .
[[35mlola[0m][.] 63 EF FNDP 8/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 775 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 24 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 14/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 1668 attempts, .
[[35mlola[0m][.] 58 EF EXCL 13/1792 1/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 238555 m, 23813 m/sec, 695018 t fired, .
[[35mlola[0m][.] 63 EF FNDP 13/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 1411 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 29 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 19/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 2481 attempts, .
[[35mlola[0m][.] 58 EF EXCL 18/1792 2/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 331572 m, 18603 m/sec, 979027 t fired, .
[[35mlola[0m][.] 63 EF FNDP 18/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 2238 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 34 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 24/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 3007 attempts, .
[[35mlola[0m][.] 58 EF EXCL 23/1792 2/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 392406 m, 12166 m/sec, 1160644 t fired, .
[[35mlola[0m][.] 63 EF FNDP 23/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 3061 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 39 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 29/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 3562 attempts, .
[[35mlola[0m][.] 58 EF EXCL 28/1792 2/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 479208 m, 17360 m/sec, 1430641 t fired, .
[[35mlola[0m][.] 63 EF FNDP 28/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 3695 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 44 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 34/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 4225 attempts, .
[[35mlola[0m][.] 58 EF EXCL 33/1792 3/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 601772 m, 24512 m/sec, 1807687 t fired, .
[[35mlola[0m][.] 63 EF FNDP 33/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 4159 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 49 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 39/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 5290 attempts, .
[[35mlola[0m][.] 58 EF EXCL 38/1792 3/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 721222 m, 23890 m/sec, 2182036 t fired, .
[[35mlola[0m][.] 63 EF FNDP 38/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 4983 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 54 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 44/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 6298 attempts, .
[[35mlola[0m][.] 58 EF EXCL 43/1792 4/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 840469 m, 23849 m/sec, 2556354 t fired, .
[[35mlola[0m][.] 63 EF FNDP 43/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 5810 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 59 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 49/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 7247 attempts, .
[[35mlola[0m][.] 58 EF EXCL 48/1792 4/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 963715 m, 24649 m/sec, 2948281 t fired, .
[[35mlola[0m][.] 63 EF FNDP 48/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 6507 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 64 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 54/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 8084 attempts, .
[[35mlola[0m][.] 58 EF EXCL 53/1792 4/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 1086733 m, 24603 m/sec, 3335304 t fired, .
[[35mlola[0m][.] 63 EF FNDP 53/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 7103 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 69 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 59/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 9143 attempts, .
[[35mlola[0m][.] 58 EF EXCL 58/1792 5/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 1207414 m, 24136 m/sec, 3724495 t fired, .
[[35mlola[0m][.] 63 EF FNDP 58/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 7928 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 74 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 64/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 10143 attempts, .
[[35mlola[0m][.] 58 EF EXCL 63/1792 5/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 1330559 m, 24629 m/sec, 4107959 t fired, .
[[35mlola[0m][.] 63 EF FNDP 63/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 8751 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 79 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 69/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 11195 attempts, .
[[35mlola[0m][.] 58 EF EXCL 68/1792 6/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 1455140 m, 24916 m/sec, 4489121 t fired, .
[[35mlola[0m][.] 63 EF FNDP 68/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 9578 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 84 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 74/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 12137 attempts, .
[[35mlola[0m][.] 58 EF EXCL 73/1792 6/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 1569921 m, 22956 m/sec, 4862536 t fired, .
[[35mlola[0m][.] 63 EF FNDP 73/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 10300 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 89 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 79/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 13182 attempts, .
[[35mlola[0m][.] 58 EF EXCL 78/1792 7/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 1694444 m, 24904 m/sec, 5256700 t fired, .
[[35mlola[0m][.] 63 EF FNDP 78/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 11123 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 94 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 84/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 13922 attempts, .
[[35mlola[0m][.] 58 EF EXCL 83/1792 7/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 1791716 m, 19454 m/sec, 5585937 t fired, .
[[35mlola[0m][.] 63 EF FNDP 83/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 11869 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 99 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 89/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 14878 attempts, .
[[35mlola[0m][.] 58 EF EXCL 88/1792 7/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 1909851 m, 23627 m/sec, 5957049 t fired, .
[[35mlola[0m][.] 63 EF FNDP 88/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 12648 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 104 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 94/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 15909 attempts, .
[[35mlola[0m][.] 58 EF EXCL 93/1792 8/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 2025278 m, 23085 m/sec, 6313196 t fired, .
[[35mlola[0m][.] 63 EF FNDP 93/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 13406 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 109 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 99/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 16954 attempts, .
[[35mlola[0m][.] 58 EF EXCL 98/1792 8/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 2138789 m, 22702 m/sec, 6699976 t fired, .
[[35mlola[0m][.] 63 EF FNDP 98/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 14212 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 114 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 104/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 18017 attempts, .
[[35mlola[0m][.] 58 EF EXCL 103/1792 9/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 2251057 m, 22453 m/sec, 7053034 t fired, .
[[35mlola[0m][.] 63 EF FNDP 103/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 15008 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 119 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 109/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 19097 attempts, .
[[35mlola[0m][.] 58 EF EXCL 108/1792 9/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 2375608 m, 24910 m/sec, 7415782 t fired, .
[[35mlola[0m][.] 63 EF FNDP 108/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 15812 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 124 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 114/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 20173 attempts, .
[[35mlola[0m][.] 58 EF EXCL 113/1792 10/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 2490910 m, 23060 m/sec, 7792243 t fired, .
[[35mlola[0m][.] 63 EF FNDP 113/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 16623 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 129 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 119/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 21244 attempts, .
[[35mlola[0m][.] 58 EF EXCL 118/1792 10/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 2605840 m, 22986 m/sec, 8169493 t fired, .
[[35mlola[0m][.] 63 EF FNDP 118/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 17450 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 134 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 124/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 22306 attempts, .
[[35mlola[0m][.] 58 EF EXCL 123/1792 10/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 2721143 m, 23060 m/sec, 8545819 t fired, .
[[35mlola[0m][.] 63 EF FNDP 123/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 18275 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 139 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 129/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 23369 attempts, .
[[35mlola[0m][.] 58 EF EXCL 128/1792 11/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 2853456 m, 26462 m/sec, 8968601 t fired, .
[[35mlola[0m][.] 63 EF FNDP 128/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 19097 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 144 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 134/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 24430 attempts, .
[[35mlola[0m][.] 58 EF EXCL 133/1792 11/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 2976312 m, 24571 m/sec, 9392608 t fired, .
[[35mlola[0m][.] 63 EF FNDP 133/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 19923 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 149 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 139/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 25497 attempts, .
[[35mlola[0m][.] 58 EF EXCL 138/1792 12/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 3097436 m, 24224 m/sec, 9791812 t fired, .
[[35mlola[0m][.] 63 EF FNDP 138/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 20749 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 154 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 144/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 26558 attempts, .
[[35mlola[0m][.] 58 EF EXCL 143/1792 12/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 3220770 m, 24666 m/sec, 10182367 t fired, .
[[35mlola[0m][.] 63 EF FNDP 143/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 21575 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 159 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 149/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 27642 attempts, .
[[35mlola[0m][.] 58 EF EXCL 148/1792 13/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 3343660 m, 24578 m/sec, 10555795 t fired, .
[[35mlola[0m][.] 63 EF FNDP 148/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 22399 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 164 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 154/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 28712 attempts, .
[[35mlola[0m][.] 58 EF EXCL 153/1792 13/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 3466027 m, 24473 m/sec, 10975092 t fired, .
[[35mlola[0m][.] 63 EF FNDP 153/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 23223 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 169 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 159/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 29688 attempts, .
[[35mlola[0m][.] 58 EF EXCL 158/1792 13/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 3572334 m, 21261 m/sec, 11337919 t fired, .
[[35mlola[0m][.] 63 EF FNDP 158/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 23988 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 174 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 164/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 30755 attempts, .
[[35mlola[0m][.] 58 EF EXCL 163/1792 14/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 3692440 m, 24021 m/sec, 11716671 t fired, .
[[35mlola[0m][.] 63 EF FNDP 163/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 24787 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 179 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 169/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 31759 attempts, .
[[35mlola[0m][.] 58 EF EXCL 168/1792 14/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 3801919 m, 21895 m/sec, 12061755 t fired, .
[[35mlola[0m][.] 63 EF FNDP 168/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 25562 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 184 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 174/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 32803 attempts, .
[[35mlola[0m][.] 58 EF EXCL 173/1792 15/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 3926803 m, 24976 m/sec, 12418414 t fired, .
[[35mlola[0m][.] 63 EF FNDP 173/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 26361 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 189 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 179/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 33786 attempts, .
[[35mlola[0m][.] 58 EF EXCL 178/1792 15/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 4041984 m, 23036 m/sec, 12797698 t fired, .
[[35mlola[0m][.] 63 EF FNDP 178/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 27153 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 194 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 184/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 34796 attempts, .
[[35mlola[0m][.] 58 EF EXCL 183/1792 16/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 4152192 m, 22041 m/sec, 13155001 t fired, .
[[35mlola[0m][.] 63 EF FNDP 183/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 27923 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 199 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 189/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 35818 attempts, .
[[35mlola[0m][.] 58 EF EXCL 188/1792 16/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 4258108 m, 21183 m/sec, 13505781 t fired, .
[[35mlola[0m][.] 63 EF FNDP 188/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 28702 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 204 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 194/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 36813 attempts, .
[[35mlola[0m][.] 58 EF EXCL 193/1792 16/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 4371945 m, 22767 m/sec, 13888165 t fired, .
[[35mlola[0m][.] 63 EF FNDP 193/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 29464 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 209 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 199/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 37883 attempts, .
[[35mlola[0m][.] 58 EF EXCL 198/1792 17/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 4493483 m, 24307 m/sec, 14257578 t fired, .
[[35mlola[0m][.] 63 EF FNDP 198/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 30292 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 214 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 204/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 38949 attempts, .
[[35mlola[0m][.] 58 EF EXCL 203/1792 17/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 4627918 m, 26887 m/sec, 14718281 t fired, .
[[35mlola[0m][.] 63 EF FNDP 203/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 31115 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 219 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 209/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 40028 attempts, .
[[35mlola[0m][.] 58 EF EXCL 208/1792 18/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 4747104 m, 23837 m/sec, 15141974 t fired, .
[[35mlola[0m][.] 63 EF FNDP 208/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 31940 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 224 secs. Pages in use: 18
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 214/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 41007 attempts, .
[[35mlola[0m][.] 58 EF EXCL 213/1792 18/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 4859268 m, 22432 m/sec, 15529402 t fired, .
[[35mlola[0m][.] 63 EF FNDP 213/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 32680 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 229 secs. Pages in use: 18
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 219/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 41982 attempts, .
[[35mlola[0m][.] 58 EF EXCL 218/1792 18/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 4976459 m, 23438 m/sec, 15925005 t fired, .
[[35mlola[0m][.] 63 EF FNDP 218/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 33481 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 234 secs. Pages in use: 18
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 224/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 42923 attempts, .
[[35mlola[0m][.] 58 EF EXCL 223/1792 19/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 5087955 m, 22299 m/sec, 16275459 t fired, .
[[35mlola[0m][.] 63 EF FNDP 223/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 34205 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 239 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 229/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 43974 attempts, .
[[35mlola[0m][.] 58 EF EXCL 228/1792 19/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 5201825 m, 22774 m/sec, 16635531 t fired, .
[[35mlola[0m][.] 63 EF FNDP 228/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 34998 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 244 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 234/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 44950 attempts, .
[[35mlola[0m][.] 58 EF EXCL 233/1792 20/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 5328204 m, 25275 m/sec, 17034668 t fired, .
[[35mlola[0m][.] 63 EF FNDP 233/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 35790 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 249 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 239/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 46023 attempts, .
[[35mlola[0m][.] 58 EF EXCL 238/1792 20/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 5458083 m, 25975 m/sec, 17462283 t fired, .
[[35mlola[0m][.] 63 EF FNDP 238/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 36614 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 254 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 244/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 47087 attempts, .
[[35mlola[0m][.] 58 EF EXCL 243/1792 21/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 5577110 m, 23805 m/sec, 17881608 t fired, .
[[35mlola[0m][.] 63 EF FNDP 243/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 37439 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 259 secs. Pages in use: 21
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 249/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 48154 attempts, .
[[35mlola[0m][.] 58 EF EXCL 248/1792 21/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 5698637 m, 24305 m/sec, 18299188 t fired, .
[[35mlola[0m][.] 63 EF FNDP 248/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 38265 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 264 secs. Pages in use: 21
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 254/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 49234 attempts, .
[[35mlola[0m][.] 58 EF EXCL 253/1792 21/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 5815367 m, 23346 m/sec, 18671355 t fired, .
[[35mlola[0m][.] 63 EF FNDP 253/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 39090 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 269 secs. Pages in use: 21
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 259/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 50309 attempts, .
[[35mlola[0m][.] 58 EF EXCL 258/1792 22/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 5939798 m, 24886 m/sec, 19064993 t fired, .
[[35mlola[0m][.] 63 EF FNDP 258/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 39914 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 274 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 264/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 51376 attempts, .
[[35mlola[0m][.] 58 EF EXCL 263/1792 22/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 6059262 m, 23892 m/sec, 19423378 t fired, .
[[35mlola[0m][.] 63 EF FNDP 263/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 40740 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 279 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 269/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 52456 attempts, .
[[35mlola[0m][.] 58 EF EXCL 268/1792 23/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 6183998 m, 24947 m/sec, 19781365 t fired, .
[[35mlola[0m][.] 63 EF FNDP 268/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 41560 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 284 secs. Pages in use: 23
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 274/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 53525 attempts, .
[[35mlola[0m][.] 58 EF EXCL 273/1792 23/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 6305049 m, 24210 m/sec, 20180811 t fired, .
[[35mlola[0m][.] 63 EF FNDP 273/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 42378 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 289 secs. Pages in use: 23
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 279/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 54602 attempts, .
[[35mlola[0m][.] 58 EF EXCL 278/1792 24/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 6426939 m, 24378 m/sec, 20579510 t fired, .
[[35mlola[0m][.] 63 EF FNDP 278/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 43202 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 294 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 284/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 55669 attempts, .
[[35mlola[0m][.] 58 EF EXCL 283/1792 24/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 6540509 m, 22714 m/sec, 20947134 t fired, .
[[35mlola[0m][.] 63 EF FNDP 283/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 44027 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 299 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 289/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 56719 attempts, .
[[35mlola[0m][.] 58 EF EXCL 288/1792 25/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 6657489 m, 23396 m/sec, 21333479 t fired, .
[[35mlola[0m][.] 63 EF FNDP 288/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 44835 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 304 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 294/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 57664 attempts, .
[[35mlola[0m][.] 58 EF EXCL 293/1792 25/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 6765237 m, 21549 m/sec, 21699103 t fired, .
[[35mlola[0m][.] 63 EF FNDP 293/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 45583 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 309 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 299/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 58711 attempts, .
[[35mlola[0m][.] 58 EF EXCL 298/1792 25/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 6885418 m, 24036 m/sec, 22109250 t fired, .
[[35mlola[0m][.] 63 EF FNDP 298/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 46388 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 314 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 304/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 59700 attempts, .
[[35mlola[0m][.] 58 EF EXCL 303/1792 26/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 6994570 m, 21830 m/sec, 22473596 t fired, .
[[35mlola[0m][.] 63 EF FNDP 303/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 47168 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 319 secs. Pages in use: 26
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 309/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 60772 attempts, .
[[35mlola[0m][.] 58 EF EXCL 308/1792 26/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 7125983 m, 26282 m/sec, 22871634 t fired, .
[[35mlola[0m][.] 63 EF FNDP 308/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 47990 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 324 secs. Pages in use: 26
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 314/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 61843 attempts, .
[[35mlola[0m][.] 58 EF EXCL 313/1792 27/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 7255593 m, 25922 m/sec, 23334574 t fired, .
[[35mlola[0m][.] 63 EF FNDP 313/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 48814 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 329 secs. Pages in use: 27
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 319/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 62917 attempts, .
[[35mlola[0m][.] 58 EF EXCL 318/1792 27/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 7385333 m, 25948 m/sec, 23799152 t fired, .
[[35mlola[0m][.] 63 EF FNDP 318/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 49639 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 334 secs. Pages in use: 27
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 324/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 63872 attempts, .
[[35mlola[0m][.] 58 EF EXCL 323/1792 27/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 7499357 m, 22804 m/sec, 24198316 t fired, .
[[35mlola[0m][.] 63 EF FNDP 323/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 50423 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 339 secs. Pages in use: 27
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 329/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 64922 attempts, .
[[35mlola[0m][.] 58 EF EXCL 328/1792 28/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 7623345 m, 24797 m/sec, 24622565 t fired, .
[[35mlola[0m][.] 63 EF FNDP 328/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 51241 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 344 secs. Pages in use: 28
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 334/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 65910 attempts, .
[[35mlola[0m][.] 58 EF EXCL 333/1792 28/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 7742465 m, 23824 m/sec, 25000794 t fired, .
[[35mlola[0m][.] 63 EF FNDP 333/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 52025 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 349 secs. Pages in use: 28
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 339/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 66887 attempts, .
[[35mlola[0m][.] 58 EF EXCL 338/1792 29/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 7867982 m, 25103 m/sec, 25398239 t fired, .
[[35mlola[0m][.] 63 EF FNDP 338/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 52841 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 354 secs. Pages in use: 29
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 344/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 67896 attempts, .
[[35mlola[0m][.] 58 EF EXCL 343/1792 29/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 7985211 m, 23445 m/sec, 25768726 t fired, .
[[35mlola[0m][.] 63 EF FNDP 343/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 53648 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 359 secs. Pages in use: 29
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 349/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 68955 attempts, .
[[35mlola[0m][.] 58 EF EXCL 348/1792 30/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 8103232 m, 23604 m/sec, 26164675 t fired, .
[[35mlola[0m][.] 63 EF FNDP 348/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 54470 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 364 secs. Pages in use: 30
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 354/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 70034 attempts, .
[[35mlola[0m][.] 58 EF EXCL 353/1792 30/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 8233231 m, 25999 m/sec, 26553524 t fired, .
[[35mlola[0m][.] 63 EF FNDP 353/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 55288 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 369 secs. Pages in use: 30
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 359/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 70983 attempts, .
[[35mlola[0m][.] 58 EF EXCL 358/1792 30/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 8350358 m, 23425 m/sec, 26969016 t fired, .
[[35mlola[0m][.] 63 EF FNDP 358/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 56026 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 374 secs. Pages in use: 30
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 364/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 72027 attempts, .
[[35mlola[0m][.] 58 EF EXCL 363/1792 31/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 8470816 m, 24091 m/sec, 27400301 t fired, .
[[35mlola[0m][.] 63 EF FNDP 363/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 56769 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 379 secs. Pages in use: 31
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 369/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 73031 attempts, .
[[35mlola[0m][.] 58 EF EXCL 368/1792 31/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 8587274 m, 23291 m/sec, 27815625 t fired, .
[[35mlola[0m][.] 63 EF FNDP 368/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 57531 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 384 secs. Pages in use: 31
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 374/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 73979 attempts, .
[[35mlola[0m][.] 58 EF EXCL 373/1792 32/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 8701691 m, 22883 m/sec, 28212160 t fired, .
[[35mlola[0m][.] 63 EF FNDP 373/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 58289 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 389 secs. Pages in use: 32
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 379/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 74968 attempts, .
[[35mlola[0m][.] 58 EF EXCL 378/1792 32/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 8817263 m, 23114 m/sec, 28603848 t fired, .
[[35mlola[0m][.] 63 EF FNDP 378/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 59073 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 394 secs. Pages in use: 32
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 384/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 75994 attempts, .
[[35mlola[0m][.] 58 EF EXCL 383/1792 33/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 8943057 m, 25158 m/sec, 28998594 t fired, .
[[35mlola[0m][.] 63 EF FNDP 383/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 59878 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 399 secs. Pages in use: 33
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 389/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 76991 attempts, .
[[35mlola[0m][.] 58 EF EXCL 388/1792 33/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 9063510 m, 24090 m/sec, 29379513 t fired, .
[[35mlola[0m][.] 63 EF FNDP 388/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 60670 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 404 secs. Pages in use: 33
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF 0 0 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 EF FNDP 394/3585 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 78068 attempts, .
[[35mlola[0m][.] 58 EF EXCL 393/1792 33/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 9184199 m, 24137 m/sec, 29757979 t fired, .
[[35mlola[0m][.] 63 EF FNDP 393/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 61488 attempts, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 409 secs. Pages in use: 33
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 58 (type EXCL) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 9219160
[[35mlola[0m][I] fired transitions : 29871321
[[35mlola[0m][I] time used : 394
[[35mlola[0m][I] memory pages used : 34
[[35mlola[0m][W] CANCELED task # 56 (type FNDP) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09 (obsolete)
[[35mlola[0m][I] LAUNCH task # 65 (type EXCL) for 42 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14
[[35mlola[0m][I] time limit : 3190 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 56 (type FNDP) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] tried executions : 78381
[[35mlola[0m][I] time used : 395
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 0 2 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 63 EF FNDP 398/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 62295 attempts, .
[[35mlola[0m][.] 65 EF EXCL 4/3190 1/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 60392 m, 12078 m/sec, 146260 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 414 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 0 2 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 63 EF FNDP 403/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 63106 attempts, .
[[35mlola[0m][.] 65 EF EXCL 9/3190 1/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 146294 m, 17180 m/sec, 370288 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 419 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 0 2 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 63 EF FNDP 408/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 63915 attempts, .
[[35mlola[0m][.] 65 EF EXCL 14/3190 1/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 233046 m, 17350 m/sec, 603943 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 424 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 0 2 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 63 EF FNDP 413/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 64730 attempts, .
[[35mlola[0m][.] 65 EF EXCL 19/3190 2/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 323763 m, 18143 m/sec, 845538 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 429 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 0 2 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 63 EF FNDP 418/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 65539 attempts, .
[[35mlola[0m][.] 65 EF EXCL 24/3190 2/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 413049 m, 17857 m/sec, 1088092 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 434 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 0 2 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 63 EF FNDP 423/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 66334 attempts, .
[[35mlola[0m][.] 65 EF EXCL 29/3190 2/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 499590 m, 17308 m/sec, 1322599 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 439 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 0 2 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 63 EF FNDP 428/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 67131 attempts, .
[[35mlola[0m][.] 65 EF EXCL 34/3190 3/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 587645 m, 17611 m/sec, 1561390 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 444 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 0 2 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 63 EF FNDP 433/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 67926 attempts, .
[[35mlola[0m][.] 65 EF EXCL 39/3190 3/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 672884 m, 17047 m/sec, 1791757 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 449 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 0 2 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 63 EF FNDP 438/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 68713 attempts, .
[[35mlola[0m][.] 65 EF EXCL 44/3190 3/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 758075 m, 17038 m/sec, 2021416 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 454 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 0 2 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 63 EF FNDP 443/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 69509 attempts, .
[[35mlola[0m][.] 65 EF EXCL 49/3190 3/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 844787 m, 17342 m/sec, 2264298 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 459 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 0 2 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 63 EF FNDP 448/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 70243 attempts, .
[[35mlola[0m][.] 65 EF EXCL 54/3190 4/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 930821 m, 17206 m/sec, 2497460 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 464 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 0 2 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 63 EF FNDP 453/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 71002 attempts, .
[[35mlola[0m][.] 65 EF EXCL 59/3190 4/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 1010931 m, 16022 m/sec, 2711733 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 469 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 0 2 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 63 EF FNDP 458/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 71765 attempts, .
[[35mlola[0m][.] 65 EF EXCL 64/3190 4/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 1096642 m, 17142 m/sec, 2952887 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 474 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 0 2 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 63 EF FNDP 463/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 72547 attempts, .
[[35mlola[0m][.] 65 EF EXCL 69/3190 5/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 1185112 m, 17694 m/sec, 3190913 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 479 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 0 2 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 63 EF FNDP 468/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 73336 attempts, .
[[35mlola[0m][.] 65 EF EXCL 74/3190 5/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 1268370 m, 16651 m/sec, 3423422 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 484 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-05: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-08: AG false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-09: EF false state space[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-12: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-13: AG true state equation[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14: AG 0 0 2 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 63 EF FNDP 473/3584 0/5 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 74125 attempts, .
[[35mlola[0m][.] 65 EF EXCL 79/3190 5/2000 BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 1366350 m, 19596 m/sec, 3690414 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 489 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 65 (type EXCL) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1435297
[[35mlola[0m][I] fired transitions : 3880965
[[35mlola[0m][I] time used : 83
[[35mlola[0m][I] memory pages used : 5
[[35mlola[0m][W] CANCELED task # 63 (type FNDP) for BridgeAndVehicles-PT-V20P20N50-ReachabilityCardinality-2024-14 (obsolete)
[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-PT-V20P20N50"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is BridgeAndVehicles-PT-V20P20N50, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r049-tajo-171620400300222"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-PT-V20P20N50.tgz
mv BridgeAndVehicles-PT-V20P20N50 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;