About the Execution of LoLA for BridgeAndVehicles-PT-V20P20N20
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 2996.936 | 254052.00 | 264084.00 | 42.70 | TTTFFTTTTFTFTTTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2024-input.r049-tajo-171620400300209.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2024-input.qcow2' backing_fmt='qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
..................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is BridgeAndVehicles-PT-V20P20N20, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r049-tajo-171620400300209
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 3.5M
-rw-r--r-- 1 mcc users 18K Apr 13 00:23 CTLCardinality.txt
-rw-r--r-- 1 mcc users 124K Apr 13 00:23 CTLCardinality.xml
-rw-r--r-- 1 mcc users 158K Apr 13 00:18 CTLFireability.txt
-rw-r--r-- 1 mcc users 632K Apr 13 00:18 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 7.3K Apr 22 14:29 LTLCardinality.txt
-rw-r--r-- 1 mcc users 34K Apr 22 14:29 LTLCardinality.xml
-rw-r--r-- 1 mcc users 44K Apr 22 14:29 LTLFireability.txt
-rw-r--r-- 1 mcc users 135K Apr 22 14:29 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Apr 13 00:51 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 96K Apr 13 00:51 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 284K Apr 13 00:48 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 1.1M Apr 13 00:48 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Apr 22 14:29 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Apr 22 14:29 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 10 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 790K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00
FORMULA_NAME BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01
FORMULA_NAME BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02
FORMULA_NAME BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03
FORMULA_NAME BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04
FORMULA_NAME BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05
FORMULA_NAME BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06
FORMULA_NAME BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07
FORMULA_NAME BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08
FORMULA_NAME BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09
FORMULA_NAME BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10
FORMULA_NAME BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11
FORMULA_NAME BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12
FORMULA_NAME BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13
FORMULA_NAME BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14
FORMULA_NAME BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15
=== Now, execution of the tool begins
BK_START 1717010269947
FORMULA BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG true CTL model checker[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 253 secs. Pages in use: 41
BK_STOP 1717010523999
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLCardinality.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 28 (type CNST) for 27 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 7 (type CNST) for 6 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 34 (type CNST) for 33 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 7 (type CNST) for BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 34 (type CNST) for BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 28 (type CNST) for BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 10 (type CNST) for 9 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 10 (type CNST) for BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00
[[35mlola[0m][I] time limit : 299 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1686
[[35mlola[0m][I] fired transitions : 3872
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01
[[35mlola[0m][I] time limit : 326 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 50 (type EQUN) for 39 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 50 (type EQUN) for BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 4/326 4/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01 865762 m, 173152 m/sec, 2406724 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 11 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 9/326 8/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01 1797592 m, 186366 m/sec, 6493114 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 16 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 14/326 11/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01 2522549 m, 144991 m/sec, 10748248 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 21 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 19/326 15/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01 3394715 m, 174433 m/sec, 14985169 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 26 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 24/326 18/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01 4244783 m, 170013 m/sec, 19282323 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 31 secs. Pages in use: 18
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 29/326 22/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01 5131039 m, 177251 m/sec, 23680892 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 36 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 4 (type EXCL) for BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 5680626
[[35mlola[0m][I] fired transitions : 26605389
[[35mlola[0m][I] time used : 32
[[35mlola[0m][I] memory pages used : 24
[[35mlola[0m][I] LAUNCH task # 48 (type EXCL) for 39 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13
[[35mlola[0m][I] time limit : 356 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 48 (type EXCL) for BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 15
[[35mlola[0m][I] fired transitions : 14
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 46 (type EXCL) for 45 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15
[[35mlola[0m][I] time limit : 395 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 46 (type EXCL) for BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 8546
[[35mlola[0m][I] fired transitions : 25643
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 43 (type EXCL) for 42 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14
[[35mlola[0m][I] time limit : 445 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 2/445 1/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14 151153 m, 30230 m/sec, 713597 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 41 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 7/445 4/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14 721151 m, 113999 m/sec, 3461357 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 46 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 12/445 6/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14 1270217 m, 109813 m/sec, 6184083 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 51 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 17/445 8/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14 1813573 m, 108671 m/sec, 8889895 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 56 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 22/445 11/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14 2343889 m, 106063 m/sec, 11578975 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 61 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 27/445 13/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14 2824440 m, 96110 m/sec, 14128629 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 66 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 32/445 15/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14 3279666 m, 91045 m/sec, 16552427 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 71 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 37/445 17/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14 3731046 m, 90276 m/sec, 18955029 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 76 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 42/445 19/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14 4175035 m, 88797 m/sec, 21342665 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 81 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 47/445 21/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14 4616447 m, 88282 m/sec, 23705023 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 86 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 52/445 23/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14 5062967 m, 89304 m/sec, 26078567 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 91 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 57/445 25/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14 5523994 m, 92205 m/sec, 28582068 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 96 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 62/445 27/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14 5991240 m, 93449 m/sec, 31052037 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 101 secs. Pages in use: 27
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 67/445 29/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14 6455359 m, 92823 m/sec, 33549454 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 106 secs. Pages in use: 29
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 72/445 31/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14 6962330 m, 101394 m/sec, 36255206 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 111 secs. Pages in use: 31
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 77/445 33/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14 7387191 m, 84972 m/sec, 38535835 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 116 secs. Pages in use: 33
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 82/445 34/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14 7650210 m, 52603 m/sec, 39925379 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 121 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 87/445 35/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14 7938860 m, 57730 m/sec, 41478421 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 126 secs. Pages in use: 35
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 92/445 37/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14 8402568 m, 92741 m/sec, 43965754 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 131 secs. Pages in use: 37
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 97/445 39/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14 8883560 m, 96198 m/sec, 46529181 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 136 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 102/445 41/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14 9383669 m, 100021 m/sec, 49237220 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 141 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 43 (type EXCL) for BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 9421236
[[35mlola[0m][I] fired transitions : 49444249
[[35mlola[0m][I] time used : 102
[[35mlola[0m][I] memory pages used : 41
[[35mlola[0m][I] LAUNCH task # 37 (type EXCL) for 36 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12
[[35mlola[0m][I] time limit : 494 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 5/494 3/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12 494339 m, 98867 m/sec, 1420921 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 146 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 10/494 5/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12 1027554 m, 106643 m/sec, 2993058 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 151 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 15/494 7/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12 1548186 m, 104126 m/sec, 4540664 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 156 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 20/494 10/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12 2068677 m, 104098 m/sec, 6106962 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 161 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 25/494 12/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12 2570124 m, 100289 m/sec, 7685000 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 166 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 30/494 14/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12 3123561 m, 110687 m/sec, 9450096 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 171 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 35/494 16/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12 3567190 m, 88725 m/sec, 10863506 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 176 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 40/494 18/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12 4058161 m, 98194 m/sec, 12443455 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 181 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 45/494 20/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12 4545874 m, 97542 m/sec, 14009207 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 186 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 50/494 23/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12 5076958 m, 106216 m/sec, 15738362 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 191 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 55/494 25/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12 5613343 m, 107277 m/sec, 17507593 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 196 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 60/494 27/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12 6135842 m, 104499 m/sec, 19197288 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 201 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 65/494 29/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12 6614856 m, 95802 m/sec, 20775024 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 206 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 70/494 31/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12 7071110 m, 91250 m/sec, 22281727 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 211 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 75/494 33/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12 7528336 m, 91445 m/sec, 23790600 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 216 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 CTL EXCL 80/494 35/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12 7982169 m, 90766 m/sec, 25301258 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 221 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 37 (type EXCL) for BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 8388107
[[35mlola[0m][I] fired transitions : 26676871
[[35mlola[0m][I] time used : 84
[[35mlola[0m][I] memory pages used : 37
[[35mlola[0m][I] LAUNCH task # 31 (type EXCL) for 30 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10
[[35mlola[0m][I] time limit : 562 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 31 (type EXCL) for BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 166
[[35mlola[0m][I] fired transitions : 493
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 25 (type EXCL) for 24 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08
[[35mlola[0m][I] time limit : 675 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 25 (type EXCL) for BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 174
[[35mlola[0m][I] fired transitions : 265
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 16 (type EXCL) for 15 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05
[[35mlola[0m][I] time limit : 843 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 16 (type EXCL) for BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 13 (type EXCL) for 12 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04
[[35mlola[0m][I] time limit : 1125 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 13 (type EXCL) for BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 166
[[35mlola[0m][I] fired transitions : 165
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 22 (type EXCL) for 21 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07
[[35mlola[0m][I] time limit : 1687 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 1/1687 1/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07 70849 m, 14169 m/sec, 221549 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 226 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 6/1687 5/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07 1143350 m, 214500 m/sec, 3778005 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 231 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 11/1687 9/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07 2113068 m, 193943 m/sec, 7348771 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 236 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 16/1687 14/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07 3112936 m, 199973 m/sec, 10868515 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 241 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 21/1687 18/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07 4126020 m, 202616 m/sec, 14493557 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 246 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-04: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-11: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-13: EXEF true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07: AFAG 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 26/1687 22/2000 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07 5146481 m, 204092 m/sec, 18111695 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 251 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 22 (type EXCL) for BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 5680626
[[35mlola[0m][I] fired transitions : 20020839
[[35mlola[0m][I] time used : 28
[[35mlola[0m][I] memory pages used : 24
[[35mlola[0m][I] LAUNCH task # 19 (type EXCL) for 18 BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06
[[35mlola[0m][I] time limit : 3347 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 19 (type EXCL) for BridgeAndVehicles-PT-V20P20N20-CTLCardinality-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 293
[[35mlola[0m][I] fired transitions : 541
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-PT-V20P20N20"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is BridgeAndVehicles-PT-V20P20N20, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r049-tajo-171620400300209"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-PT-V20P20N20.tgz
mv BridgeAndVehicles-PT-V20P20N20 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;