About the Execution of LoLA for BridgeAndVehicles-PT-V20P10N50
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 3899.876 | 431367.00 | 459097.00 | 122.70 | FTFTTFTTFTFTFTTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2024-input.r049-tajo-171620400300194.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2024-input.qcow2' backing_fmt='qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
......................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is BridgeAndVehicles-PT-V20P10N50, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r049-tajo-171620400300194
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 5.8M
-rw-r--r-- 1 mcc users 16K Apr 13 02:42 CTLCardinality.txt
-rw-r--r-- 1 mcc users 101K Apr 13 02:42 CTLCardinality.xml
-rw-r--r-- 1 mcc users 400K Apr 13 02:37 CTLFireability.txt
-rw-r--r-- 1 mcc users 1.5M Apr 13 02:37 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 8.4K Apr 22 14:29 LTLCardinality.txt
-rw-r--r-- 1 mcc users 42K Apr 22 14:29 LTLCardinality.xml
-rw-r--r-- 1 mcc users 144K Apr 22 14:29 LTLFireability.txt
-rw-r--r-- 1 mcc users 406K Apr 22 14:29 LTLFireability.xml
-rw-r--r-- 1 mcc users 30K Apr 13 03:20 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 206K Apr 13 03:20 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 227K Apr 13 03:15 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 886K Apr 13 03:15 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.6K Apr 22 14:29 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.8K Apr 22 14:29 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 10 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 1.8M May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-00
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-01
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-02
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-03
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-04
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-05
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-06
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-07
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-08
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-09
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-10
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-11
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-12
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-13
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-14
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-15
=== Now, execution of the tool begins
BK_START 1717009696330
FORMULA BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-09: EFEG true state space /EFEG[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 431 secs. Pages in use: 39
BK_STOP 1717010127697
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 10 (type EXCL) for 9 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 211 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 10 (type EXCL) for BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 165
[[35mlola[0m][I] fired transitions : 494
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 224 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 54 (type EQUN) for 12 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-04: DISJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-07: CTL 1 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-09: EFEG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 2/224 1/2000 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-01 82924 m, 16584 m/sec, 270643 t fired, .
[[35mlola[0m][.] 54 EF STEQ 1/3595 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-04 sara not yet started (preprocessing).
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 6 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 4 (type EXCL) for BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 95762
[[35mlola[0m][I] fired transitions : 313923
[[35mlola[0m][I] time used : 2
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 52 (type EXCL) for 12 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 52 (type EXCL) for BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 22
[[35mlola[0m][I] fired transitions : 21
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 54 (type EQUN) for BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-04 (obsolete)
[[35mlola[0m][I] LAUNCH task # 47 (type EXCL) for 46 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-14
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 47 (type EXCL) for BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 139
[[35mlola[0m][I] fired transitions : 140
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 44 (type EXCL) for 43 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-13
[[35mlola[0m][I] time limit : 299 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 44 (type EXCL) for BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] fired transitions : 2
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 41 (type EXCL) for 40 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-12
[[35mlola[0m][I] time limit : 326 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 41 (type EXCL) for BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 4606
[[35mlola[0m][I] fired transitions : 8341
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 38 (type EXCL) for 37 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 359 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 58 (type EQUN) for 31 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 60 (type EQUN) for 31 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 38 (type EXCL) for BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2393
[[35mlola[0m][I] fired transitions : 4124
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 29 (type EXCL) for 28 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 399 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 58 (type EQUN) for BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-09
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 60 (type EQUN) for BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-09: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 5/399 1/2000 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-08 103724 m, 20744 m/sec, 846673 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 11 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
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[[35mlola[0m][.] 29 CTL EXCL 20/399 2/2000 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-08 447637 m, 22372 m/sec, 3705345 t fired, .
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[[35mlola[0m][.] 29 CTL EXCL 360/399 37/2000 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-08 8622206 m, 24372 m/sec, 73232259 t fired, .
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[[35mlola[0m][.] 29 CTL EXCL 365/399 38/2000 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-08 8739409 m, 23440 m/sec, 74245650 t fired, .
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[[35mlola[0m][.] 26 CTL EXCL 1/401 1/2000 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-07 8856 m, 1771 m/sec, 61910 t fired, .
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[[35mlola[0m][.] 35 CTL EXCL 4/1069 2/2000 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-10 370760 m, 74152 m/sec, 998222 t fired, .
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[[35mlola[0m][.] 35 CTL EXCL 9/1069 4/2000 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-10 842722 m, 94392 m/sec, 2308044 t fired, .
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[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 14/1069 6/2000 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-10 1303544 m, 92164 m/sec, 3600238 t fired, .
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[[35mlola[0m][I] FINISHED task # 35 (type EXCL) for BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1489362
[[35mlola[0m][I] fired transitions : 4123760
[[35mlola[0m][I] time used : 16
[[35mlola[0m][I] memory pages used : 7
[[35mlola[0m][I] LAUNCH task # 7 (type EXCL) for 6 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 1596 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 7 (type EXCL) for BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 110022
[[35mlola[0m][I] fired transitions : 641774
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 50 (type EXCL) for 49 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-15
[[35mlola[0m][I] time limit : 3191 sec
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[[35mlola[0m][.] 50 CTL EXCL 2/3191 1/2000 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-15 138020 m, 27604 m/sec, 364238 t fired, .
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[[35mlola[0m][.]
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[[35mlola[0m][.] 50 CTL EXCL 7/3191 2/2000 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-15 368426 m, 46081 m/sec, 1806712 t fired, .
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[[35mlola[0m][.] [1m[32mBridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-09: EFEG true state space /EFEG[0m
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[[35mlola[0m][.]
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[[35mlola[0m][.] 50 CTL EXCL 12/3191 4/2000 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-15 735533 m, 73421 m/sec, 3190847 t fired, .
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[[35mlola[0m][.] 50 CTL EXCL 17/3191 5/2000 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-15 1097433 m, 72380 m/sec, 4564147 t fired, .
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[[35mlola[0m][.]
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[[35mlola[0m][.] 50 CTL EXCL 22/3191 7/2000 BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-15 1460862 m, 72685 m/sec, 5949406 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][I] FINISHED task # 50 (type EXCL) for BridgeAndVehicles-PT-V20P10N50-CTLFireability-2024-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1489362
[[35mlola[0m][I] fired transitions : 6060242
[[35mlola[0m][I] time used : 22
[[35mlola[0m][I] memory pages used : 7
[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-PT-V20P10N50"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is BridgeAndVehicles-PT-V20P10N50, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r049-tajo-171620400300194"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-PT-V20P10N50.tgz
mv BridgeAndVehicles-PT-V20P10N50 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;