About the Execution of LoLA for BridgeAndVehicles-COL-V80P20N50
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16206.483 | 1407489.00 | 1549299.00 | 1001.30 | F????FF??T?T?T?? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2024-input.r049-tajo-171620400100131.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2024-input.qcow2' backing_fmt='qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is BridgeAndVehicles-COL-V80P20N50, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r049-tajo-171620400100131
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 464K
-rw-r--r-- 1 mcc users 7.6K Apr 13 02:45 CTLCardinality.txt
-rw-r--r-- 1 mcc users 72K Apr 13 02:45 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.6K Apr 13 02:31 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Apr 13 02:31 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.3K Apr 22 14:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Apr 22 14:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Apr 22 14:30 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 22 14:30 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.4K Apr 13 05:49 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 83K Apr 13 05:49 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.9K Apr 13 05:39 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 68K Apr 13 05:39 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Apr 22 14:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Apr 22 14:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_pt
-rw-r--r-- 1 mcc users 10 May 18 16:42 instance
-rw-r--r-- 1 mcc users 5 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 47K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-LTLCardinality-00
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-LTLCardinality-05
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-LTLCardinality-06
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-LTLCardinality-09
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-LTLCardinality-11
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-LTLCardinality-13
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15
=== Now, execution of the tool begins
BK_START 1717006463897
FORMULA BridgeAndVehicles-COL-V80P20N50-LTLCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P20N50-LTLCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P20N50-LTLCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P20N50-LTLCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P20N50-LTLCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P20N50-LTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717007871386
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains High-Level net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading HL formula in XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLCardinality.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] nonmoderate token usage
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 62 (type SKEL/FNDP) for 23 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 63 (type SKEL/EQUN) for 23 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 64 (type SKEL/SRCH) for 23 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 67 (type SKEL/FNDP) for 0 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 64 (type SKEL/SRCH) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 62 (type FNDP) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-05 (obsolete)
[[35mlola[0m][W] CANCELED task # 63 (type EQUN) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-05 (obsolete)
[[35mlola[0m][I] LAUNCH task # 68 (type SKEL/EQUN) for 0 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 69 (type SKEL/SRCH) for 0 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 62 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 69 (type SKEL/SRCH) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 67 (type FNDP) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-00 (obsolete)
[[35mlola[0m][W] CANCELED task # 68 (type EQUN) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-00 (obsolete)
[[35mlola[0m][I] FINISHED task # 67 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] Places: 228, Transitions: 8588
[[35mlola[0m][I] FINISHED task # 68 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-00
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 63 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-05
[[35mlola[0m][I] result : unknown
[[35mlola[0m][W] findlow criterion violated for transition 1
[[35mlola[0m][W] findlow criterion violated for transition 2
[[35mlola[0m][W] findlow criterion violated for transition 0
[[35mlola[0m][W] findlow criterion violated for transition 9
[[35mlola[0m][W] findlow criterion violated for transition 5
[[35mlola[0m][W] findlow criterion violated for 6 clusters
[[35mlola[0m][I] Time for checking findlow: 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ 1 0 0 0 4 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ 2 0 0 0 0 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ 1 0 0 0 4 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ 2 0 0 0 0 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ 1 0 0 0 4 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ 2 0 0 0 0 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 15 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ 1 0 0 0 4 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ 2 0 0 0 0 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 20 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 9 (type CNST) for 0 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-00
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 40 (type CNST) for 39 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-09
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 70 (type SKEL/SRCH) for 26 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 73 (type SKEL/SRCH) for 51 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 46 (type CNST) for 45 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-11
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 52 (type CNST) for 51 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-13
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 9 (type CNST) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 73 (type SKEL/SRCH) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 52 (type CNST) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-13 (obsolete)
[[35mlola[0m][I] LAUNCH task # 71 (type SKEL/SRCH) for 39 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 40 (type CNST) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 46 (type CNST) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-11
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 52 (type CNST) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-13
[[35mlola[0m][I] result : true
[[35mlola[0m][W] CANCELED task # 71 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-09 (obsolete)
[[35mlola[0m][I] LAUNCH task # 74 (type SKEL/SRCH) for 26 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 70 (type SKEL/SRCH) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 163
[[35mlola[0m][I] fired transitions : 163
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] FINISHED task # 74 (type SKEL/SRCH) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 161
[[35mlola[0m][I] fired transitions : 161
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[*** LOG ERROR #0001 ***] [2024-05-29 18:14:45] [status_logger] string pointer is null
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 25 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 30 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 35 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 40 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 45 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 29 (type EXCL) for 26 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-06
[[35mlola[0m][I] time limit : 273 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 29 (type EXCL) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 653
[[35mlola[0m][I] fired transitions : 653
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 43 (type EXCL) for 42 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10
[[35mlola[0m][I] time limit : 322 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 0/322 1/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 42 m, 8 m/sec, 41 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 50 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG 0 0 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 5/322 1/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 47150 m, 9421 m/sec, 196547 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 55 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 76 (type FNDP) for 23 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 77 (type EQUN) for 23 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 76 (type FNDP) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 77 (type EQUN) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-05 (obsolete)
[[35mlola[0m][I] FINISHED task # 77 (type EQUN) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-05
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 10/355 2/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 189066 m, 28383 m/sec, 804578 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 60 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 15/355 3/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 332144 m, 28615 m/sec, 1412476 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 65 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 20/355 4/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 468495 m, 27270 m/sec, 1992343 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 70 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 25/355 5/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 633776 m, 33056 m/sec, 2699613 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 75 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 30/355 6/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 772653 m, 27775 m/sec, 3289502 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 80 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 35/355 7/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 915348 m, 28539 m/sec, 3896242 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 85 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 40/355 9/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 1072030 m, 31336 m/sec, 4567012 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 90 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 45/355 10/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 1206343 m, 26862 m/sec, 5135000 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 95 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 50/355 11/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 1360127 m, 30756 m/sec, 5791245 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 100 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 55/355 12/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 1502908 m, 28556 m/sec, 6398062 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 105 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 60/355 13/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 1653834 m, 30185 m/sec, 7043405 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 110 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 65/355 14/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 1805940 m, 30421 m/sec, 7689764 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 115 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 70/355 15/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 1939914 m, 26794 m/sec, 8257080 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 120 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 75/355 16/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 2085051 m, 29027 m/sec, 8873350 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 125 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 80/355 17/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 2228141 m, 28618 m/sec, 9482875 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 130 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 85/355 18/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 2370059 m, 28383 m/sec, 10085940 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 135 secs. Pages in use: 18
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 90/355 19/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 2512600 m, 28508 m/sec, 10691330 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 140 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 95/355 20/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 2653147 m, 28109 m/sec, 11288436 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 145 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 100/355 21/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 2779865 m, 25343 m/sec, 11828174 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 150 secs. Pages in use: 21
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 105/355 22/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 2916460 m, 27319 m/sec, 12409517 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 155 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 110/355 23/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 3044921 m, 25692 m/sec, 12954525 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 160 secs. Pages in use: 23
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 115/355 24/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 3182356 m, 27487 m/sec, 13537001 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 165 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 120/355 25/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 3322107 m, 27950 m/sec, 14127714 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 170 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 125/355 26/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 3454570 m, 26492 m/sec, 14689600 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 175 secs. Pages in use: 26
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 130/355 27/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 3591891 m, 27464 m/sec, 15271514 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 180 secs. Pages in use: 27
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 135/355 28/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 3717654 m, 25152 m/sec, 15805015 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 185 secs. Pages in use: 28
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 140/355 29/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 3841853 m, 24839 m/sec, 16327151 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 190 secs. Pages in use: 29
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 145/355 30/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 3973016 m, 26232 m/sec, 16883546 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 195 secs. Pages in use: 30
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 150/355 31/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 4093048 m, 24006 m/sec, 17387055 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 200 secs. Pages in use: 31
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 155/355 32/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 4219675 m, 25325 m/sec, 17923257 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 205 secs. Pages in use: 32
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 160/355 33/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 4350538 m, 26172 m/sec, 18476320 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 210 secs. Pages in use: 33
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 165/355 34/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 4493131 m, 28518 m/sec, 19072523 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 215 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 170/355 35/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 4635207 m, 28415 m/sec, 19672628 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 220 secs. Pages in use: 35
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 175/355 36/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 4772408 m, 27440 m/sec, 20254686 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 225 secs. Pages in use: 36
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 180/355 37/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 4919136 m, 29345 m/sec, 20880465 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 230 secs. Pages in use: 37
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 185/355 38/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 5065164 m, 29205 m/sec, 21480283 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 235 secs. Pages in use: 38
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 190/355 39/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 5199249 m, 26817 m/sec, 22048550 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 240 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 195/355 40/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 5347279 m, 29606 m/sec, 22678000 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 245 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 200/355 41/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 5505897 m, 31723 m/sec, 23356983 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 250 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 205/355 42/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 5636808 m, 26182 m/sec, 23910725 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 255 secs. Pages in use: 42
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 210/355 43/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 5791182 m, 30874 m/sec, 24572557 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 260 secs. Pages in use: 43
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 215/355 44/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 5914673 m, 24698 m/sec, 25093760 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 265 secs. Pages in use: 44
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 220/355 45/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 6054141 m, 27893 m/sec, 25691204 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 270 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 225/355 46/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 6172142 m, 23600 m/sec, 26189120 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 275 secs. Pages in use: 46
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 230/355 47/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 6318230 m, 29217 m/sec, 26815188 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 280 secs. Pages in use: 47
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 235/355 48/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 6448820 m, 26118 m/sec, 27366999 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 285 secs. Pages in use: 48
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 240/355 49/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 6598538 m, 29943 m/sec, 28008918 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 290 secs. Pages in use: 49
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 245/355 50/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 6708652 m, 22022 m/sec, 28472202 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 295 secs. Pages in use: 50
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 250/355 51/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 6860448 m, 30359 m/sec, 29122946 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 300 secs. Pages in use: 51
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 255/355 52/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 6983300 m, 24570 m/sec, 29641085 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 305 secs. Pages in use: 52
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 260/355 53/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 7126980 m, 28736 m/sec, 30256034 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 310 secs. Pages in use: 53
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 265/355 54/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 7256333 m, 25870 m/sec, 30803542 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 315 secs. Pages in use: 54
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 270/355 55/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 7387157 m, 26164 m/sec, 31361728 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 320 secs. Pages in use: 55
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 275/355 56/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 7534809 m, 29530 m/sec, 31990455 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 325 secs. Pages in use: 56
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 280/355 57/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 7679362 m, 28910 m/sec, 32613963 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 330 secs. Pages in use: 57
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 285/355 59/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 7830898 m, 30307 m/sec, 33259556 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 335 secs. Pages in use: 59
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 290/355 60/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 7982754 m, 30371 m/sec, 33910269 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 340 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 295/355 61/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 8114857 m, 26420 m/sec, 34470029 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 345 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 300/355 62/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 8251037 m, 27236 m/sec, 35051262 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 350 secs. Pages in use: 62
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 305/355 63/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 8398197 m, 29432 m/sec, 35677455 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 355 secs. Pages in use: 63
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 310/355 64/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 8546741 m, 29708 m/sec, 36312264 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 360 secs. Pages in use: 64
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 315/355 65/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 8685956 m, 27843 m/sec, 36910244 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 365 secs. Pages in use: 65
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 320/355 66/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 8819654 m, 26739 m/sec, 37477392 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 370 secs. Pages in use: 66
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 325/355 67/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 8971908 m, 30450 m/sec, 38130926 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 375 secs. Pages in use: 67
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 330/355 68/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 9096811 m, 24980 m/sec, 38658180 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 380 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 335/355 69/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 9239819 m, 28601 m/sec, 39271918 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 385 secs. Pages in use: 69
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 340/355 70/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 9363697 m, 24775 m/sec, 39795842 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 390 secs. Pages in use: 70
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 345/355 71/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 9501755 m, 27611 m/sec, 40388381 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 395 secs. Pages in use: 71
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 350/355 72/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 9644990 m, 28647 m/sec, 41002915 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 400 secs. Pages in use: 72
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 355/355 73/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 9780987 m, 27199 m/sec, 41578457 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 405 secs. Pages in use: 73
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 43 (type EXCL) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 410 secs. Pages in use: 74
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 58 (type EXCL) for 57 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15
[[35mlola[0m][I] time limit : 354 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 43 (type EXCL) for 42 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10
[[35mlola[0m][I] time limit : 3190 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 5/3190 2/5 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 150178 m, -1926161 m/sec, 636820 t fired, .
[[35mlola[0m][.] 58 LTL EXCL 5/354 4/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 327457 m, 65491 m/sec, 906925 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 415 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 10/3190 3/5 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 303881 m, 30740 m/sec, 1291739 t fired, .
[[35mlola[0m][.] 58 LTL EXCL 10/319 7/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 632135 m, 60935 m/sec, 1745008 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 420 secs. Pages in use: 84
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 15/3190 4/5 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 453262 m, 29876 m/sec, 1931677 t fired, .
[[35mlola[0m][.] 58 LTL EXCL 15/319 9/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 864596 m, 46492 m/sec, 2368225 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 425 secs. Pages in use: 87
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 LTL EXCL 20/3190 5/5 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 614916 m, 32330 m/sec, 2618268 t fired, .
[[35mlola[0m][.] 58 LTL EXCL 20/319 12/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 1197459 m, 66572 m/sec, 3277634 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 430 secs. Pages in use: 91
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 43 (type EXCL) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 25/319 16/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 1541689 m, 68846 m/sec, 4236819 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 435 secs. Pages in use: 92
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 30/354 19/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 1894979 m, 70658 m/sec, 5386217 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 440 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 35/354 21/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 2175584 m, 56121 m/sec, 6552509 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 445 secs. Pages in use: 95
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 40/354 22/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 2426271 m, 50137 m/sec, 7585451 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 450 secs. Pages in use: 96
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 45/354 24/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 2635278 m, 41801 m/sec, 8427617 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 455 secs. Pages in use: 98
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 50/354 25/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 2906925 m, 54329 m/sec, 9550678 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 460 secs. Pages in use: 99
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 55/354 27/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 3196115 m, 57838 m/sec, 10762288 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 465 secs. Pages in use: 101
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 60/354 29/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 3484248 m, 57626 m/sec, 11975141 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 470 secs. Pages in use: 103
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 65/354 32/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 3815326 m, 66215 m/sec, 13141052 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 475 secs. Pages in use: 106
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 70/354 34/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 4104783 m, 57891 m/sec, 14202616 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 480 secs. Pages in use: 108
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 75/354 36/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 4410621 m, 61167 m/sec, 15244966 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 485 secs. Pages in use: 110
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 80/354 39/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 4712274 m, 60330 m/sec, 16316671 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 490 secs. Pages in use: 113
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 85/354 41/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 5010841 m, 59713 m/sec, 17355514 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 495 secs. Pages in use: 115
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 90/354 43/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 5285437 m, 54919 m/sec, 18371710 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 500 secs. Pages in use: 117
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 95/354 46/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 5588274 m, 60567 m/sec, 19379228 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 505 secs. Pages in use: 120
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 100/354 48/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 5920274 m, 66400 m/sec, 20545564 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 510 secs. Pages in use: 122
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 105/354 51/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 6256296 m, 67204 m/sec, 21717009 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 515 secs. Pages in use: 125
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 110/354 54/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 6582526 m, 65246 m/sec, 22865568 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 520 secs. Pages in use: 128
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 115/354 56/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 6897829 m, 63060 m/sec, 23980423 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 525 secs. Pages in use: 130
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 120/354 59/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 7235482 m, 67530 m/sec, 25233982 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 530 secs. Pages in use: 133
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 125/354 62/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 7534617 m, 59827 m/sec, 26274526 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 535 secs. Pages in use: 136
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 130/354 64/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 7880289 m, 69134 m/sec, 27469426 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 540 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 135/354 67/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 8187879 m, 61518 m/sec, 28598928 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 545 secs. Pages in use: 141
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 140/354 70/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 8520574 m, 66539 m/sec, 29723790 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 550 secs. Pages in use: 144
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 145/354 72/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 8820379 m, 59961 m/sec, 30829168 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 555 secs. Pages in use: 146
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 150/354 75/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 9157383 m, 67400 m/sec, 31998565 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 560 secs. Pages in use: 149
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 155/354 77/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 9454884 m, 59500 m/sec, 33019694 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 565 secs. Pages in use: 151
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 160/354 80/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 9744613 m, 57945 m/sec, 34066029 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 570 secs. Pages in use: 154
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 165/354 82/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 10040091 m, 59095 m/sec, 35097525 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 575 secs. Pages in use: 156
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 170/354 85/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 10336994 m, 59380 m/sec, 36116143 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 580 secs. Pages in use: 159
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 175/354 87/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 10624132 m, 57427 m/sec, 37140208 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 585 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 180/354 89/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 10908834 m, 56940 m/sec, 38103058 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 590 secs. Pages in use: 163
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 185/354 92/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 11191396 m, 56512 m/sec, 39132792 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 595 secs. Pages in use: 166
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 190/354 94/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 11488661 m, 59453 m/sec, 40169516 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 600 secs. Pages in use: 168
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 195/354 97/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 11787944 m, 59856 m/sec, 41211655 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 605 secs. Pages in use: 171
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 200/354 99/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 12097159 m, 61843 m/sec, 42316672 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 610 secs. Pages in use: 173
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 205/354 102/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 12407790 m, 62126 m/sec, 43423929 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 615 secs. Pages in use: 176
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 210/354 104/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 12701919 m, 58825 m/sec, 44416408 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 620 secs. Pages in use: 178
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 215/354 106/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 13000735 m, 59763 m/sec, 45495861 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 625 secs. Pages in use: 180
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 220/354 109/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 13315518 m, 62956 m/sec, 46553712 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 630 secs. Pages in use: 183
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 225/354 111/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 13608044 m, 58505 m/sec, 47618883 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 635 secs. Pages in use: 185
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 230/354 114/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 13912316 m, 60854 m/sec, 48661379 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 640 secs. Pages in use: 188
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 235/354 116/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 14202112 m, 57959 m/sec, 49714284 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 645 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 240/354 119/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 14504898 m, 60557 m/sec, 50768653 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 650 secs. Pages in use: 193
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 245/354 121/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 14794937 m, 58007 m/sec, 51815621 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 655 secs. Pages in use: 195
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 250/354 124/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 15104198 m, 61852 m/sec, 52897311 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 660 secs. Pages in use: 198
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 255/354 126/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 15393583 m, 57877 m/sec, 53942812 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 665 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 260/354 128/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 15686239 m, 58531 m/sec, 54954843 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 670 secs. Pages in use: 202
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 265/354 130/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 15956462 m, 54044 m/sec, 55976706 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 675 secs. Pages in use: 204
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 270/354 133/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 16262123 m, 61132 m/sec, 57029617 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 680 secs. Pages in use: 207
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 275/354 135/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 16542185 m, 56012 m/sec, 58086646 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 685 secs. Pages in use: 209
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 280/354 137/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 16841301 m, 59823 m/sec, 59125101 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 690 secs. Pages in use: 211
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 285/354 140/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 17152426 m, 62225 m/sec, 60276356 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 695 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 290/354 142/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 17443372 m, 58189 m/sec, 61294237 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 700 secs. Pages in use: 216
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 295/354 145/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 17778922 m, 67110 m/sec, 62508929 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 705 secs. Pages in use: 219
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 300/354 147/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 18061691 m, 56553 m/sec, 63512105 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 710 secs. Pages in use: 221
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 305/354 150/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 18398371 m, 67336 m/sec, 64700240 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 715 secs. Pages in use: 224
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 310/354 152/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 18674039 m, 55133 m/sec, 65656234 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 720 secs. Pages in use: 226
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 315/354 155/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 18998620 m, 64916 m/sec, 66787944 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 725 secs. Pages in use: 229
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 320/354 157/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 19291047 m, 58485 m/sec, 67814926 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 730 secs. Pages in use: 231
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 325/354 160/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 19616522 m, 65095 m/sec, 68946718 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 735 secs. Pages in use: 234
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 330/354 162/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 19930071 m, 62709 m/sec, 70080975 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 740 secs. Pages in use: 236
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 335/354 165/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 20242417 m, 62469 m/sec, 71175691 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 745 secs. Pages in use: 239
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 340/354 167/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 20537138 m, 58944 m/sec, 72305487 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 750 secs. Pages in use: 241
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 345/354 169/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 20842889 m, 61150 m/sec, 73385166 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 755 secs. Pages in use: 243
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 58 LTL EXCL 350/354 172/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 21179193 m, 67260 m/sec, 74627743 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 760 secs. Pages in use: 246
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 58 (type EXCL) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 765 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 37 (type EXCL) for 36 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08
[[35mlola[0m][I] time limit : 354 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 58 (type EXCL) for 57 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15
[[35mlola[0m][I] time limit : 2835 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 5/354 3/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 285572 m, 57114 m/sec, 1188395 t fired, .
[[35mlola[0m][.] 58 LTL EXCL 5/2835 4/5 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 325962 m, -4170646 m/sec, 902824 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 770 secs. Pages in use: 255
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 58 (type EXCL) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 10/354 5/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 559039 m, 54693 m/sec, 2412850 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 775 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 15/354 7/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 816978 m, 51587 m/sec, 3843629 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 780 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 20/354 9/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 1063631 m, 49330 m/sec, 5202505 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 785 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 25/354 11/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 1320236 m, 51321 m/sec, 6589359 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 790 secs. Pages in use: 259
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 30/354 12/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 1570158 m, 49984 m/sec, 7959808 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 795 secs. Pages in use: 260
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 35/354 14/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 1833924 m, 52753 m/sec, 9354091 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 800 secs. Pages in use: 262
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 40/354 16/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 2094925 m, 52200 m/sec, 10780508 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 805 secs. Pages in use: 264
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 45/354 18/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 2364598 m, 53934 m/sec, 12173953 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 810 secs. Pages in use: 266
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 50/354 20/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 2627494 m, 52579 m/sec, 13603511 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 815 secs. Pages in use: 268
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 55/354 22/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 2899668 m, 54434 m/sec, 14977448 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 820 secs. Pages in use: 270
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 60/354 24/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 3162891 m, 52644 m/sec, 16398847 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 825 secs. Pages in use: 272
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 65/354 26/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 3430878 m, 53597 m/sec, 17741753 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 830 secs. Pages in use: 274
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 70/354 28/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 3684138 m, 50652 m/sec, 19068205 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 835 secs. Pages in use: 276
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 75/354 30/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 3932661 m, 49704 m/sec, 20419801 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 840 secs. Pages in use: 278
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 80/354 32/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 4219539 m, 57375 m/sec, 21774645 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 845 secs. Pages in use: 280
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 85/354 34/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 4461619 m, 48416 m/sec, 23194330 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 850 secs. Pages in use: 282
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 90/354 36/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 4754365 m, 58549 m/sec, 24477772 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 855 secs. Pages in use: 284
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 95/354 38/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 5006894 m, 50505 m/sec, 25924964 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 860 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 100/354 40/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 5285027 m, 55626 m/sec, 27191123 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 865 secs. Pages in use: 288
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 105/354 42/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 5547745 m, 52543 m/sec, 28578306 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 870 secs. Pages in use: 290
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 110/354 44/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 5827084 m, 55867 m/sec, 29818794 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 875 secs. Pages in use: 292
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 115/354 46/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 6095182 m, 53619 m/sec, 31226747 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 880 secs. Pages in use: 294
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 120/354 48/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 6338799 m, 48723 m/sec, 32445528 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 885 secs. Pages in use: 296
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 125/354 50/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 6629370 m, 58114 m/sec, 33752087 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 890 secs. Pages in use: 298
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 130/354 52/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 6868851 m, 47896 m/sec, 35156163 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 895 secs. Pages in use: 300
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 135/354 54/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 7170888 m, 60407 m/sec, 36405336 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 900 secs. Pages in use: 302
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 140/354 56/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 7429359 m, 51694 m/sec, 37801746 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 905 secs. Pages in use: 304
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 145/354 58/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 7710019 m, 56132 m/sec, 38947328 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 910 secs. Pages in use: 306
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 150/354 59/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 7968541 m, 51704 m/sec, 40271099 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 915 secs. Pages in use: 307
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 155/354 61/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 8214275 m, 49146 m/sec, 41535976 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 920 secs. Pages in use: 309
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 160/354 63/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 8514165 m, 59978 m/sec, 42775427 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 925 secs. Pages in use: 311
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 165/354 65/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 8756452 m, 48457 m/sec, 44160433 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 930 secs. Pages in use: 313
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 170/354 67/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 9025670 m, 53843 m/sec, 45178304 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 935 secs. Pages in use: 315
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 175/354 69/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 9300932 m, 55052 m/sec, 46573620 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 940 secs. Pages in use: 317
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 180/354 71/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 9556145 m, 51042 m/sec, 47856310 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 945 secs. Pages in use: 319
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 185/354 73/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 9870096 m, 62790 m/sec, 49103445 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 950 secs. Pages in use: 321
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 190/354 75/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 10116693 m, 49319 m/sec, 50539574 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 955 secs. Pages in use: 323
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 195/354 77/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 10399639 m, 56589 m/sec, 51582251 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 960 secs. Pages in use: 325
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 200/354 79/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 10682509 m, 56574 m/sec, 52990710 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 965 secs. Pages in use: 327
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 205/354 81/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 10937918 m, 51081 m/sec, 54253535 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 970 secs. Pages in use: 329
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 210/354 83/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 11252668 m, 62950 m/sec, 55478298 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 975 secs. Pages in use: 331
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 215/354 85/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 11500963 m, 49659 m/sec, 56885268 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 980 secs. Pages in use: 333
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 220/354 87/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 11782485 m, 56304 m/sec, 57953324 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 985 secs. Pages in use: 335
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 225/354 89/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 12079125 m, 59328 m/sec, 59321924 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 990 secs. Pages in use: 337
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 230/354 90/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 12326713 m, 49517 m/sec, 60620278 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 995 secs. Pages in use: 338
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 235/354 93/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 12632458 m, 61149 m/sec, 61783299 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1000 secs. Pages in use: 341
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 240/354 95/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 12901376 m, 53783 m/sec, 63151476 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1005 secs. Pages in use: 343
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 245/354 96/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 13171900 m, 54104 m/sec, 64288027 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1010 secs. Pages in use: 344
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 250/354 99/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 13487407 m, 63101 m/sec, 65544997 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1015 secs. Pages in use: 347
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 255/354 100/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 13724277 m, 47374 m/sec, 66937144 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1020 secs. Pages in use: 348
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 260/354 102/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 14017914 m, 58727 m/sec, 67953009 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1025 secs. Pages in use: 350
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 265/354 104/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 14313842 m, 59185 m/sec, 69314779 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1030 secs. Pages in use: 352
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 270/354 106/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 14564609 m, 50153 m/sec, 70582087 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1035 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 275/354 108/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 14866689 m, 60416 m/sec, 71703070 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1040 secs. Pages in use: 356
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 280/354 110/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 15143486 m, 55359 m/sec, 73056870 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1045 secs. Pages in use: 358
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 285/354 112/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 15410685 m, 53439 m/sec, 74220357 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1050 secs. Pages in use: 360
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 290/354 114/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 15737525 m, 65368 m/sec, 75402966 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1055 secs. Pages in use: 362
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 295/354 116/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 15981046 m, 48704 m/sec, 76801974 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1060 secs. Pages in use: 364
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 300/354 118/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 16261453 m, 56081 m/sec, 77849221 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1065 secs. Pages in use: 366
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 305/354 120/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 16578284 m, 63366 m/sec, 79087741 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1070 secs. Pages in use: 368
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 310/354 122/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 16810098 m, 46362 m/sec, 80447488 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1075 secs. Pages in use: 370
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 315/354 124/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 17106643 m, 59309 m/sec, 81453941 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1080 secs. Pages in use: 372
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 320/354 126/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 17412890 m, 61249 m/sec, 82730084 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1085 secs. Pages in use: 374
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 325/354 128/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 17652335 m, 47889 m/sec, 84026659 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1090 secs. Pages in use: 376
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 330/354 130/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 17951443 m, 59821 m/sec, 85044622 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1095 secs. Pages in use: 378
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 335/354 132/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 18251095 m, 59930 m/sec, 86348464 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1100 secs. Pages in use: 380
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 340/354 134/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 18497916 m, 49364 m/sec, 87607595 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1105 secs. Pages in use: 382
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 345/354 136/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 18797793 m, 59975 m/sec, 88622211 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1110 secs. Pages in use: 384
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 37 LTL EXCL 350/354 138/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 19091644 m, 58770 m/sec, 89936859 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1115 secs. Pages in use: 386
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 37 (type EXCL) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1120 secs. Pages in use: 388
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 34 (type EXCL) for 33 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07
[[35mlola[0m][I] time limit : 354 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 37 (type EXCL) for 36 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08
[[35mlola[0m][I] time limit : 2480 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 5/354 3/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 317578 m, 63515 m/sec, 877164 t fired, .
[[35mlola[0m][.] 37 LTL EXCL 5/2480 3/5 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 292831 m, -3759762 m/sec, 1218735 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1125 secs. Pages in use: 394
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 10/354 6/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 637966 m, 64077 m/sec, 1760912 t fired, .
[[35mlola[0m][.] 37 LTL EXCL 10/310 5/5 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 565267 m, 54487 m/sec, 2449965 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1130 secs. Pages in use: 399
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 37 (type EXCL) for BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 15/354 8/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 934705 m, 59347 m/sec, 2570942 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1135 secs. Pages in use: 399
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 20/354 10/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 1180226 m, 49104 m/sec, 3232584 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1140 secs. Pages in use: 399
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 25/354 12/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 1476422 m, 59239 m/sec, 4026826 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1145 secs. Pages in use: 400
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 30/354 15/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 1808750 m, 66465 m/sec, 4949679 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1150 secs. Pages in use: 403
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 35/354 18/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 2112399 m, 60729 m/sec, 5791267 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1155 secs. Pages in use: 406
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 40/354 21/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 2452401 m, 68000 m/sec, 6743846 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1160 secs. Pages in use: 409
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 45/354 23/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 2751658 m, 59851 m/sec, 7580276 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1165 secs. Pages in use: 411
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 50/354 25/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 3058569 m, 61382 m/sec, 8440818 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1170 secs. Pages in use: 413
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 55/354 28/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 3353329 m, 58952 m/sec, 9267283 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1175 secs. Pages in use: 416
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 60/354 30/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 3644473 m, 58228 m/sec, 10085252 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1180 secs. Pages in use: 418
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 65/354 33/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 3969956 m, 65096 m/sec, 11006692 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1185 secs. Pages in use: 421
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 70/354 35/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 4248242 m, 55657 m/sec, 11787050 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1190 secs. Pages in use: 423
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 75/354 38/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 4543791 m, 59109 m/sec, 12612872 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1195 secs. Pages in use: 426
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 80/354 40/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 4849103 m, 61062 m/sec, 13466979 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1200 secs. Pages in use: 428
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 85/354 43/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 5146168 m, 59413 m/sec, 14301158 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1205 secs. Pages in use: 431
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 90/354 45/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 5437259 m, 58218 m/sec, 15119573 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1210 secs. Pages in use: 433
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 95/354 48/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 5740269 m, 60602 m/sec, 15970402 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1215 secs. Pages in use: 436
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 100/354 51/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 6046302 m, 61206 m/sec, 16832205 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1220 secs. Pages in use: 439
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 105/354 53/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 6350930 m, 60925 m/sec, 17683801 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1225 secs. Pages in use: 441
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 110/354 56/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 6641160 m, 58046 m/sec, 18492828 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1230 secs. Pages in use: 444
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 115/354 59/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 6944222 m, 60612 m/sec, 19334580 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1235 secs. Pages in use: 447
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 120/354 61/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 7252165 m, 61588 m/sec, 20188566 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1240 secs. Pages in use: 449
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 125/354 64/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 7554482 m, 60463 m/sec, 21043552 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1245 secs. Pages in use: 452
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 130/354 67/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 7862153 m, 61534 m/sec, 21899851 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1250 secs. Pages in use: 455
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 135/354 69/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 8183942 m, 64357 m/sec, 22809045 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1255 secs. Pages in use: 457
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 140/354 72/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 8508862 m, 64984 m/sec, 23728564 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1260 secs. Pages in use: 460
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 145/354 75/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 8840125 m, 66252 m/sec, 24665589 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1265 secs. Pages in use: 463
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 150/354 78/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 9170841 m, 66143 m/sec, 25600854 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1270 secs. Pages in use: 466
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 155/354 80/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 9502386 m, 66309 m/sec, 26539095 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1275 secs. Pages in use: 468
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 160/354 83/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 9836207 m, 66764 m/sec, 27484207 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1280 secs. Pages in use: 471
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 165/354 86/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 10173681 m, 67494 m/sec, 28440787 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1285 secs. Pages in use: 474
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 170/354 89/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 10512386 m, 67741 m/sec, 29401835 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1290 secs. Pages in use: 477
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 175/354 91/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 10831164 m, 63755 m/sec, 30305686 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1295 secs. Pages in use: 479
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 180/354 94/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 11160137 m, 65794 m/sec, 31237930 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1300 secs. Pages in use: 482
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 185/354 97/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 11498807 m, 67734 m/sec, 32201639 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1305 secs. Pages in use: 485
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 190/354 100/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 11825120 m, 65262 m/sec, 33126834 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1310 secs. Pages in use: 488
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 195/354 102/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 12135355 m, 62047 m/sec, 34007361 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1315 secs. Pages in use: 490
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 200/354 105/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 12463424 m, 65613 m/sec, 34939627 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1320 secs. Pages in use: 493
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 205/354 108/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 12799990 m, 67313 m/sec, 35896779 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1325 secs. Pages in use: 496
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 210/354 111/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 13104183 m, 60838 m/sec, 36761854 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1330 secs. Pages in use: 499
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 215/354 113/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 13440698 m, 67303 m/sec, 37720781 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1335 secs. Pages in use: 501
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 220/354 116/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 13745526 m, 60965 m/sec, 38586280 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1340 secs. Pages in use: 504
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 225/354 119/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 14069086 m, 64712 m/sec, 39507714 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1345 secs. Pages in use: 507
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 230/354 121/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 14391110 m, 64404 m/sec, 40425280 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1350 secs. Pages in use: 509
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 235/354 124/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 14726047 m, 66987 m/sec, 41381097 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1355 secs. Pages in use: 512
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 240/354 127/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 15037151 m, 62220 m/sec, 42306180 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1360 secs. Pages in use: 515
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 245/354 129/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 15322254 m, 57020 m/sec, 43281860 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1365 secs. Pages in use: 517
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 250/354 131/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 15598557 m, 55260 m/sec, 44241650 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1370 secs. Pages in use: 519
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 255/354 133/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 15867179 m, 53724 m/sec, 45167853 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1375 secs. Pages in use: 521
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 260/354 135/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 16098889 m, 46342 m/sec, 45972409 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1380 secs. Pages in use: 523
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 265/354 137/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 16326743 m, 45570 m/sec, 46760689 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1385 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 270/354 138/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 16541383 m, 42928 m/sec, 47511026 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1390 secs. Pages in use: 526
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 275/354 140/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 16689766 m, 29676 m/sec, 48027560 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1395 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 280/354 141/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 16855711 m, 33189 m/sec, 48581800 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1400 secs. Pages in use: 529
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-00: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-05: AG false findpath[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-09: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-11: LTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V80P20N50-LTLCardinality-13: LTL true skeleton: LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N50-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 LTL EXCL 286/354 141/2000 BridgeAndVehicles-COL-V80P20N50-LTLCardinality-07 16874048 m, 3667 m/sec, 48650070 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1406 secs. Pages in use: 529
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 403 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-COL-V80P20N50"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is BridgeAndVehicles-COL-V80P20N50, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r049-tajo-171620400100131"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-COL-V80P20N50.tgz
mv BridgeAndVehicles-COL-V80P20N50 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;