About the Execution of LoLA for BridgeAndVehicles-COL-V80P20N20
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
16205.939 | 1133835.00 | 1884971.00 | 1108.50 | ???????????????F | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2024-input.r049-tajo-171620400100122.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2024-input.qcow2' backing_fmt='qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is BridgeAndVehicles-COL-V80P20N20, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r049-tajo-171620400100122
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 556K
-rw-r--r-- 1 mcc users 9.8K Apr 13 02:34 CTLCardinality.txt
-rw-r--r-- 1 mcc users 99K Apr 13 02:34 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.2K Apr 13 02:28 CTLFireability.txt
-rw-r--r-- 1 mcc users 58K Apr 13 02:28 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.2K Apr 22 14:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 22 14:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Apr 22 14:30 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 22 14:30 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Apr 13 04:19 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 96K Apr 13 04:19 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 14K Apr 13 04:12 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 106K Apr 13 04:12 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Apr 22 14:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Apr 22 14:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_pt
-rw-r--r-- 1 mcc users 10 May 18 16:42 instance
-rw-r--r-- 1 mcc users 5 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 45K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-00
FORMULA_NAME BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-01
FORMULA_NAME BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-02
FORMULA_NAME BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-03
FORMULA_NAME BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-04
FORMULA_NAME BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-05
FORMULA_NAME BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-06
FORMULA_NAME BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-07
FORMULA_NAME BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-08
FORMULA_NAME BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-09
FORMULA_NAME BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-10
FORMULA_NAME BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-11
FORMULA_NAME BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-12
FORMULA_NAME BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-13
FORMULA_NAME BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-14
FORMULA_NAME BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-15
=== Now, execution of the tool begins
BK_START 1717005638516
FORMULA BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717006772351
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains High-Level net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading HL formula in XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Places: 198, Transitions: 3728
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-05: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 33 (type EXCL) for 32 BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 199 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
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[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-05: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-06: CTL 1 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-07: CTL 1 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-09: CTL 1 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-10: CTL 1 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-11: CTL 1 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-12: CTL 1 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-15: CTL 1 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 CTL EXCL 0/199 1/2000 BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-08 35702 m, 7140 m/sec, 91683 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 56 (type FNDP) for 3 BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 57 (type EQUN) for 3 BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
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[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-01: CONJ 0 2 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-05: CONJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 CTL EXCL 6/211 2/2000 BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-08 165417 m, 25943 m/sec, 525727 t fired, .
[[35mlola[0m][.] 56 EF FNDP 0/3584 0/5 BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-01 --
[[35mlola[0m][.] 57 EF STEQ 0/3584 0/5 BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-01 sara not yet started (preprocessing).
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 16 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 63 (type EQUN) for 19 BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 56 (type FNDP) for BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 57 (type EQUN) for BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-01 (obsolete)
[[35mlola[0m][I] LAUNCH task # 65 (type EQUN) for 19 BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-01: CONJ 0 1 0 0 3 0 0 2
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-05: CONJ 0 2 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 CTL EXCL 11/211 4/2000 BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-08 483576 m, 63631 m/sec, 1623549 t fired, .
[[35mlola[0m][.] 63 EF STEQ 5/3584 0/5 BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-05 sara not yet started (preprocessing).
[[35mlola[0m][.] 65 EF STEQ 5/3584 0/5 BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-05 sara not yet started (preprocessing).
[[35mlola[0m][.]
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[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-01: CONJ 0 1 0 0 3 0 0 2
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-05: CONJ 0 2 2 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 33 CTL EXCL 16/211 6/2000 BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-08 740826 m, 51450 m/sec, 2510668 t fired, .
[[35mlola[0m][.] 63 EF STEQ 10/3584 0/5 BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-05 sara not yet started (preprocessing).
[[35mlola[0m][.] 65 EF STEQ 10/3584 0/5 BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-05 sara not yet started (preprocessing).
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[[35mlola[0m][I] FINISHED task # 57 (type EQUN) for BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-01
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-01: CONJ 0 1 0 0 4 0 0 1
[[35mlola[0m][.] BridgeAndVehicles-COL-V80P20N20-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 410 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-COL-V80P20N20"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is BridgeAndVehicles-COL-V80P20N20, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r049-tajo-171620400100122"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-COL-V80P20N20.tgz
mv BridgeAndVehicles-COL-V80P20N20 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;