About the Execution of LoLA for BridgeAndVehicles-COL-V50P50N50
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16057.424 | 54379.00 | 118329.00 | 211.40 | ?T?????????????? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2024-input.r049-tajo-171620400100105.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2024-input.qcow2' backing_fmt='qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is BridgeAndVehicles-COL-V50P50N50, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r049-tajo-171620400100105
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 464K
-rw-r--r-- 1 mcc users 7.6K Apr 13 03:31 CTLCardinality.txt
-rw-r--r-- 1 mcc users 73K Apr 13 03:31 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.2K Apr 13 03:24 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K Apr 13 03:24 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Apr 22 14:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Apr 22 14:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Apr 22 14:30 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 22 14:30 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Apr 13 05:51 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 91K Apr 13 05:51 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 10K Apr 13 05:45 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 69K Apr 13 05:45 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Apr 22 14:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Apr 22 14:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_pt
-rw-r--r-- 1 mcc users 10 May 18 16:42 instance
-rw-r--r-- 1 mcc users 5 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 44K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-00
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-01
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-02
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-03
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-04
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-05
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-06
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-07
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-08
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-09
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-10
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-12
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-13
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-14
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-15
=== Now, execution of the tool begins
BK_START 1717004614625
FORMULA BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717004669004
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains High-Level net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading HL formula in XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLCardinality.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] nonmoderate token usage
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 69 (type SKEL/FNDP) for 41 BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 70 (type SKEL/EQUN) for 41 BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 71 (type SKEL/SRCH) for 41 BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] FINISHED task # 71 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 11
[[35mlola[0m][I] fired transitions : 10
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 69 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11 (obsolete)
[[35mlola[0m][W] CANCELED task # 70 (type EQUN) for BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11 (obsolete)
[[35mlola[0m][I] Places: 168, Transitions: 5408
[[35mlola[0m][I] FINISHED task # 69 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] LAUNCH task # 74 (type SKEL/FNDP) for 41 BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 75 (type SKEL/EQUN) for 41 BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][W] findlow criterion violated for transition 1
[[35mlola[0m][I] LAUNCH task # 76 (type SKEL/SRCH) for 41 BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 78 (type SKEL/FNDP) for 3 BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 76 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 74 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11 (obsolete)
[[35mlola[0m][W] CANCELED task # 75 (type EQUN) for BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11 (obsolete)
[[35mlola[0m][I] LAUNCH task # 79 (type SKEL/EQUN) for 3 BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 80 (type SKEL/SRCH) for 3 BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 80 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] FINISHED task # 74 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] tried executions : 188440
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 78 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-01 (obsolete)
[[35mlola[0m][W] CANCELED task # 79 (type EQUN) for BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-01 (obsolete)
[[35mlola[0m][W] findlow criterion violated for transition 2
[[35mlola[0m][W] findlow criterion violated for transition 0
[[35mlola[0m][W] findlow criterion violated for transition 9
[[35mlola[0m][I] FINISHED task # 79 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 75 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 70 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][W] findlow criterion violated for transition 5
[[35mlola[0m][W] findlow criterion violated for 6 clusters
[[35mlola[0m][I] Time for checking findlow: 0
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-01: DISJ true skeleton: state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-08: SP ACTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11: DISJ 0 0 0 0 8 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-14: EXEG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 6 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-01: DISJ true skeleton: state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-08: SP ACTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11: DISJ 0 0 0 0 8 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-14: EXEG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 11 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-01: DISJ true skeleton: state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-08: SP ACTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11: DISJ 0 0 0 0 8 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-14: EXEG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 16 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-01: DISJ true skeleton: state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-08: SP ACTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11: DISJ 0 0 0 0 8 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-14: EXEG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 21 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-01: DISJ true skeleton: state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-08: SP ACTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11: DISJ 0 0 0 0 8 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-14: EXEG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 26 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-01: DISJ true skeleton: state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-08: SP ACTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11: DISJ 0 0 0 0 8 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-14: EXEG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 31 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-01: DISJ true skeleton: state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-08: SP ACTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11: DISJ 0 0 0 0 8 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-14: EXEG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 36 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-01: DISJ true skeleton: state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-08: SP ACTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11: DISJ 0 0 0 0 8 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-14: EXEG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 41 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 82 (type SKEL/SRCH) for 32 BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] FINISHED task # 82 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 374
[[35mlola[0m][I] fired transitions : 462
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 18 (type CNST) for 17 BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-03
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 18 (type CNST) for BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 54 (type CNST) for 41 BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 54 (type CNST) for BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11
[[35mlola[0m][I] result : false
[*** LOG ERROR #0001 ***] [2024-05-29 17:44:15] [status_logger] string pointer is null
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-01: DISJ true skeleton: state space[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-03: CTL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-08: SP ACTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11: DISJ 0 0 0 0 8 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-14: EXEG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 46 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 39 (type EXCL) for 38 BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-10
[[35mlola[0m][I] time limit : 236 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 39 (type EXCL) for BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 4
[[35mlola[0m][I] fired transitions : 3
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 57 (type EXCL) for 56 BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-12
[[35mlola[0m][I] time limit : 253 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 57 (type EXCL) for BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-01: DISJ true skeleton: state space[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-03: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-10: CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-12: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-08: SP ACTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-11: DISJ 0 0 0 0 8 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-13: CTL 1 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-14: EXEG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 51 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 60 (type EXCL) for 59 BridgeAndVehicles-COL-V50P50N50-CTLCardinality-2024-13
[[35mlola[0m][I] time limit : 272 sec
[[35mlola[0m][I] memory limit: 2000 pages
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 412 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-COL-V50P50N50"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is BridgeAndVehicles-COL-V50P50N50, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r049-tajo-171620400100105"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-COL-V50P50N50.tgz
mv BridgeAndVehicles-COL-V50P50N50 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;