About the Execution of LoLA for BridgeAndVehicles-COL-V50P50N10
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 13457.012 | 1269457.00 | 1306179.00 | 227.70 | FTFT?FFFFTFFFFTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2024-input.r049-tajo-171620400100092.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2024-input.qcow2' backing_fmt='qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
............................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is BridgeAndVehicles-COL-V50P50N10, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r049-tajo-171620400100092
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 516K
-rw-r--r-- 1 mcc users 8.4K Apr 13 02:29 CTLCardinality.txt
-rw-r--r-- 1 mcc users 84K Apr 13 02:29 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.0K Apr 13 02:25 CTLFireability.txt
-rw-r--r-- 1 mcc users 55K Apr 13 02:25 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Apr 22 14:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Apr 22 14:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Apr 22 14:30 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 22 14:30 LTLFireability.xml
-rw-r--r-- 1 mcc users 16K Apr 13 02:46 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 152K Apr 13 02:46 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.3K Apr 13 02:41 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 47K Apr 13 02:41 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Apr 22 14:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Apr 22 14:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_pt
-rw-r--r-- 1 mcc users 10 May 18 16:42 instance
-rw-r--r-- 1 mcc users 5 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 42K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-LTLFireability-00
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-LTLFireability-01
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-LTLFireability-02
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-LTLFireability-03
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-LTLFireability-04
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-LTLFireability-05
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-LTLFireability-06
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-LTLFireability-07
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-LTLFireability-08
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-LTLFireability-09
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-LTLFireability-10
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-LTLFireability-11
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-LTLFireability-12
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-LTLFireability-13
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-LTLFireability-14
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1717003305058
FORMULA BridgeAndVehicles-COL-V50P50N10-LTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P50N10-LTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P50N10-LTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P50N10-LTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P50N10-LTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P50N10-LTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P50N10-LTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P50N10-LTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P50N10-LTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P50N10-LTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P50N10-LTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P50N10-LTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P50N10-LTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P50N10-LTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P50N10-LTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-COL-V50P50N10-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-COL-V50P50N10-LTLFireability-01: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-COL-V50P50N10-LTLFireability-02: CONJ false findpath[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-COL-V50P50N10-LTLFireability-03: CONJ true CONJ[0m
[[35mlola[0m] [1m[33mBridgeAndVehicles-COL-V50P50N10-LTLFireability-04: LTL unknown AGGR[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-COL-V50P50N10-LTLFireability-05: CONJ false LTL model checker[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-COL-V50P50N10-LTLFireability-06: CONJ false state space[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-COL-V50P50N10-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-COL-V50P50N10-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-COL-V50P50N10-LTLFireability-09: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-COL-V50P50N10-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-COL-V50P50N10-LTLFireability-11: CONJ false state space /EU[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-COL-V50P50N10-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-COL-V50P50N10-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-COL-V50P50N10-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-COL-V50P50N10-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 1268 secs. Pages in use: 549
BK_STOP 1717004574515
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains High-Level net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading HL formula in XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLFireability.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] nonmoderate token usage
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 92 (type SKEL/FNDP) for 6 BridgeAndVehicles-COL-V50P50N10-LTLFireability-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 93 (type SKEL/EQUN) for 6 BridgeAndVehicles-COL-V50P50N10-LTLFireability-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 94 (type SKEL/SRCH) for 6 BridgeAndVehicles-COL-V50P50N10-LTLFireability-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 87 (type SKEL/FNDP) for 6 BridgeAndVehicles-COL-V50P50N10-LTLFireability-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 85 (type SKEL/CNST) for 23 BridgeAndVehicles-COL-V50P50N10-LTLFireability-05
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] FINISHED task # 94 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] FINISHED task # 85 (type SKEL/CNST) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-05
[[35mlola[0m][I] result : true
[[35mlola[0m][W] CANCELED task # 92 (type FNDP) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-02 (obsolete)
[[35mlola[0m][W] CANCELED task # 93 (type EQUN) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-02 (obsolete)
[[35mlola[0m][I] LAUNCH task # 88 (type SKEL/EQUN) for 6 BridgeAndVehicles-COL-V50P50N10-LTLFireability-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 89 (type SKEL/SRCH) for 6 BridgeAndVehicles-COL-V50P50N10-LTLFireability-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 89 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 3
[[35mlola[0m][I] fired transitions : 2
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 87 (type FNDP) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-02 (obsolete)
[[35mlola[0m][W] CANCELED task # 88 (type EQUN) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-02 (obsolete)
[[35mlola[0m][I] FINISHED task # 87 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 97 (type SKEL/FNDP) for 34 BridgeAndVehicles-COL-V50P50N10-LTLFireability-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] Places: 128, Transitions: 1328
[[35mlola[0m][I] LAUNCH task # 98 (type SKEL/EQUN) for 34 BridgeAndVehicles-COL-V50P50N10-LTLFireability-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 99 (type SKEL/SRCH) for 34 BridgeAndVehicles-COL-V50P50N10-LTLFireability-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 99 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 97 (type FNDP) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-06 (obsolete)
[[35mlola[0m][W] CANCELED task # 98 (type EQUN) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-06 (obsolete)
[[35mlola[0m][W] findlow criterion violated for transition 1
[[35mlola[0m][I] FINISHED task # 92 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 97 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 93 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 88 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 98 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-06
[[35mlola[0m][I] result : unknown
[[35mlola[0m][W] findlow criterion violated for transition 2
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][W] findlow criterion violated for transition 0
[[35mlola[0m][W] findlow criterion violated for transition 9
[[35mlola[0m][W] findlow criterion violated for transition 5
[[35mlola[0m][I] LAUNCH task # 103 (type EXCL) for 34 BridgeAndVehicles-COL-V50P50N10-LTLFireability-06
[[35mlola[0m][I] time limit : 124 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 101 (type FNDP) for 34 BridgeAndVehicles-COL-V50P50N10-LTLFireability-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 102 (type EQUN) for 34 BridgeAndVehicles-COL-V50P50N10-LTLFireability-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][W] findlow criterion violated for 6 clusters
[[35mlola[0m][I] Time for checking findlow: 1
[[35mlola[0m][I] LAUNCH task # 104 (type SKEL/SRCH) for 23 BridgeAndVehicles-COL-V50P50N10-LTLFireability-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 104 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 105
[[35mlola[0m][I] fired transitions : 105
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 106 (type SKEL/SRCH) for 13 BridgeAndVehicles-COL-V50P50N10-LTLFireability-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 106 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 105 (type SKEL/SRCH) for 34 BridgeAndVehicles-COL-V50P50N10-LTLFireability-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 105 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 105
[[35mlola[0m][I] fired transitions : 105
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] FINISHED task # 103 (type EXCL) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 101 (type FNDP) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-06 (obsolete)
[[35mlola[0m][W] CANCELED task # 102 (type EQUN) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-06 (obsolete)
[[35mlola[0m][I] LAUNCH task # 46 (type EXCL) for 41 BridgeAndVehicles-COL-V50P50N10-LTLFireability-07
[[35mlola[0m][I] time limit : 171 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 46 (type EXCL) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1944
[[35mlola[0m][I] fired transitions : 3024
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 55 (type EXCL) for 54 BridgeAndVehicles-COL-V50P50N10-LTLFireability-10
[[35mlola[0m][I] time limit : 189 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 102 (type EQUN) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 55 (type EXCL) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 422
[[35mlola[0m][I] fired transitions : 422
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 32 (type EXCL) for 23 BridgeAndVehicles-COL-V50P50N10-LTLFireability-05
[[35mlola[0m][I] time limit : 199 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 111 (type EQUN) for 13 BridgeAndVehicles-COL-V50P50N10-LTLFireability-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 101 (type FNDP) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] LAUNCH task # 117 (type FNDP) for 67 BridgeAndVehicles-COL-V50P50N10-LTLFireability-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 118 (type EQUN) for 67 BridgeAndVehicles-COL-V50P50N10-LTLFireability-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 117 (type FNDP) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 118 (type EQUN) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-13 (obsolete)
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[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N10-LTLFireability-11: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N10-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N10-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 32 LTL EXCL 4/276 3/2000 BridgeAndVehicles-COL-V50P50N10-LTLFireability-05 356479 m, 71295 m/sec, 804195 t fired, .
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[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N10-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N10-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 32 LTL EXCL 9/276 7/2000 BridgeAndVehicles-COL-V50P50N10-LTLFireability-05 1019352 m, 132574 m/sec, 2515172 t fired, .
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[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N10-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
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[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N10-LTLFireability-11: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N10-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N10-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 32 LTL EXCL 14/276 11/2000 BridgeAndVehicles-COL-V50P50N10-LTLFireability-05 1625394 m, 121208 m/sec, 4006940 t fired, .
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[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N10-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
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[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N10-LTLFireability-11: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N10-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N10-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 32 LTL EXCL 19/276 15/2000 BridgeAndVehicles-COL-V50P50N10-LTLFireability-05 2196139 m, 114149 m/sec, 5508637 t fired, .
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[[35mlola[0m][.] 32 LTL EXCL 24/276 19/2000 BridgeAndVehicles-COL-V50P50N10-LTLFireability-05 2805453 m, 121862 m/sec, 7527832 t fired, .
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[[35mlola[0m][.] 32 LTL EXCL 29/276 23/2000 BridgeAndVehicles-COL-V50P50N10-LTLFireability-05 3416448 m, 122199 m/sec, 9526593 t fired, .
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[[35mlola[0m][.] 32 LTL EXCL 34/276 27/2000 BridgeAndVehicles-COL-V50P50N10-LTLFireability-05 4045159 m, 125742 m/sec, 11602222 t fired, .
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[[35mlola[0m][.] 65 LTL EXCL 20/823 14/2000 BridgeAndVehicles-COL-V50P50N10-LTLFireability-12 1955485 m, 92031 m/sec, 4372124 t fired, .
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[[35mlola[0m][.] 65 LTL EXCL 25/823 18/2000 BridgeAndVehicles-COL-V50P50N10-LTLFireability-12 2409043 m, 90711 m/sec, 5435463 t fired, .
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[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N10-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P50N10-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 LTL EXCL 135/823 79/2000 BridgeAndVehicles-COL-V50P50N10-LTLFireability-12 11711610 m, 85149 m/sec, 26973558 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1265 secs. Pages in use: 549
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 65 (type EXCL) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 12005765
[[35mlola[0m][I] fired transitions : 27649983
[[35mlola[0m][I] time used : 138
[[35mlola[0m][I] memory pages used : 81
[[35mlola[0m][I] LAUNCH task # 52 (type EXCL) for 51 BridgeAndVehicles-COL-V50P50N10-LTLFireability-09
[[35mlola[0m][I] time limit : 1166 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 52 (type EXCL) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 BridgeAndVehicles-COL-V50P50N10-LTLFireability-00
[[35mlola[0m][I] time limit : 2332 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for BridgeAndVehicles-COL-V50P50N10-LTLFireability-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 422
[[35mlola[0m][I] fired transitions : 422
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Portfolio finished: no open tasks 16
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-COL-V50P50N10"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is BridgeAndVehicles-COL-V50P50N10, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r049-tajo-171620400100092"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-COL-V50P50N10.tgz
mv BridgeAndVehicles-COL-V50P50N10 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;