About the Execution of LoLA for BridgeAndVehicles-COL-V50P20N10
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16207.168 | 1831793.00 | 2212494.00 | 1408.40 | ??????T?????F??? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2024-input.r049-tajo-171620400000066.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2024-input.qcow2' backing_fmt='qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.....................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is BridgeAndVehicles-COL-V50P20N10, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r049-tajo-171620400000066
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 444K
-rw-r--r-- 1 mcc users 7.7K Apr 13 00:36 CTLCardinality.txt
-rw-r--r-- 1 mcc users 74K Apr 13 00:36 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.5K Apr 13 00:33 CTLFireability.txt
-rw-r--r-- 1 mcc users 51K Apr 13 00:33 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.4K Apr 22 14:29 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Apr 22 14:29 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Apr 22 14:29 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Apr 22 14:29 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.0K Apr 13 01:11 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 77K Apr 13 01:11 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.6K Apr 13 01:08 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 58K Apr 13 01:08 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Apr 22 14:29 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Apr 22 14:29 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_pt
-rw-r--r-- 1 mcc users 10 May 18 16:42 instance
-rw-r--r-- 1 mcc users 5 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 42K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15
=== Now, execution of the tool begins
BK_START 1717001605765
FORMULA BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717003437558
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains High-Level net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading HL formula in XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] nonmoderate token usage
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] Places: 128, Transitions: 1328
[[35mlola[0m][W] findlow criterion violated for transition 1
[[35mlola[0m][W] findlow criterion violated for transition 2
[[35mlola[0m][W] findlow criterion violated for transition 0
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][W] findlow criterion violated for transition 9
[[35mlola[0m][W] findlow criterion violated for transition 5
[[35mlola[0m][W] findlow criterion violated for 6 clusters
[[35mlola[0m][I] Time for checking findlow: 1
[[35mlola[0m][I] LAUNCH task # 45 (type EXCL) for 44 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12
[[35mlola[0m][I] time limit : 179 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 64 (type SKEL/SRCH) for 53 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 45 (type EXCL) for BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 422
[[35mlola[0m][I] fired transitions : 1043
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 19 (type EXCL) for 18 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 199 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 74 (type EQUN) for 0 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 75 (type EQUN) for 27 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 4 1 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 3 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 19 CTL EXCL 4/189 3/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06 551882 m, 110376 m/sec, 1935249 t fired, .
[[35mlola[0m][.] 64 CTL SRCH 4/3597 5/5 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 1142372 m, 228474 m/sec, 6014168 t fired, .
[[35mlola[0m][.] 74 EF STEQ 3/3597 0/5 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 sara not yet started (preprocessing).
[[35mlola[0m][.] 75 EF STEQ 3/1798 0/5 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09 sara not yet started (preprocessing).
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 6 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 4 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 64 (type SRCH) for BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 (memory limit exceeded)
[[35mlola[0m][I] FINISHED task # 19 (type EXCL) for BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1295799
[[35mlola[0m][I] fired transitions : 4234211
[[35mlola[0m][I] time used : 8
[[35mlola[0m][I] memory pages used : 6
[[35mlola[0m][I] LAUNCH task # 56 (type EXCL) for 53 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15
[[35mlola[0m][I] time limit : 199 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 77 (type EQUN) for 27 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 74 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 75 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 1 0 4 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 1/199 1/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 62875 m, 12575 m/sec, 259708 t fired, .
[[35mlola[0m][.] 77 EF STEQ 1/3590 0/5 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09 sara not yet started (preprocessing).
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 11 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 77 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 6/199 4/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 666940 m, 120813 m/sec, 2768228 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 16 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 11/199 6/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 1256226 m, 117857 m/sec, 5315038 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 21 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 16/199 9/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 1835283 m, 115811 m/sec, 8233830 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 26 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 21/199 12/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 2430999 m, 119143 m/sec, 11257058 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 31 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 26/199 14/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 2994913 m, 112782 m/sec, 14081836 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 36 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 31/199 17/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 3608703 m, 122758 m/sec, 17186446 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 41 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 36/199 20/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 4162694 m, 110798 m/sec, 19920303 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 46 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 41/199 23/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 4774233 m, 122307 m/sec, 23007721 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 51 secs. Pages in use: 23
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 46/199 25/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 5351654 m, 115484 m/sec, 25782412 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 56 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 51/199 28/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 5989061 m, 127481 m/sec, 28928918 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 61 secs. Pages in use: 28
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 56/199 31/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 6598398 m, 121867 m/sec, 31885012 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 66 secs. Pages in use: 31
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 61/199 34/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 7191402 m, 118600 m/sec, 34757680 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 71 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 66/199 37/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 7800446 m, 121808 m/sec, 37752301 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 76 secs. Pages in use: 37
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 71/199 39/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 8362896 m, 112490 m/sec, 40453533 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 81 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 76/199 42/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 8937540 m, 114928 m/sec, 43211787 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 86 secs. Pages in use: 42
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 81/199 45/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 9552788 m, 123049 m/sec, 46237307 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 91 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 86/199 47/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 10137304 m, 116903 m/sec, 49065047 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 96 secs. Pages in use: 47
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 91/199 50/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 10643236 m, 101186 m/sec, 51439342 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 101 secs. Pages in use: 50
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 96/199 52/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 11244835 m, 120319 m/sec, 54358200 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 106 secs. Pages in use: 52
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 101/199 55/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 11849175 m, 120868 m/sec, 57308792 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 111 secs. Pages in use: 55
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 106/199 58/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 12424266 m, 115018 m/sec, 60053782 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 116 secs. Pages in use: 58
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 111/199 60/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 12955073 m, 106161 m/sec, 62582577 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 121 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 116/199 63/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 13587544 m, 126494 m/sec, 65660263 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 126 secs. Pages in use: 63
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 121/199 66/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 14189636 m, 120418 m/sec, 68560949 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 131 secs. Pages in use: 66
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 126/199 68/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 14742277 m, 110528 m/sec, 71157991 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 136 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 131/199 71/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 15340148 m, 119574 m/sec, 74030224 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 141 secs. Pages in use: 71
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 136/199 74/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 15935625 m, 119095 m/sec, 76927648 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 146 secs. Pages in use: 74
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 141/199 77/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 16508584 m, 114591 m/sec, 79938645 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 151 secs. Pages in use: 77
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 146/199 79/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 17033132 m, 104909 m/sec, 82545549 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 156 secs. Pages in use: 79
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 151/199 81/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 17586080 m, 110589 m/sec, 85260109 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 161 secs. Pages in use: 81
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 156/199 84/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 18181177 m, 119019 m/sec, 88204507 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 166 secs. Pages in use: 84
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 161/199 87/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 18798676 m, 123499 m/sec, 91273269 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 171 secs. Pages in use: 87
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 166/199 90/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 19421828 m, 124630 m/sec, 94401392 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 176 secs. Pages in use: 90
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 171/199 92/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 19984747 m, 112583 m/sec, 97200357 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 181 secs. Pages in use: 92
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 176/199 95/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 20488020 m, 100654 m/sec, 99680317 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 186 secs. Pages in use: 95
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 181/199 97/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 21060371 m, 114470 m/sec, 102527712 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 191 secs. Pages in use: 97
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 186/199 100/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 21636012 m, 115128 m/sec, 105405089 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 196 secs. Pages in use: 100
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 191/199 103/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 22216242 m, 116046 m/sec, 108336440 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 201 secs. Pages in use: 103
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 196/199 105/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 22729477 m, 102647 m/sec, 110906697 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 206 secs. Pages in use: 105
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 56 (type EXCL) for BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 1 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 211 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 48 (type EXCL) for 47 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13
[[35mlola[0m][I] time limit : 199 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 56 (type EXCL) for 53 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15
[[35mlola[0m][I] time limit : 3389 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 48 (type EXCL) for BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 5202
[[35mlola[0m][I] fired transitions : 7704
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 1 0 2 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 5/199 3/5 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 617827 m, -4422330 m/sec, 2563812 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 216 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 56 (type EXCL) for BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 221 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 39 (type EXCL) for 38 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 211 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 5/211 2/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 395883 m, 79176 m/sec, 2239568 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 226 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 10/211 5/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 864717 m, 93766 m/sec, 4898024 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 231 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 15/211 7/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 1302803 m, 87617 m/sec, 7441288 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 236 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 20/211 8/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 1700512 m, 79541 m/sec, 9752703 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 241 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 25/211 10/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 2133175 m, 86532 m/sec, 12281336 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 246 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 30/211 12/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 2580350 m, 89435 m/sec, 14890590 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 251 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 35/211 14/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 2934967 m, 70923 m/sec, 16912113 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 256 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 40/211 16/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 3337256 m, 80457 m/sec, 19225643 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 261 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 45/211 18/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 3763629 m, 85274 m/sec, 21683598 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 266 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 50/211 20/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 4175457 m, 82365 m/sec, 24041262 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 271 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 55/211 21/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 4503000 m, 65508 m/sec, 25913712 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 276 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 60/211 23/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 4877948 m, 74989 m/sec, 28065438 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 281 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 65/211 25/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 5260026 m, 76415 m/sec, 30264330 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 286 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 70/211 27/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 5659470 m, 79888 m/sec, 32562353 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 291 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 75/211 28/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 6029267 m, 73959 m/sec, 34657955 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 296 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 80/211 30/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 6439741 m, 82094 m/sec, 37013939 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 301 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 85/211 32/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 6874777 m, 87007 m/sec, 39518139 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 306 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 90/211 34/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 7323070 m, 89658 m/sec, 42095557 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 311 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 95/211 36/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 7720866 m, 79559 m/sec, 44360358 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 316 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 100/211 38/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 8113077 m, 78442 m/sec, 46604888 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 321 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 105/211 40/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 8537886 m, 84961 m/sec, 49044058 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 326 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 110/211 42/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 8973195 m, 87061 m/sec, 51552242 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 331 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 115/211 44/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 9385626 m, 82486 m/sec, 53930941 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 336 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 120/211 45/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 9748659 m, 72606 m/sec, 55987196 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 341 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 125/211 47/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 10139856 m, 78239 m/sec, 58230449 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 346 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 130/211 49/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 10559335 m, 83895 m/sec, 60641231 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 351 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 135/211 51/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 10995357 m, 87204 m/sec, 63152114 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 356 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 140/211 53/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 11441975 m, 89323 m/sec, 65728281 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 361 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 145/211 55/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 11826637 m, 76932 m/sec, 67915379 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 366 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 150/211 57/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 12191274 m, 72927 m/sec, 69999870 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 371 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 155/211 58/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 12575726 m, 76890 m/sec, 72212752 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 376 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 160/211 60/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 13002040 m, 85262 m/sec, 74672181 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 381 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 165/211 62/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 13440467 m, 87685 m/sec, 77195500 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 386 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 170/211 64/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 13886266 m, 89159 m/sec, 79770960 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 391 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 175/211 66/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 14253476 m, 73442 m/sec, 81855490 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 396 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 180/211 68/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 14572279 m, 63760 m/sec, 83683330 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 401 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 185/211 69/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 14918986 m, 69341 m/sec, 85680471 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 406 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 190/211 71/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 15258994 m, 68001 m/sec, 87640001 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 411 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 195/211 73/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 15664300 m, 81061 m/sec, 89980251 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 416 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 200/211 74/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 16025974 m, 72334 m/sec, 92068429 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 421 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 205/211 76/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 16380458 m, 70896 m/sec, 94116691 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 426 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 210/211 77/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 16720744 m, 68057 m/sec, 96065923 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 431 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 39 (type EXCL) for BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ 0 3 0 0 5 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 436 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 36 (type EXCL) for 27 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 210 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 39 (type EXCL) for 38 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 3164 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 36 (type EXCL) for BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 422
[[35mlola[0m][I] fired transitions : 421
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 5/243 2/5 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 320662 m, -3280016 m/sec, 1821143 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 441 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 39 CTL EXCL 10/243 4/5 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 754562 m, 86780 m/sec, 4270160 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 446 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 39 (type EXCL) for BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 451 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 22 (type EXCL) for 21 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 262 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 5/262 3/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 535846 m, 107169 m/sec, 2231037 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 456 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 10/262 6/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 1130919 m, 119014 m/sec, 4711864 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 461 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 15/262 8/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 1639024 m, 101621 m/sec, 7153062 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 466 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 20/262 11/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 2168858 m, 105966 m/sec, 9809158 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 471 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 25/262 13/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 2690290 m, 104286 m/sec, 12403854 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 476 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 30/262 15/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 3170972 m, 96136 m/sec, 14771500 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 481 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 35/262 18/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 3688297 m, 103465 m/sec, 17346687 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 486 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 40/262 20/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 4199915 m, 102323 m/sec, 19868579 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 491 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 45/262 22/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 4668434 m, 93703 m/sec, 22161727 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 496 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 50/262 24/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 5155099 m, 97333 m/sec, 24560441 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 501 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 55/262 27/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 5650493 m, 99078 m/sec, 27015469 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 506 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 60/262 29/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 6127222 m, 95345 m/sec, 29311810 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 511 secs. Pages in use: 108
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 65/262 31/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 6639278 m, 102411 m/sec, 31820815 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 516 secs. Pages in use: 110
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 70/262 34/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 7168588 m, 105862 m/sec, 34429447 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 521 secs. Pages in use: 113
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 75/262 36/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 7680148 m, 102312 m/sec, 36915515 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 526 secs. Pages in use: 115
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 80/262 38/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 8165418 m, 97054 m/sec, 39263565 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 531 secs. Pages in use: 117
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 85/262 41/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 8681468 m, 103210 m/sec, 41793200 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 536 secs. Pages in use: 120
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 90/262 43/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 9212848 m, 106276 m/sec, 44402248 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 541 secs. Pages in use: 122
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 95/262 45/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 9682299 m, 93890 m/sec, 46671710 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 546 secs. Pages in use: 124
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 100/262 47/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 10145527 m, 92645 m/sec, 48910313 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 551 secs. Pages in use: 126
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 105/262 50/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 10628573 m, 96609 m/sec, 51269416 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 556 secs. Pages in use: 129
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 110/262 52/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 11151798 m, 104645 m/sec, 53836737 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 561 secs. Pages in use: 131
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 115/262 54/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 11684020 m, 106444 m/sec, 56443265 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 566 secs. Pages in use: 133
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 120/262 56/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 12143162 m, 91828 m/sec, 58643822 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 571 secs. Pages in use: 135
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 125/262 59/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 12639190 m, 99205 m/sec, 61054323 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 576 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 130/262 61/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 13154945 m, 103151 m/sec, 63587498 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 581 secs. Pages in use: 140
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 135/262 64/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 13681558 m, 105322 m/sec, 66168638 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 586 secs. Pages in use: 143
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 140/262 66/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 14185204 m, 100729 m/sec, 68612396 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 591 secs. Pages in use: 145
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 145/262 68/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 14627380 m, 88435 m/sec, 70752155 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 596 secs. Pages in use: 147
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 150/262 70/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 15097537 m, 94031 m/sec, 73046147 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 601 secs. Pages in use: 149
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 155/262 72/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 15556105 m, 91713 m/sec, 75288874 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 606 secs. Pages in use: 151
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 160/262 74/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 16057585 m, 100296 m/sec, 77752515 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 611 secs. Pages in use: 153
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 165/262 77/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 16569600 m, 102403 m/sec, 80282600 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 616 secs. Pages in use: 156
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 170/262 79/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 17016895 m, 89459 m/sec, 82430020 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 621 secs. Pages in use: 158
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 175/262 81/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 17457089 m, 88038 m/sec, 84569611 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 626 secs. Pages in use: 160
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 180/262 83/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 17885739 m, 85730 m/sec, 86681640 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 631 secs. Pages in use: 162
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 185/262 85/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 18347005 m, 92253 m/sec, 88949954 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 636 secs. Pages in use: 164
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 190/262 87/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 18812941 m, 93187 m/sec, 91243961 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 641 secs. Pages in use: 166
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 195/262 89/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 19282998 m, 94011 m/sec, 93564663 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 646 secs. Pages in use: 168
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 200/262 91/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 19747288 m, 92858 m/sec, 95886440 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 651 secs. Pages in use: 170
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 205/262 94/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 20247823 m, 100107 m/sec, 98470548 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 656 secs. Pages in use: 173
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 210/262 96/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 20717130 m, 93861 m/sec, 100811273 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 661 secs. Pages in use: 175
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 215/262 98/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 21178534 m, 92280 m/sec, 103078606 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 666 secs. Pages in use: 177
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 220/262 100/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 21665073 m, 97307 m/sec, 105483414 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 671 secs. Pages in use: 179
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 225/262 102/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 22167029 m, 100391 m/sec, 107969126 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 676 secs. Pages in use: 181
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 230/262 105/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 22678899 m, 102374 m/sec, 110497347 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 681 secs. Pages in use: 184
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 235/262 107/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 23195585 m, 103337 m/sec, 113069508 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 686 secs. Pages in use: 186
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 240/262 110/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 23719696 m, 104822 m/sec, 115659828 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 691 secs. Pages in use: 189
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 245/262 112/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 24188375 m, 93735 m/sec, 117981496 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 696 secs. Pages in use: 191
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 250/262 114/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 24621120 m, 86549 m/sec, 120100959 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 701 secs. Pages in use: 193
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 255/262 116/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 25070228 m, 89821 m/sec, 122326618 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 706 secs. Pages in use: 195
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 260/262 118/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 25542203 m, 94395 m/sec, 124674888 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 711 secs. Pages in use: 197
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 22 (type EXCL) for BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 716 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 16 (type EXCL) for 15 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 262 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 22 (type EXCL) for 21 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 2884 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 16 (type EXCL) for BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 422
[[35mlola[0m][I] fired transitions : 845
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 5/262 3/5 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 547169 m, -4999006 m/sec, 2278985 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 721 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 22 (type EXCL) for BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 726 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 13 (type EXCL) for 12 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 287 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 13 (type EXCL) for BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 662
[[35mlola[0m][I] fired transitions : 1092
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 7 (type EXCL) for 6 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 319 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 5/319 5/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 858542 m, 171708 m/sec, 3076261 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 731 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 10/319 8/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 1659134 m, 160118 m/sec, 6453928 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 736 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 15/319 12/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 2442109 m, 156595 m/sec, 9845608 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 741 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 20/319 15/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 3224522 m, 156482 m/sec, 13257531 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 746 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 25/319 19/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 3991325 m, 153360 m/sec, 16578250 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 751 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 30/319 23/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 4754123 m, 152559 m/sec, 19803576 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 756 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 35/319 26/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 5526158 m, 154407 m/sec, 23259933 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 761 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 40/319 29/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 6209999 m, 136768 m/sec, 26120404 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 766 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 45/319 33/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 6957747 m, 149549 m/sec, 29456234 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 771 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 50/319 36/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 7666442 m, 141739 m/sec, 32429320 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 776 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 55/319 39/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 8420443 m, 150800 m/sec, 35769292 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 781 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 60/319 43/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 9179056 m, 151722 m/sec, 38997671 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 786 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 65/319 46/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 9917903 m, 147769 m/sec, 42219728 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 791 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 70/319 50/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 10676314 m, 151682 m/sec, 45622105 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 796 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 75/319 53/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 11435749 m, 151887 m/sec, 48719496 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 801 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 80/319 57/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 12203616 m, 153573 m/sec, 52086422 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 806 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 85/319 60/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 12958536 m, 150984 m/sec, 55168200 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 811 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 90/319 64/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 13710491 m, 150391 m/sec, 58354737 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 816 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 95/319 67/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 14456467 m, 149195 m/sec, 61625007 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 821 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 100/319 71/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 15200420 m, 148790 m/sec, 64718800 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 826 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 105/319 74/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 15934418 m, 146799 m/sec, 67904179 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 831 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 110/319 77/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 16683145 m, 149745 m/sec, 71233352 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 836 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 115/319 81/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 17443779 m, 152126 m/sec, 74625058 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 841 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 120/319 84/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 18192960 m, 149836 m/sec, 77590787 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 846 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 125/319 88/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 18955050 m, 152418 m/sec, 80888928 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 851 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 130/319 91/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 19724452 m, 153880 m/sec, 84292473 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 856 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 135/319 95/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 20464914 m, 148092 m/sec, 87188357 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 861 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 140/319 98/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 21213583 m, 149733 m/sec, 90339991 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 866 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 145/319 102/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 21973865 m, 152056 m/sec, 93443237 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 871 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 150/319 105/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 22684632 m, 142153 m/sec, 96429388 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 876 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 155/319 108/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 23408139 m, 144701 m/sec, 99616707 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 881 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 160/319 111/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 24142869 m, 146946 m/sec, 102910101 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 886 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 165/319 115/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 24885460 m, 148518 m/sec, 106261383 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 891 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 170/319 118/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 25618171 m, 146542 m/sec, 109234300 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 896 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 175/319 121/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 26327079 m, 141781 m/sec, 112310207 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 901 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 180/319 125/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 27050407 m, 144665 m/sec, 115528746 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 906 secs. Pages in use: 204
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 185/319 128/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 27783139 m, 146546 m/sec, 118827114 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 911 secs. Pages in use: 207
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 190/319 132/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 28522079 m, 147788 m/sec, 122181439 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 916 secs. Pages in use: 211
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 195/319 135/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 29243080 m, 144200 m/sec, 125050670 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 921 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 200/319 138/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 29949797 m, 141343 m/sec, 128135509 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 926 secs. Pages in use: 217
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 205/319 141/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 30671461 m, 144332 m/sec, 131352715 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 931 secs. Pages in use: 220
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 210/319 145/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 31401655 m, 146038 m/sec, 134647428 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 936 secs. Pages in use: 224
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 215/319 148/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 32140990 m, 147867 m/sec, 138003863 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 941 secs. Pages in use: 227
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 220/319 151/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 32863639 m, 144529 m/sec, 140896795 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 946 secs. Pages in use: 230
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 225/319 155/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 33564811 m, 140234 m/sec, 143946135 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 951 secs. Pages in use: 234
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 230/319 158/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 34279569 m, 142951 m/sec, 147129467 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 956 secs. Pages in use: 237
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 235/319 161/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 35002933 m, 144672 m/sec, 150394307 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 961 secs. Pages in use: 240
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 240/319 165/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 35736308 m, 146675 m/sec, 153719366 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 966 secs. Pages in use: 244
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 245/319 168/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 36471228 m, 146984 m/sec, 156772708 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 971 secs. Pages in use: 247
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 250/319 171/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 37192598 m, 144274 m/sec, 159752061 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 976 secs. Pages in use: 250
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 255/319 175/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 37931379 m, 147756 m/sec, 162966154 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 981 secs. Pages in use: 254
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 260/319 178/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 38672470 m, 148218 m/sec, 166269972 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 986 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 265/319 181/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 39418940 m, 149294 m/sec, 169562242 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 991 secs. Pages in use: 260
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 270/319 185/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 40128280 m, 141868 m/sec, 172350332 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 996 secs. Pages in use: 264
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 275/319 188/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 40844285 m, 143201 m/sec, 175372677 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1001 secs. Pages in use: 267
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 280/319 191/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 41571350 m, 145413 m/sec, 178477586 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1006 secs. Pages in use: 270
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 285/319 195/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 42308273 m, 147384 m/sec, 181537678 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1011 secs. Pages in use: 274
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 290/319 198/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 43029083 m, 144162 m/sec, 184616862 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1016 secs. Pages in use: 277
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 295/319 201/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 43738305 m, 141844 m/sec, 187506040 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1021 secs. Pages in use: 280
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 300/319 204/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 44445213 m, 141381 m/sec, 190568041 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1026 secs. Pages in use: 283
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 305/319 208/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 45162079 m, 143373 m/sec, 193753330 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1031 secs. Pages in use: 287
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 310/319 211/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 45887156 m, 145015 m/sec, 197003096 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1036 secs. Pages in use: 290
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 315/319 214/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 46617688 m, 146106 m/sec, 200307883 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1041 secs. Pages in use: 293
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 7 (type EXCL) for BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1046 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 319 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 7 (type EXCL) for 6 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 2554 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 5/319 2/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 385377 m, 77075 m/sec, 1117871 t fired, .
[[35mlola[0m][.] 7 CTL EXCL 5/2554 5/5 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 855148 m, -9152508 m/sec, 3063649 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1051 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 7 (type EXCL) for BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 10/319 5/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 865123 m, 95949 m/sec, 2525711 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1056 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 15/319 7/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 1310927 m, 89160 m/sec, 3900633 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1061 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 20/319 8/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 1695790 m, 76972 m/sec, 5372458 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1066 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 25/319 10/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 2108017 m, 82445 m/sec, 6962647 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1071 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 30/319 12/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 2530109 m, 84418 m/sec, 8592478 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1076 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 35/319 14/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 2882378 m, 70453 m/sec, 9984570 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1081 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 40/319 16/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 3255408 m, 74606 m/sec, 11495264 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1086 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 45/319 17/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 3641649 m, 77248 m/sec, 13069936 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1091 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 50/319 19/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 4034975 m, 78665 m/sec, 14673732 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1096 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 55/319 21/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 4382927 m, 69590 m/sec, 16077852 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1101 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 60/319 22/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 4747987 m, 73012 m/sec, 17566990 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1106 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 65/319 24/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 5123739 m, 75150 m/sec, 19113328 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1111 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 70/319 26/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 5505558 m, 76363 m/sec, 20678280 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1116 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 75/319 28/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 5866230 m, 72134 m/sec, 22149338 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1121 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 80/319 29/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 6228952 m, 72544 m/sec, 23638978 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1126 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 85/319 31/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 6610948 m, 76399 m/sec, 25216952 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1131 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 90/319 33/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 7001302 m, 78070 m/sec, 26829044 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1136 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 95/319 35/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 7398195 m, 79378 m/sec, 28469945 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1141 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 100/319 36/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 7753357 m, 71032 m/sec, 29926566 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1146 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 105/319 38/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 8117905 m, 72909 m/sec, 31435334 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1151 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 110/319 40/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 8498332 m, 76085 m/sec, 33017822 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1156 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 115/319 42/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 8886392 m, 77612 m/sec, 34626914 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1161 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 120/319 43/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 9280792 m, 78880 m/sec, 36262090 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1166 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 125/319 45/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 9644022 m, 72646 m/sec, 37767019 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1171 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 130/319 47/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 9995764 m, 70348 m/sec, 39229723 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1176 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 135/319 48/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 10367858 m, 74418 m/sec, 40775369 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1181 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 140/319 50/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 10749894 m, 76407 m/sec, 42367369 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1186 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 145/319 52/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 11139543 m, 77929 m/sec, 43990347 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1191 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 150/319 54/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 11533487 m, 78788 m/sec, 45636040 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1196 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 155/319 55/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 11877231 m, 68748 m/sec, 47057602 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1201 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 160/319 57/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 12229254 m, 70404 m/sec, 48525094 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1206 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 165/319 59/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 12598032 m, 73755 m/sec, 50062499 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1211 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 170/319 60/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 12977275 m, 75848 m/sec, 51646105 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1216 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 175/319 62/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 13363903 m, 77325 m/sec, 53265536 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1221 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 180/319 64/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 13751505 m, 77520 m/sec, 54887766 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1226 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 185/319 66/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 14119336 m, 73566 m/sec, 56413683 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1231 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 190/319 67/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 14447366 m, 65606 m/sec, 57784756 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1236 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 195/319 69/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 14795507 m, 69628 m/sec, 59236283 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1241 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 200/319 70/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 15158614 m, 72621 m/sec, 60752910 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1246 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 205/319 72/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 15530984 m, 74474 m/sec, 62318305 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1251 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 210/319 74/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 15910277 m, 75858 m/sec, 63910354 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1256 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 215/319 76/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 16291205 m, 76185 m/sec, 65499766 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1261 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 220/319 77/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 16669328 m, 75624 m/sec, 67074072 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1266 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 225/319 79/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 16985029 m, 63140 m/sec, 68388586 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1271 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 230/319 80/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 17321798 m, 67353 m/sec, 69802977 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1276 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 235/319 82/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 17670555 m, 69751 m/sec, 71264006 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1281 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 240/319 83/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 18025699 m, 71028 m/sec, 72741375 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1286 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 245/319 85/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 18386238 m, 72107 m/sec, 74267009 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1291 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 250/319 87/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 18750789 m, 72910 m/sec, 75782751 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1296 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 255/319 88/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 19118009 m, 73444 m/sec, 77321075 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1301 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 260/319 90/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 19488122 m, 74022 m/sec, 78886578 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1306 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 265/319 92/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 19819821 m, 66339 m/sec, 80261401 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1311 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 270/319 93/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 20181509 m, 72337 m/sec, 81774917 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1316 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 275/319 95/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 20527077 m, 69113 m/sec, 83187334 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1321 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 280/319 96/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 20828029 m, 60190 m/sec, 84417873 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1326 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 285/319 98/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 21167975 m, 67989 m/sec, 85809731 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1331 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 290/319 99/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 21507180 m, 67841 m/sec, 87198696 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1336 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 295/319 101/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 21875459 m, 73655 m/sec, 88710190 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1341 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 300/319 103/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 22249801 m, 74868 m/sec, 90247038 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1346 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 305/319 105/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 22629530 m, 75945 m/sec, 91808628 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1351 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 310/319 106/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 23013285 m, 76751 m/sec, 93387458 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1356 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 315/319 108/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 23403097 m, 77962 m/sec, 95016276 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1361 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 4 (type EXCL) for BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1366 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 68 (type EXCL) for 0 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 319 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 2234 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 5/2234 2/5 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 381132 m, -4604393 m/sec, 1105886 t fired, .
[[35mlola[0m][.] 68 EG EXCL 5/319 2/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 297646 m, 59529 m/sec, 437195 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1371 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 4 CTL EXCL 10/2234 4/5 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 858407 m, 95455 m/sec, 2506343 t fired, .
[[35mlola[0m][.] 68 EG EXCL 10/279 3/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 666418 m, 73754 m/sec, 1228665 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1376 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 4 (type EXCL) for BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 15/279 5/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 1043214 m, 75359 m/sec, 2053769 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1381 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 20/319 6/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 1408825 m, 73122 m/sec, 2860194 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1386 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 25/319 8/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 1785634 m, 75361 m/sec, 3689754 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1391 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 30/319 9/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 2141844 m, 71242 m/sec, 4476248 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1396 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 35/319 11/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 2515434 m, 74718 m/sec, 5301933 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1401 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 40/319 12/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 2900775 m, 77068 m/sec, 6160022 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1406 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 45/319 14/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 3264688 m, 72782 m/sec, 6961757 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1411 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 50/319 15/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 3633886 m, 73839 m/sec, 7779492 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1416 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 55/319 17/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 4004399 m, 74102 m/sec, 8600521 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1421 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 60/319 18/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 4366322 m, 72384 m/sec, 9399956 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1426 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 65/319 19/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 4734750 m, 73685 m/sec, 10217426 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1431 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 70/319 21/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 5103832 m, 73816 m/sec, 11045749 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1436 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 75/319 22/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 5448453 m, 68924 m/sec, 11803966 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1441 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 80/319 24/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 5820042 m, 74317 m/sec, 12629034 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1446 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 85/319 25/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 6174620 m, 70915 m/sec, 13410275 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1451 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 90/319 26/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 6533409 m, 71757 m/sec, 14205604 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1456 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 95/319 28/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 6914538 m, 76225 m/sec, 15055551 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1461 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 100/319 29/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 7251992 m, 67490 m/sec, 15796259 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1466 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 105/319 31/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 7620326 m, 73666 m/sec, 16616623 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1471 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 110/319 32/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 7988454 m, 73625 m/sec, 17436181 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1476 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 115/319 34/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 8331043 m, 68517 m/sec, 18191637 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1481 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 120/319 35/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 8702262 m, 74243 m/sec, 19019401 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1486 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 125/319 36/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 9065348 m, 72617 m/sec, 19825646 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1491 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 130/319 38/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 9387647 m, 64459 m/sec, 20539281 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1496 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 135/319 39/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 9755343 m, 73539 m/sec, 21361473 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1501 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 140/319 41/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 10125249 m, 73981 m/sec, 22189822 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1506 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 145/319 42/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 10454397 m, 65829 m/sec, 22911526 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1511 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 150/319 43/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 10786496 m, 66419 m/sec, 23651598 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1516 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 155/319 45/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 11165725 m, 75845 m/sec, 24502134 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1521 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 160/319 46/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 11489285 m, 64712 m/sec, 25212719 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1526 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 165/319 47/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 11841423 m, 70427 m/sec, 25998523 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1531 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 170/319 49/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 12214332 m, 74581 m/sec, 26835468 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1536 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 175/319 50/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 12592041 m, 75541 m/sec, 27682473 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1541 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 180/319 51/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 12913217 m, 64235 m/sec, 28384373 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1546 secs. Pages in use: 298
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 185/319 53/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 13270614 m, 71479 m/sec, 29182592 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1551 secs. Pages in use: 302
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 190/319 54/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 13644432 m, 74763 m/sec, 30021291 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1556 secs. Pages in use: 304
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 195/319 56/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 13996569 m, 70427 m/sec, 30800688 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1561 secs. Pages in use: 308
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 200/319 57/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 14334887 m, 67663 m/sec, 31552216 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1566 secs. Pages in use: 311
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 205/319 58/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 14695132 m, 72049 m/sec, 32358773 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1571 secs. Pages in use: 313
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 210/319 60/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 15067093 m, 74392 m/sec, 33194595 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1576 secs. Pages in use: 317
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 215/319 61/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 15418314 m, 70244 m/sec, 33978874 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1581 secs. Pages in use: 320
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 220/319 62/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 15737619 m, 63861 m/sec, 34675607 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1586 secs. Pages in use: 322
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 225/319 64/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 16085108 m, 69497 m/sec, 35449500 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1591 secs. Pages in use: 326
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 230/319 65/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 16447111 m, 72400 m/sec, 36265244 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1596 secs. Pages in use: 329
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 235/319 67/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 16822552 m, 75088 m/sec, 37108892 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1601 secs. Pages in use: 333
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 240/319 68/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 17156895 m, 66868 m/sec, 37848241 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1606 secs. Pages in use: 335
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 245/319 69/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 17467093 m, 62039 m/sec, 38523628 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1611 secs. Pages in use: 337
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 250/319 71/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 17819817 m, 70544 m/sec, 39322173 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1616 secs. Pages in use: 341
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 255/319 72/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 18187277 m, 73492 m/sec, 40149794 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1621 secs. Pages in use: 343
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 260/319 74/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 18566621 m, 75868 m/sec, 41002009 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1626 secs. Pages in use: 347
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 265/319 75/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 18874115 m, 61498 m/sec, 41662381 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1631 secs. Pages in use: 350
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 270/319 76/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 19223486 m, 69874 m/sec, 42445321 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1636 secs. Pages in use: 352
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 275/319 78/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 19585434 m, 72389 m/sec, 43264427 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1641 secs. Pages in use: 356
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 280/319 79/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 19953414 m, 73596 m/sec, 44090666 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1646 secs. Pages in use: 359
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 285/319 80/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 20321243 m, 73565 m/sec, 44915858 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1651 secs. Pages in use: 361
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 290/319 82/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 20623456 m, 60442 m/sec, 45561541 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1656 secs. Pages in use: 365
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 295/319 83/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 20979603 m, 71229 m/sec, 46365342 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1661 secs. Pages in use: 368
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 300/319 84/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 21344964 m, 73072 m/sec, 47191719 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1666 secs. Pages in use: 371
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 305/319 86/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 21719417 m, 74890 m/sec, 48034160 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1671 secs. Pages in use: 374
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 310/319 87/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 22070367 m, 70190 m/sec, 48813514 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1676 secs. Pages in use: 376
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 315/319 88/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 22387203 m, 63367 m/sec, 49499759 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1681 secs. Pages in use: 379
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 68 (type EXCL) for BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 0 0 2 1 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 2 0 0 2 0 2 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1686 secs. Pages in use: 382
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 67 (type EXCL) for 53 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15
[[35mlola[0m][I] time limit : 319 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 68 (type EXCL) for 0 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 1914 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 67 (type EXCL) for BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 422
[[35mlola[0m][I] fired transitions : 422
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 0 0 0 3 0 2 1
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 5/382 2/5 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 277480 m, -4421944 m/sec, 397783 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1691 secs. Pages in use: 386
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 0 0 0 3 0 2 1
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 10/382 3/5 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 613431 m, 67190 m/sec, 1117059 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1696 secs. Pages in use: 389
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 0 0 0 3 0 2 1
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 EG EXCL 15/382 4/5 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 954400 m, 68193 m/sec, 1860746 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1701 secs. Pages in use: 391
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 68 (type EXCL) for BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 0 0 0 3 0 2 1
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1706 secs. Pages in use: 393
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 42 (type EXCL) for 41 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 473 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 0 0 0 3 0 2 1
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 5/473 4/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11 681192 m, 136238 m/sec, 2853383 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1711 secs. Pages in use: 394
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 0 0 0 3 0 2 1
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 10/473 7/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11 1369430 m, 137647 m/sec, 5936557 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1716 secs. Pages in use: 399
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 0 0 0 3 0 2 1
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 15/473 10/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11 1961432 m, 118400 m/sec, 9121793 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1721 secs. Pages in use: 404
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 0 0 0 3 0 2 1
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 20/473 13/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11 2592613 m, 126236 m/sec, 12544085 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1726 secs. Pages in use: 409
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 0 0 0 3 0 2 1
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 25/473 15/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11 3133381 m, 108153 m/sec, 15437758 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1731 secs. Pages in use: 412
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 0 0 0 3 0 2 1
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 30/473 18/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11 3733828 m, 120089 m/sec, 18694844 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1736 secs. Pages in use: 417
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 0 0 0 3 0 2 1
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 35/473 20/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11 4305446 m, 114323 m/sec, 21773315 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1741 secs. Pages in use: 421
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 0 0 0 3 0 2 1
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 40/473 23/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11 4855906 m, 110092 m/sec, 24753557 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1746 secs. Pages in use: 425
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 0 0 0 3 0 2 1
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 45/473 26/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11 5431495 m, 115117 m/sec, 27885813 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1751 secs. Pages in use: 429
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 0 0 0 3 0 2 1
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 50/473 28/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11 5982514 m, 110203 m/sec, 30853999 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1756 secs. Pages in use: 433
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 0 0 0 3 0 2 1
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 55/473 29/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11 6250659 m, 53629 m/sec, 32306339 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1761 secs. Pages in use: 435
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-09: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-00: F 0 0 0 0 2 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-01: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-07: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-15: DISJ 0 0 0 0 3 0 2 1
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 42 CTL EXCL 84/473 30/2000 BridgeAndVehicles-COL-V50P20N10-CTLFireability-2024-11 6456783 m, 41224 m/sec, 33424605 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1791 secs. Pages in use: 436
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 409 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-COL-V50P20N10"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is BridgeAndVehicles-COL-V50P20N10, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r049-tajo-171620400000066"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-COL-V50P20N10.tgz
mv BridgeAndVehicles-COL-V50P20N10 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;