About the Execution of LoLA for BridgeAndVehicles-COL-V20P10N50
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 5511.260 | 767457.00 | 805497.00 | 152.80 | FTFTTFTTTTFFFFTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2024-input.r049-tajo-171620399900034.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2024-input.qcow2' backing_fmt='qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.........................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is BridgeAndVehicles-COL-V20P10N50, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r049-tajo-171620399900034
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 484K
-rw-r--r-- 1 mcc users 7.9K Apr 13 02:41 CTLCardinality.txt
-rw-r--r-- 1 mcc users 73K Apr 13 02:41 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.6K Apr 13 02:35 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Apr 13 02:35 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.4K Apr 22 14:29 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Apr 22 14:29 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Apr 22 14:29 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 22 14:29 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Apr 13 03:18 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 125K Apr 13 03:18 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.1K Apr 13 03:13 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 44K Apr 13 03:13 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Apr 22 14:29 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Apr 22 14:29 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_pt
-rw-r--r-- 1 mcc users 10 May 18 16:42 instance
-rw-r--r-- 1 mcc users 5 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 41K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15
=== Now, execution of the tool begins
BK_START 1717001230068
FORMULA BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 767 secs. Pages in use: 39
BK_STOP 1717001997525
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains High-Level net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading HL formula in XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] LAUNCH task # 11 (type SKEL/CNST) for 9 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 11 (type SKEL/CNST) for BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] nonmoderate token usage
[[35mlola[0m][I] Places: 108, Transitions: 2228
[[35mlola[0m][W] findlow criterion violated for transition 1
[[35mlola[0m][W] findlow criterion violated for transition 2
[[35mlola[0m][W] findlow criterion violated for transition 0
[[35mlola[0m][W] findlow criterion violated for transition 9
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][W] findlow criterion violated for transition 5
[[35mlola[0m][W] findlow criterion violated for 6 clusters
[[35mlola[0m][I] Time for checking findlow: 1
[[35mlola[0m][I] LAUNCH task # 35 (type EXCL) for 34 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 224 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 35 (type EXCL) for BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 486
[[35mlola[0m][I] fired transitions : 1318
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 29 (type EXCL) for 28 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 54 (type EQUN) for 12 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 3/239 1/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 81140 m, 16228 m/sec, 361298 t fired, .
[[35mlola[0m][.] 54 EF STEQ 3/3597 0/5 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04 sara not yet started (preprocessing).
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 6 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 58 (type EQUN) for 40 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 8/239 2/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 292368 m, 42245 m/sec, 1517939 t fired, .
[[35mlola[0m][.] 54 EF STEQ 8/3597 0/5 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04 sara not yet started (preprocessing).
[[35mlola[0m][.] 58 EF STEQ 5/3594 0/5 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12 sara not yet started (preprocessing).
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 11 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 58 (type EQUN) for BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 13/239 3/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 506577 m, 42841 m/sec, 2652446 t fired, .
[[35mlola[0m][.] 54 EF STEQ 13/3597 0/5 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04 sara not yet started (preprocessing).
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 16 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 18/239 4/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 737329 m, 46150 m/sec, 3855410 t fired, .
[[35mlola[0m][.] 54 EF STEQ 18/3597 0/5 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04 sara not yet started (preprocessing).
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 21 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 54 (type EQUN) for BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 23/239 5/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 969058 m, 46345 m/sec, 5057528 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 26 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 28/239 6/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 1181098 m, 42408 m/sec, 6154578 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 31 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 33/239 6/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 1409666 m, 45713 m/sec, 7338784 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 36 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 38/239 7/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 1628552 m, 43777 m/sec, 8472812 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 41 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 43/239 8/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 1874354 m, 49160 m/sec, 9737148 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 46 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 48/239 9/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 2104947 m, 46118 m/sec, 10923379 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 51 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 53/239 10/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 2342582 m, 47527 m/sec, 12166385 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 56 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 58/239 11/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 2592908 m, 50065 m/sec, 13442188 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 61 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 63/239 12/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 2822491 m, 45916 m/sec, 14659482 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 66 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 68/239 13/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 3073703 m, 50242 m/sec, 15944524 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 71 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 73/239 14/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 3296358 m, 44531 m/sec, 17140432 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 76 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 78/239 15/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 3523262 m, 45380 m/sec, 18308349 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 81 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 83/239 16/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 3748902 m, 45128 m/sec, 19520706 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 86 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 88/239 17/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 3969437 m, 44107 m/sec, 20676546 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 91 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 93/239 18/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 4211507 m, 48414 m/sec, 21949375 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 96 secs. Pages in use: 18
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 98/239 19/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 4430095 m, 43717 m/sec, 23126084 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 101 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 103/239 20/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 4672507 m, 48482 m/sec, 24386119 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 106 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 108/239 21/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 4899975 m, 45493 m/sec, 25620847 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 111 secs. Pages in use: 21
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 113/239 22/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 5123271 m, 44659 m/sec, 26807906 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 116 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 118/239 23/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 5363565 m, 48058 m/sec, 28069512 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 121 secs. Pages in use: 23
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 123/239 24/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 5590083 m, 45303 m/sec, 29309661 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 126 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 128/239 25/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 5807740 m, 43531 m/sec, 30482768 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 131 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 133/239 26/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 6039374 m, 46326 m/sec, 31705463 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 136 secs. Pages in use: 26
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 138/239 27/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 6275617 m, 47248 m/sec, 32951780 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 141 secs. Pages in use: 27
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 143/239 28/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 6470722 m, 39021 m/sec, 34059202 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 146 secs. Pages in use: 28
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 148/239 29/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 6689633 m, 43782 m/sec, 35239897 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 151 secs. Pages in use: 29
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 153/239 30/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 6906285 m, 43330 m/sec, 36378235 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 156 secs. Pages in use: 30
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 158/239 31/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 7137594 m, 46261 m/sec, 37617968 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 161 secs. Pages in use: 31
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 163/239 31/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 7332054 m, 38892 m/sec, 38718464 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 166 secs. Pages in use: 31
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 168/239 32/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 7545247 m, 42638 m/sec, 39861603 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 171 secs. Pages in use: 32
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 173/239 33/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 7778463 m, 46643 m/sec, 41110420 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 176 secs. Pages in use: 33
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 178/239 34/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 8017196 m, 47746 m/sec, 42368086 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 181 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 183/239 35/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 8200735 m, 36707 m/sec, 43441049 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 186 secs. Pages in use: 35
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 188/239 36/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 8402844 m, 40421 m/sec, 44556367 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 191 secs. Pages in use: 36
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 193/239 37/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 8611505 m, 41732 m/sec, 45672923 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 196 secs. Pages in use: 37
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 198/239 38/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 8821388 m, 41976 m/sec, 46805271 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 201 secs. Pages in use: 38
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 203/239 39/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08 9040483 m, 43819 m/sec, 47958767 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 206 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 29 (type EXCL) for BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 9066120
[[35mlola[0m][I] fired transitions : 48107285
[[35mlola[0m][I] time used : 203
[[35mlola[0m][I] memory pages used : 39
[[35mlola[0m][I] LAUNCH task # 52 (type EXCL) for 12 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 242 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 52 (type EXCL) for BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 22
[[35mlola[0m][I] fired transitions : 21
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 47 (type EXCL) for 46 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14
[[35mlola[0m][I] time limit : 282 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 47 (type EXCL) for BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 165
[[35mlola[0m][I] fired transitions : 700
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 44 (type EXCL) for 43 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13
[[35mlola[0m][I] time limit : 308 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 4/308 2/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13 331162 m, 66232 m/sec, 1677381 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 211 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 9/308 4/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13 716055 m, 76978 m/sec, 3970300 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 216 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 14/308 5/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13 1102196 m, 77228 m/sec, 6313831 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 221 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 19/308 7/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13 1442110 m, 67982 m/sec, 8456385 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 226 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 24/308 8/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13 1821180 m, 75814 m/sec, 10844382 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 231 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 29/308 10/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13 2182821 m, 72328 m/sec, 13084616 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 236 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 34/308 11/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13 2572567 m, 77949 m/sec, 15471709 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 241 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 39/308 13/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13 2956099 m, 76706 m/sec, 17834703 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 246 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 44/308 15/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13 3349966 m, 78773 m/sec, 20205348 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 251 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 49/308 16/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13 3742740 m, 78554 m/sec, 22592219 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 256 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 54/308 18/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13 4122199 m, 75891 m/sec, 24984868 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 261 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 59/308 20/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13 4527622 m, 81084 m/sec, 27344880 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 266 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 64/308 21/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13 4922471 m, 78969 m/sec, 29743619 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 271 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 69/308 23/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13 5307516 m, 77009 m/sec, 32106694 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 276 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 74/308 25/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13 5720507 m, 82598 m/sec, 34492859 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 281 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 79/308 26/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13 6112113 m, 78321 m/sec, 36888653 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 286 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 84/308 28/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13 6522974 m, 82172 m/sec, 39257705 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 291 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 89/308 30/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13 6911532 m, 77711 m/sec, 41648443 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 296 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 94/308 31/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13 7326482 m, 82990 m/sec, 44040542 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 301 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 99/308 33/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13 7699756 m, 74654 m/sec, 46270998 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 306 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 104/308 35/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13 8081714 m, 76391 m/sec, 48589296 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 311 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 109/308 36/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13 8445204 m, 72698 m/sec, 50597950 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 316 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 CTL EXCL 114/308 38/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13 8831712 m, 77301 m/sec, 52925584 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 321 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 44 (type EXCL) for BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 9080862
[[35mlola[0m][I] fired transitions : 54614027
[[35mlola[0m][I] time used : 118
[[35mlola[0m][I] memory pages used : 39
[[35mlola[0m][I] LAUNCH task # 38 (type EXCL) for 37 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 327 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 1/327 1/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 46161 m, 9232 m/sec, 243559 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 326 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 6/327 2/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 335557 m, 57879 m/sec, 2030745 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 331 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 11/327 3/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 661353 m, 65159 m/sec, 3957476 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 336 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 16/327 5/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 1019691 m, 71667 m/sec, 6014688 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 341 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 21/327 6/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 1358142 m, 67690 m/sec, 7918069 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 346 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 26/327 8/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 1723629 m, 73097 m/sec, 9973787 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 351 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 31/327 9/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 2070362 m, 69346 m/sec, 11931526 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 356 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 36/327 11/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 2395633 m, 65054 m/sec, 13796330 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 361 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 41/327 12/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 2715170 m, 63907 m/sec, 15635908 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 366 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 46/327 13/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 3068503 m, 70666 m/sec, 17617541 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 371 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 51/327 15/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 3381922 m, 62683 m/sec, 19514740 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 376 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 56/327 16/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 3716131 m, 66841 m/sec, 21492064 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 381 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 61/327 18/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 4049177 m, 66609 m/sec, 23429667 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 386 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 66/327 19/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 4350683 m, 60301 m/sec, 25284657 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 391 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 71/327 20/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 4700942 m, 70051 m/sec, 27313258 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 396 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 76/327 22/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 5005075 m, 60826 m/sec, 29240256 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 401 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 81/327 23/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 5339027 m, 66790 m/sec, 31245855 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 406 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 86/327 24/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 5653245 m, 62843 m/sec, 33188135 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 411 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 91/327 26/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 5954886 m, 60328 m/sec, 35048348 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 416 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 96/327 27/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 6309876 m, 70998 m/sec, 37201565 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 421 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 101/327 28/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 6600153 m, 58055 m/sec, 39051255 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 426 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 106/327 30/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 6953220 m, 70613 m/sec, 41197470 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 431 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 111/327 31/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 7254831 m, 60322 m/sec, 43156055 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 436 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 116/327 32/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 7570774 m, 63188 m/sec, 45187026 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 441 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 121/327 34/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 7915855 m, 69016 m/sec, 47262158 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 446 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 126/327 35/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 8219553 m, 60739 m/sec, 49238912 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 451 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 131/327 36/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 8511468 m, 58383 m/sec, 51109164 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 456 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 CTL EXCL 136/327 38/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11 8847261 m, 67158 m/sec, 53223888 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 461 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 38 (type EXCL) for BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 9061941
[[35mlola[0m][I] fired transitions : 54562246
[[35mlola[0m][I] time used : 139
[[35mlola[0m][I] memory pages used : 39
[[35mlola[0m][I] LAUNCH task # 32 (type EXCL) for 31 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 348 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 2/348 1/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09 195389 m, 39077 m/sec, 714533 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 466 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 7/348 4/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09 715492 m, 104020 m/sec, 2685786 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 471 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 12/348 6/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09 1254338 m, 107769 m/sec, 4732672 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 476 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 17/348 8/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09 1803734 m, 109879 m/sec, 6843035 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 481 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 22/348 10/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09 2305117 m, 100276 m/sec, 8760417 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 486 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 27/348 13/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09 2847939 m, 108564 m/sec, 10886653 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 491 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 32/348 15/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09 3350030 m, 100418 m/sec, 12797543 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 496 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 37/348 17/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09 3892175 m, 108429 m/sec, 14919715 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 501 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 42/348 19/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09 4435963 m, 108757 m/sec, 17055514 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 506 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 32 (type EXCL) for BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 4567268
[[35mlola[0m][I] fired transitions : 17606988
[[35mlola[0m][I] time used : 43
[[35mlola[0m][I] memory pages used : 20
[[35mlola[0m][I] LAUNCH task # 26 (type EXCL) for 25 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 386 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 4/386 1/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07 67688 m, 13537 m/sec, 515218 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 511 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 26 (type EXCL) for BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 95762
[[35mlola[0m][I] fired transitions : 738425
[[35mlola[0m][I] time used : 5
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 23 (type EXCL) for 22 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 441 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 23 (type EXCL) for BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 70092
[[35mlola[0m][I] fired transitions : 205720
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 20 (type EXCL) for 19 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 514 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 20 (type EXCL) for BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 344
[[35mlola[0m][I] fired transitions : 1616
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 617 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 4 (type EXCL) for BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 95762
[[35mlola[0m][I] fired transitions : 313923
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 771 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 165
[[35mlola[0m][I] fired transitions : 164
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 55 (type EXCL) for 40 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12
[[35mlola[0m][I] time limit : 1029 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 EG EXCL 3/1029 1/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12 36364 m, 7272 m/sec, 61574 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 516 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 EG EXCL 8/1029 1/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12 116626 m, 16052 m/sec, 203091 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 521 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 EG EXCL 13/1029 1/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12 200127 m, 16700 m/sec, 354891 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 526 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 EG EXCL 18/1029 2/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12 286215 m, 17217 m/sec, 513411 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 531 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 EG EXCL 23/1029 2/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12 374730 m, 17703 m/sec, 679517 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 536 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 EG EXCL 28/1029 2/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12 463246 m, 17703 m/sec, 845954 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 541 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 EG EXCL 33/1029 3/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12 552957 m, 17942 m/sec, 1015502 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 546 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 EG EXCL 38/1029 3/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12 640869 m, 17582 m/sec, 1181199 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 551 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 EG EXCL 43/1029 3/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12 733413 m, 18508 m/sec, 1359759 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 556 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 EG EXCL 48/1029 3/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12 827669 m, 18851 m/sec, 1542541 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 561 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 EG EXCL 53/1029 4/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12 920348 m, 18535 m/sec, 1720219 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 566 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 EG EXCL 58/1029 4/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12 1007597 m, 17449 m/sec, 1891347 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 571 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 EG EXCL 63/1029 4/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12 1096790 m, 17838 m/sec, 2064053 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 576 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 EG EXCL 68/1029 5/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12 1183681 m, 17378 m/sec, 2234815 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 581 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 EG EXCL 73/1029 5/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12 1278077 m, 18879 m/sec, 2418486 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 586 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 EG EXCL 78/1029 5/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12 1367389 m, 17862 m/sec, 2592870 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 591 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 EG EXCL 83/1029 6/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12 1462699 m, 19062 m/sec, 2781559 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 596 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 EG EXCL 88/1029 6/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12 1552965 m, 18053 m/sec, 2960069 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 601 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 EG EXCL 93/1029 7/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12 1667087 m, 22824 m/sec, 3194628 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 606 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG 0 0 1 0 2 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 EG EXCL 98/1029 7/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12 1761390 m, 18860 m/sec, 3383402 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 611 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 55 (type EXCL) for BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1801909
[[35mlola[0m][I] fired transitions : 3447905
[[35mlola[0m][I] time used : 101
[[35mlola[0m][I] memory pages used : 7
[[35mlola[0m][I] LAUNCH task # 7 (type EXCL) for 6 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 1493 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 2/1493 1/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02 105812 m, 21162 m/sec, 639647 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 616 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 7 (type EXCL) for BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 110022
[[35mlola[0m][I] fired transitions : 665694
[[35mlola[0m][I] time used : 2
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 50 (type EXCL) for 49 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15
[[35mlola[0m][I] time limit : 2984 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 5/2984 2/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 290812 m, 58162 m/sec, 1229597 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 621 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 10/2984 3/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 592781 m, 60393 m/sec, 2614603 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 626 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 15/2984 4/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 903762 m, 62196 m/sec, 4053281 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 631 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 20/2984 6/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 1216710 m, 62589 m/sec, 5511961 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 636 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 25/2984 7/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 1531980 m, 63054 m/sec, 6974954 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 641 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 30/2984 8/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 1845576 m, 62719 m/sec, 8441205 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 646 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 35/2984 9/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 2126428 m, 56170 m/sec, 9748260 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 651 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 40/2984 11/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 2433571 m, 61428 m/sec, 11181383 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 656 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 45/2984 12/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 2735206 m, 60327 m/sec, 12588470 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 661 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 50/2984 13/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 3046013 m, 62161 m/sec, 14057211 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 666 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 55/2984 15/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 3348820 m, 60561 m/sec, 15469339 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 671 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 60/2984 16/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 3664665 m, 63169 m/sec, 16949250 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 676 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 65/2984 17/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 3966835 m, 60434 m/sec, 18373928 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 681 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 70/2984 19/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 4278610 m, 62355 m/sec, 19834861 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 686 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 75/2984 20/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 4582224 m, 60722 m/sec, 21271069 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 691 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 80/2984 21/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 4895477 m, 62650 m/sec, 22743002 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 696 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 85/2984 22/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 5194042 m, 59713 m/sec, 24153120 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 701 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 90/2984 24/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 5504219 m, 62035 m/sec, 25632009 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 706 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 95/2984 25/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 5777197 m, 54595 m/sec, 26901080 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 711 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 100/2984 26/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 6052875 m, 55135 m/sec, 28217128 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 716 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 105/2984 27/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 6366273 m, 62679 m/sec, 29689259 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 721 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 110/2984 29/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 6652615 m, 57268 m/sec, 31042860 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 726 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 115/2984 30/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 6963525 m, 62182 m/sec, 32528100 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 731 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 120/2984 31/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 7268730 m, 61041 m/sec, 33956342 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 736 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 125/2984 32/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 7541692 m, 54592 m/sec, 35252612 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 741 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 130/2984 33/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 7826431 m, 56947 m/sec, 36611364 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 746 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 135/2984 35/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 8109254 m, 56564 m/sec, 37947385 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 751 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 140/2984 36/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 8392645 m, 56678 m/sec, 39281283 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 756 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 145/2984 37/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 8696003 m, 60671 m/sec, 40735796 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 761 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-03: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-04: DISJ true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-12: EG false state space / EG[0m
[[35mlola[0m][.] [1m[31mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 150/2984 38/2000 BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15 9015653 m, 63930 m/sec, 42267603 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 766 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 50 (type EXCL) for BridgeAndVehicles-COL-V20P10N50-CTLFireability-2024-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 9080862
[[35mlola[0m][I] fired transitions : 42572924
[[35mlola[0m][I] time used : 151
[[35mlola[0m][I] memory pages used : 39
[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-COL-V20P10N50"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is BridgeAndVehicles-COL-V20P10N50, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r049-tajo-171620399900034"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-COL-V20P10N50.tgz
mv BridgeAndVehicles-COL-V20P10N50 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;